From 0c80e197ea81043214b533c9c06c794da5aad877 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Thu, 10 May 2018 19:44:22 -0700 Subject: gpu: nvgpu: Add GPU Fmax@Vmin access through BPMP On Tegra platforms that have clock management under BPMP, and do not support Tegra DVFS, GPU driver cannot access Fmax@Vmin (get interface always returns "0"). Added such access through BPMP DVFS shim driver. Bug 2045903 Change-Id: I0222f2e2917cda15d18ea3296dd1fe53b2ea6b45 Signed-off-by: Alex Frid Reviewed-on: https://git-master.nvidia.com/r/1722431 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/linux/clk.c | 7 +++++++ drivers/gpu/nvgpu/common/linux/platform_gk20a.h | 1 + drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c | 8 ++++++++ 3 files changed, 16 insertions(+) diff --git a/drivers/gpu/nvgpu/common/linux/clk.c b/drivers/gpu/nvgpu/common/linux/clk.c index a0e56455..414b17c4 100644 --- a/drivers/gpu/nvgpu/common/linux/clk.c +++ b/drivers/gpu/nvgpu/common/linux/clk.c @@ -19,6 +19,7 @@ #include #include +#include #include "clk.h" #include "os_linux.h" @@ -86,6 +87,8 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g, static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct gk20a *g) { + struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g)); + /* * On Tegra platforms with GPCPLL bus (gbus) GPU tegra_clk clock exposed * to frequency governor is a shared user on the gbus. The latter can be @@ -95,6 +98,10 @@ static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct gk20a *g) return tegra_dvfs_get_fmax_at_vmin_safe_t( clk_get_parent(g->clk.tegra_clk)); + if (platform->maxmin_clk_id) + return tegra_bpmp_dvfs_get_fmax_at_vmin( + platform->maxmin_clk_id); + return 0; } diff --git a/drivers/gpu/nvgpu/common/linux/platform_gk20a.h b/drivers/gpu/nvgpu/common/linux/platform_gk20a.h index dec79b87..cdb221eb 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/common/linux/platform_gk20a.h @@ -65,6 +65,7 @@ struct gk20a_platform { * for filling this data. */ struct clk *clk[GK20A_CLKS_MAX]; int num_clks; + int maxmin_clk_id; #ifdef CONFIG_RESET_CONTROLLER /* Reset control for device */ diff --git a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c index 08c5df0f..df10e36c 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c @@ -24,6 +24,7 @@ #include #include +#include #include @@ -98,6 +99,13 @@ int gp10b_tegra_get_clocks(struct device *dev) } platform->num_clks = i; + if (platform->clk[0]) { + i = tegra_bpmp_dvfs_get_clk_id(dev->of_node, + tegra_gp10b_clocks[0].name); + if (i > 0) + platform->maxmin_clk_id = i; + } + return 0; } -- cgit v1.2.2