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* gpu: nvgpu: add init_pbdma_intr_desc fifo opsSeema Khowala2017-03-23
| | | | | | | | | | | | | | | | | | | | | | Init device_fatal, channel_fatal and restartable fifo intr pbdma s/w variables for pbdma_intr_0 interrupt masks for each GPU version separately pbdma_intr_0 field differences for each GPU version:- -gk20a : bit 28 does not exists in hw -gm20b : bit 8(lbreq), 20(xbarconnect) and 28 do not exist in hw -gp10b : bit 8(lbreq), 20(xbarconnect) do not exist in hw. bit 28, (syncpoint_illegal) added in hw but is not being handled. -gk20a/gm20b/gp10b bit 24 eng_reset and bit 25 semaphore always existed in hw but never handled JIRA GPUT19X-47 Change-Id: I209191f57c5ea5b15081b7dc2411801d3537017c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1325402 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add bus HALTerje Bergstrom2017-03-23
| | | | | | | | | | | Add bus HAL and move all bus related hardware sequencing to that file: BAR1 binding, timer access, and interrupt handling. Change-Id: Ibc5f5797dc338de10749b446a7bdbcae600fecb4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323353 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: split nvhost dependency on plat interfaceKonsta Holtta2017-03-23
| | | | | | | | | | | | | | | | | | Add CONFIG_TEGRA_GK20A_NVHOST and remove the TEGRA_GRHOST || TEGRA_HOST1X dependency in CONFIG_TEGRA_GK20A to allow using the iGPU without the nvhost driver. Use the new config to guard syncpt-related code. Also make TEGRA_ACR depend on GK20A too so that it aligns properly under gk20a in menuconfig. Bug 1853519 Change-Id: I9e9b0a7915d000aae7930821627b7a01d08d3f5c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321303 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: take power refcount in gk20a_cde_convert()Deepak Nibade2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a gk20a_busy() call in gk20a_buffer_convert_gpu_to_cde() and we again call gk20a_busy() in gk20a_submit_channel_gpfifo() If gk20a_do_idle() is triggered in between these two calls, then this leads to a deadlock and results in idle failure Hence to avoid this take power refcount in a more fine-grained way i.e. in gk20a_cde_convert() instead of taking in gk20a_buffer_convert_gpu_to_cde() Keep gk20a_cde_execute_buffer() out of the gk20a_busy()/ gk20a_idle() pair since we take power refcount in submit path anyways Add correct error handling path in gk20a_cde_convert() Bug 200287073 Change-Id: Iffea2d4c03f42b47dbf05e7fe8fe2994f9c6b37c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1324329 (cherry picked from commit ce057d784d40a6ce57e892d58e211ed2fd9826f8) Reviewed-on: http://git-master/r/1320408 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: hold mutex to get cde context onlyDeepak Nibade2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | In gk20a_cde_convert(), we hold cde_app.mutex almost for everything which is unnecessary Also, this causes a deadlock scenario when gk20a_do_idle() is called In some cases it is possible that Thread 1 holds the lock and is trying to power on GPU, and Thread 2 is trying to power off GPU and then grab cde_app.mutex to cleanup GPU state To fix this, grab the mutex only for gk20a_cde_get_context() and then release it Bug 200287073 Change-Id: Ic4856604652d0d4024abdeb5c2f8f03910c601a5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1324328 (cherry picked from commit 3c8eef0d0e9ef3307e2792e3e127c10f3ff118a7) Reviewed-on: http://git-master/r/1322030 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Remove 0x from function name printAlex Waterman2017-03-22
| | | | | | | | | | | | | | | | Remove an 0x that prepended a function name print (not a function address so the 0x is pretty silly). Bug 1799159 Change-Id: I208192e3cc22699dca13158ab3a33451cee843b0 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1320840 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: profiler create/free, hwpm reservePeter Daifuku2017-03-22
| | | | | | | | | | | | | | Add support for creating/freeing profiler objects, hwpm reservations Bug 1775465 JIRA EVLR-680 JIRA EVLR-682 Change-Id: I4db83d00e4b0b552b05b9aae96dc553dd1257d88 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1294401 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (pmgr/*)Alex Waterman2017-03-22
| | | | | | | | | | | | | | Use the new kmem API functions in pmgr/*. Bug 1799159 Bug 1823380 Change-Id: Idc410bc02f6b35d673a4ccdaaa6ab43348418263 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318314 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (volt/*)Alex Waterman2017-03-22
| | | | | | | | | | | | | | Use the new kmem API functions in volt/*. Bug 1799159 Bug 1823380 Change-Id: Ib7bb5b3b3b364ff6acf93f39a72aa5b0a704a3f8 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318313 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (channel)Alex Waterman2017-03-22
| | | | | | | | | | | | | | | | | | | Use the new kmem API functions in the channel and channel related code. Also delete the usage of kasprintf() since that must be paired with a kfree(). Since the kasprintf() doesn't use the nvgpu kmem machinery (and is Linux specific) instead use a small buffer statically allocated on the stack. Bug 1799159 Bug 1823380 Change-Id: Ied0183f57372632264e55608f56539861cc0f24f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318312 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (pci.c)Alex Waterman2017-03-22
| | | | | | | | | | | | | | | | | Really just delete the usage of kasprintf() since that must be paired with a kfree(). Since the kasprintf() doesn't use the nvgpu kmem machinery (and is Linux specific) instead use a small buffer statically allocated on the stack. Bug 1799159 Bug 1823380 Change-Id: Ic26f39da401df926024c67e8ff5d979f683a6d3e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318311 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (gm206/*)Alex Waterman2017-03-22
| | | | | | | | | | | | | | Use the new kmem API functions in gm206/*. Bug 1799159 Bug 1823380 Change-Id: I7117c3153d266f0ac72978e2b54f6d4921d919e5 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318310 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (gp10b/*)Alex Waterman2017-03-22
| | | | | | | | | | | | | | Use the new kmem API functions in gp10b/*. Bug 1799159 Bug 1823380 Change-Id: Ia643c704aca2e23e3762c9b7dbdf1aa1f2363811 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318309 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix kmem function definitionAlex Waterman2017-03-22
| | | | | | | | | | | | | | | Use the correct type for the size argument in __nvgpu_kmalloc() and make sure the size_t type is available for usage. Bug 1799159 Bug 1823380 Change-Id: I7d6aea964e065e576c8bc3383a9b2326639c018f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318308 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: adapt pwrpolicy code to vbios changesVijayakumar2017-03-22
| | | | | | | | | | | | | | | | | | VBIOS might change size of the power policy table and add new fields. So driver should validate a minimum size, not absolute size. Also driver should use header size from data read from vbios to parse the table further. bug 200287822 Change-Id: Ica60de444c3f81cbf61af8684ce4e32ae288188d Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1322242 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add mm ops for mmu_fault_pendingSeema Khowala2017-03-22
| | | | | | | | | | This change is needed for t19x mmu fault handling. Change-Id: I7f9190ab305f699401f6b0033b6a93dd8b4fc3cd Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1315201 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use dma-attr wrappers for K4.9 compatibilityKonsta Holtta2017-03-21
| | | | | | | | | | | | | | | | On kernel 4.9, the DMA API has changed, so use the NVIDIA compatibility wrappers from dma-attrs.h to allow the code to build for both 4.4 and 4.9. Bug 1853519 Change-Id: I0196936e81c7f72b41b38a67f42af0dc0b5518df Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321102 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: abstract away dma alloc attrsKonsta Holtta2017-03-21
| | | | | | | | | | | | | | | | | | | | | | | | Don't use enum dma_attr in the gk20a_gmmu_alloc_attr* functions, but define nvgpu-internal flags for no kernel mapping, force contiguous, and read only modes. Store the flags in the allocated struct mem_desc and only use gk20a_gmmu_free, remove gk20a_gmmu_free_attr. This helps in OS abstraction. Rename the notion of attr to flags. Add implicit NVGPU_DMA_NO_KERNEL_MAPPING to all vidmem buffers allocated via gk20a_gmmu_alloc_vid for consistency. Fix a bug in gk20a_gmmu_alloc_map_attr that dropped the attr parameter accidentally. Bug 1853519 Change-Id: I1ff67dff9fc425457ae445ce4976a780eb4dcc9f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321101 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: only report SUPPORT_SYNC_FENCE_FDS if enabledKonsta Holtta2017-03-21
| | | | | | | | | | | | | | Don't always report in gpu characteristics that NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS is supported, but only if CONFIG_SYNC is enabled. Bug 1853519 Change-Id: Ie7d021aefe97b7a2b04a25957ae678272ad446f7 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1323130 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Don't query engine id for inval engineTerje Bergstrom2017-03-21
| | | | | | | | | | | | | | | | When we get a PBDMA MMU fault, we won't be able to map the MMU id into an engine id for reset. We still pass FIFO_INVAL_ENGINE_ID to gk20a_fifo_should_defer_engine_reset() which causes an unnecessary debug spew. Check for FIFO_INVAL_ENGINE before calling gk20a_fifo_should_defer_engine_reset(). Change-Id: I6f4a49be194cbc6070c1a1c667059de2ea79790f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321492 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add is_preempt_pending fifo opsSeema Khowala2017-03-21
| | | | | | | | | | | | | is_preempt_pending fifo ops is added as t19x preempt done sequence is differnt than legacy chips. Change-Id: I6b46be1f5b911ae11bbe806968cb8fabb21848e0 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1309678 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: check return value of mutex_init in CE2 codeDeepak Nibade2017-03-21
| | | | | | | | | | | | | | | - check return value of nvgpu_mutex_init in ce2_gk20a.c - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: Iedaa4e182f23ecacf7c2c4e073317d48416ebc8f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1321288 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: check return value of mutex_init in CDE codeDeepak Nibade2017-03-21
| | | | | | | | | | | | | | | - check return value of nvgpu_mutex_init in cde_gk20a.c - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: I99f59d191cc81eff4a330557b864925d36fc4b3d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1321287 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move sim support to its own fileTerje Bergstrom2017-03-21
| | | | | | | | | | | Simulator support is intermixed with the rest of code in gk20a.c. Move that code away from gk20a.c to an own file. Change-Id: Idd3c8795cec5eadc6e49811b5b8ff0592c49a7d2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323230 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: gp10b: Remove checks for privsec on vgpuTerje Bergstrom2017-03-20
| | | | | | | | | | | | | In virtualized platform we don't have access to fuses. Skip reading fuse and set priv security unconditionally. Change-Id: Idcb2670ed48a5edb760e49a6d136d53e05bc34ef Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323283 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com> Tested-by: Richard Zhao <rizhao@nvidia.com>
* gpu: nvgpu: Remove ELPG_FLUSHTerje Bergstrom2017-03-20
| | | | | | | | | | | | ELPG_FLUSH is not accessible in later GPUs, so we stopped using it and instead do explicit CBC and L2 flushes. Delete the unused function op and backing code. Change-Id: Ic3eb97f2d32ea8fdbe5ec57bd9254268caaf9935 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323236 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add refcounting to driver fdsDavid Nieto2017-03-20
| | | | | | | | | | | | | | | | | The main driver structure is not refcounted properly, so when the driver unload, file desciptors associated to the driver are kept open with dangling references to the main object. This change adds referencing to the gk20a structure. bug 200277762 JIRA: EVLR-1023 Change-Id: Id892e9e1677a344789e99bf649088c076f0bf8de Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1317420 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix arbiter teardown on PCIDavid Nieto2017-03-20
| | | | | | | | | | | | | | | | The driver is not properly tearing down the arbiter on the PCI driver unload. This change makes sure that the workqueues are drained before tearing down the driver bug 200277762 JIRA: EVLR-1023 Change-Id: If98fd00e27949ba1569dd26e2af02b75897231a7 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1320147 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add fifo ops for intr_0_error_maskSeema Khowala2017-03-20
| | | | | | | | | | This change is required to support t19x mmu fault Change-Id: I3953dcf02c71ace606ba81896e56ea98683eb2ca Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1313482 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: del channel job before fence is closedPeter Daifuku2017-03-17
| | | | | | | | | | | | | | | | | | | In gk20a_channel_clean_up_jobs, move removal of job from channel's job list to before fences are cleaned up; this will prevent gk20a_channel_abort from asynchronously trying to dereference an already freed job. Bug 1844305 JIRA EVLR-849 Change-Id: I1ba05237aa74be1350007630bfa5eba9988f859a Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> (cherry picked from commit 2a9ce58b1b318b95ecfcdf78462f918d090eab99) Reviewed-on: http://git-master/r/1319026 (cherry picked from commit 990f070b0a363159ce1b21f936b7512f469018ca) Reviewed-on: http://git-master/r/1321624 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move all FB programming to FB HALTerje Bergstrom2017-03-17
| | | | | | | | | | | | | | | | | | | | | Move all programming of FB to fb_*.c files, and remove the inclusion of FB hardware headers from other files. TLB invalidate function took previously a pointer to VM, but the new API takes only a PDB mem_desc, because FB does not need to know about higher level VM. GPC MMU is programmed from the same function as FB MMU, so added dependency to GR hardware header to FB. GP106 ACR was also triggering a VPR fetch, but that's not applicable to dGPU, so removed that call. Change-Id: I4eb69377ac3745da205907626cf60948b7c5392a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321516 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use $(srctree) properly in makefileKonsta Holtta2017-03-17
| | | | | | | | | | | | Fix include paths for kernel 4.9 and clean up some unnecessary ones. Bug 1853519 Change-Id: Ic9dc865654e593f4ed92e88863bca87d850aab3c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321226 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: don't read missing gpc_tpc_count in dumpKonsta Holtta2017-03-17
| | | | | | | | | | | | | The gp10b gr status dump can get printed so early that this array is null, so don't access it in that case. Bug 1853519 Change-Id: I7474a7f7c50f89aea4ef8e9b16cb1644355e415b Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321119 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove use of PM runtime in VPR fetchTerje Bergstrom2017-03-17
| | | | | | | | | | | | | VPR fetch is called only from code which already has GPU powered on. Skip calling PM runtime. Change-Id: I8f90f1afab150e81ad16a157cfe063848a3e4fc1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1320732 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
* gpu: nvgpu: Implement get_rate/set_rate as GPU opTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | | | | | | Move clock APIs from gk20a_platform to gpu_ops. At the same time allow use of internal get_rate/set_rate for querying both GPCCLK and PWRCLK on iGPU. At the same time we can replace calls to clk framework with the new HAL and drop direct dependency to clk framework. gp10b ops were replaced as a whole at HAL initialization. That replaces anything set in platform probe stage, so reduce that to touch only clock gating regs. Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300113 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move platform files to Tegra LinuxTerje Bergstrom2017-03-16
| | | | | | | | | | | | Platform files are used for adding code to probe for Tegra Linux platform. Move the files to Tegra Linux directory to make this clear. Change-Id: Ida66af835688325f095260c618dad90395851267 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300112 Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Rename clk->get_rate to measure_freqTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | get_rate is already used for call-back that queries the last set clock rate. This instance of get_rate actually measures the frequency so renaming it to measure_freq. At the same time modify to use hertz instead of megahertz. We use fractional megahertz already in GPU. Change-Id: I387473d6a6cbf3bb9b9e5a909677a1a725403c32 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300111 Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: Fix timers failure addressAlex Waterman2017-03-16
| | | | | | | | | | | | | | | | | | In the timers code a macro was using __builtin_return_address(0) when it should have been using _THIS_IP_. __builtin_return_address(0) will cause the timers code to print the return address of the function that calls the timers code. This isn't actually useful, of course. A user actually cares about where the timers code call comes from which is easily obtained with _THIS_IP_. Bug 1799159 Change-Id: Iac16bc79e89e4cd18133db3d20f5a50d4d5e8f31 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1320839 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cancel vidmem worker only if supportedKonsta Holtta2017-03-16
| | | | | | | | | | | | | | | | Cancel the vidmem.clear_mem_worker during suspend only if vidmem is enabled via kernel config. Otherwise it's not initialized. Bug 1853519 Change-Id: If88c756ae14f348eddda01218fa218480217388c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321118 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: avoid double-free of incr cmdKonsta Holtta2017-03-16
| | | | | | | | | | | | | | | | The call site (gk20a_submit_prepare_syncs) owns the incr_cmd buffer passed to __gk20a_channel_semaphore_incr. Delete the free in the error path of the latter case to avoid freeing the same buffer twice. Bug 1853519 Change-Id: I9b90ce7ebb17ac63992938c7f9fe90bbd139f85f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321117 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use GPU's own fuse registersTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | | | Read fuse values from GPU's own fuse registers instead of Tegra fuse registers whenever possible. This reduces the number of dependencies to Linux fuse code. Some fuses do not have a corresponding register in GPU, so they're left as is. Change-Id: Id9f2f4da897f3e20b20c300a67f705e3fa5ba35a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1318278 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
* gpu: nvgpu: vgpu: force gpu preepmtion policyAparna Das2017-03-14
| | | | | | | | | | | | | | | | | | Query the RM server to retrieve gpu preemption policy of guest based on pct configuration. If guest is not allowed to request wfi preemption mode then set context with either gfxp or cta preemption mode only. Jira VFND-3079 Jira VFND-3081 Change-Id: I60cbf121d6f0e2373568cf40b3dfdb4df76fe02d Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: http://git-master/r/1280903 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Sachit Kadle <skadle@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: gp10b: fix stall interrupt enablementSeema Khowala2017-03-14
| | | | | | | | | | | Currently priv, pbus and ltc interrupts are enabled as non-stall but being handled in stall isr. Fix is to configure them as stall interrupt. Change-Id: I78a0ad3eb4207dcd70da63098234ed6139f0664a Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1320031 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: channel_from_inst_ptr renamed and made non staticSeema Khowala2017-03-14
| | | | | | | | | | required to support t19x mmu fault Change-Id: Ibe621d924717696a359d7e2065beb6501a9f9b5e Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1315928 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove unused function gk20a_get_phys_from_iovaTerje Bergstrom2017-03-14
| | | | | | | | | | | | Remove unused function gk20a_get_phys_from_iova. At the same time remove the #include for iommu.h, which was only needed by this function. Change-Id: Ia858b0ad5fe7e423d650aa9f82e430f419f2a492 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1319070 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Do not use pm_runtime calls directlyTerje Bergstrom2017-03-14
| | | | | | | | | | | | mm_gk20a.c had direct calls to pm_runtime_put_noidle(). Replace them with calls to wrapper gk20a_idle_nosuspend() to prevent unnecessary dependencies to Linux. Change-Id: Iaf8b9255750be2f3e1aa39587c1a4a3cbeacc67f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1319069 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Do not query SEC2 freq from CCFTerje Bergstrom2017-03-14
| | | | | | | | | | | | | | | | | | | dGPU's SEC2 is passed frequency, which is queried with clk_get_rate(). dGPU clocks are not represented in CCF, so the query always returned an error. The value is ignored, so this went unnoticed. Replace the call to clk_get_rate() by just hard coding 0 as the clock rate. Change-Id: I86fec3726d2b6683cdadd86cab1672f3b199378f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1319068 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Navneet Kumar <navneetk@nvidia.com>
* Revert "gpu: nvgpu: change stall intr handling order"Rajkumar Kasirajan2017-03-14
| | | | | | | | | | | | | This reverts commit 35f0cf0efefe4a64ee25a5b118338b15e552dcb0 as it caused lp0 suspend/resume failure. Bug 1886110 Change-Id: Ib62207650344180361b6529f716f77b84528cd56 Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-on: http://git-master/r/1317986 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check return value of mutex_init for channel/TSGDeepak Nibade2017-03-14
| | | | | | | | | | | | | | - check return value of nvgpu_mutex_init for all the mutexes of a channel and TSG - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: Iba3a5f8bc2261ec684b300dd4237ab7d22fa3630 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1317139 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check return value of mutex_init for semaphoresDeepak Nibade2017-03-14
| | | | | | | | | | | | | | | - check return value of nvgpu_mutex_init for semaphores - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: I5404dbd29e3fce29f1a445eb2e6ce8e1d1b616c4 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1317138 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Navneet Kumar <navneetk@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 23:40:37 -0400