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* gpu: nvgpu: reg with FECS HALT methodSupriya2016-12-27
* gpu: nvgpu: gp10b: dump GR status registersDeepak Nibade2016-12-27
* gpu: nvgpu: gp10b: use tight loop for fecs methodVijayakumar2016-12-27
* gpu: nvgpu: headers for linsim CL 34116551Peng Du2016-12-27
* gpu: nvgpu: gp10b: Enable debug spewTerje Bergstrom2016-12-27
* gpu: nvgpu: enable CDE for t18xJussi Rasanen2016-12-27
* gpu: nvgpu: read gobs_per_comptagline_per_sliceJussi Rasanen2016-12-27
* gpu: nvgpu: gp10b: Compression page size to 64kTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Add Bar2 supportSeshendra Gadagottu2016-12-27
* gpu: nvgpu: gp10b: enable replayable fault interruptSeshendra Gadagottu2016-12-27
* gpu: nvgpu: headers for linsim CL 34000094Adeel Raza2016-12-27
* gpu: nvgpu: gp10b: update headersSeshendra Gadagottu2016-12-27
* gpu: nvgpu: gp10b: Enable cycling through ctx binsTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Default page size 64kBTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Fix L2 size calculationTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Enable CILP mode for computeTerje Bergstrom2016-12-27
* gpu: nvgpu: Handle MC pmu interruptsMahantesh Kumbar2016-12-27
* gpu: nvgpu: gp10b: gpmu elpg supportMahantesh Kumbar2016-12-27
* gpu: nvgpu: Implement gp10b context creationTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Correct SMMU bit numberTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Change order of alpha & betaTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Program CB sizesTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Implement SW methodsTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Calc global context buffer sizeTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Add new supported kindTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Define pagepool sizeTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Define physical address widthTerje Bergstrom2016-12-27
* gpu: nvgpu: Write ZBC registers to DSSTerje Bergstrom2016-12-27
* gpu: nvgpu: Define gp10b big page sizeTerje Bergstrom2016-12-27
* gpu: nvgpu: Add SM registersTerje Bergstrom2016-12-27
* gpu: nvgpu: Use queried interrupt idsTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Implement L2 queryTerje Bergstrom2016-12-27
* gpu: nvgpu: headers for linsim CL 33823014Adeel Raza2016-12-27
* gpu: nvgpu: gp10b: Enable interrupts in linsimTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Fill class numbersTerje Bergstrom2016-12-27
* gpu: nvgpu: Add own platform data to enable host1xTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b: Add SM debug registersTerje Bergstrom2016-12-27
* gpu: nvgpu: gp10b specific CB callbacksTerje Bergstrom2016-12-27
* gpu: nvgpu: Implement gp10b intr processingTerje Bergstrom2016-12-27
* gpu: nvgpu: t18x, gp10b frameworkKenneth Adams2016-12-27
* gpu: nvgpu: Synchronize gp10b headers with gm20bTerje Bergstrom2016-12-27
* gpu: nvgpu: headers for linsim CL 33759297Adeel Raza2016-12-27
* gpu: nvgpu: headers for linsim CL 33688874Adeel Raza2016-12-27
* gpu: nvgpu: gp10b headersKen Adams2016-12-27
* gpu: nvgpu: acquire mutex for notifier readDeepak Nibade2016-12-27
* gpu: nvgpu: set driver unload flag in shutdownDeepak Nibade2016-12-27
* gpu: nvgpu: gk20a: Allow regops lists longer than 128Sami Kiminki2016-12-26
* gpu: nvgpu: PG statistics updateMahantesh Kumbar2016-12-26
* gpu: nvgpu: MSCG supportMahantesh Kumbar2016-12-26
* gpu: nvgpu: rppg supportMahantesh Kumbar2016-12-26
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