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* gpu: nvgpu: Add busy/idle ref countingAlex Waterman2016-12-19
| | | | | | | | | | | | | | | | Add reference counting for gk20a_busy() and gk20a_idle() so that the driver can keep track of whether the driver is active. Bug 1816516 Bug 1807277 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1250019 (cherry picked from commit 7f558019735bb34cf00dd1ec17df1797501cff60) Change-Id: I64c2ff1719673912ae127707e58ee557966c4d4d Reviewed-on: http://git-master/r/1261922 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add tsg_open HAL interfaceSachit Kadle2016-12-19
| | | | | | | | | | | | | | | | | | Add HAL interface for TSG open, which is intended to be called from the exisiting gk20a_tsg_open function. The tsg_open entryoint is only implemented for vgpu, as the server needs to clear metadata when a tsg is opened. Bug 200215060 Change-Id: Icc8fd602f31e52d9fa9b2e7786b665b9e7b9294e Signed-off-by: Sachit Kadle <skadle@nvidia.com> Reviewed-on: http://git-master/r/1249218 (cherry picked from commit 35c86f7c796c6574d3dc336e20012ea5c16d7cb4) Reviewed-on: http://git-master/r/1256468 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: pci: disable elcg for dGPUsVijayakumar2016-12-19
| | | | | | | | | | | | bug 200245907 Change-Id: Ia10faf764a4b2378115c41d5e3a19a65b7bf2ddd Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1240623 (cherry picked from commit be278f2913c92ec1dfb83f9f5224d3de10a8defc) Reviewed-on: http://git-master/r/1248740 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: update vsms_mapping ioctlPeter Daifuku2016-12-17
| | | | | | | | | | | | | | | Update vsms_mapping ioctl to copy from the internal sm_to_cluster array to new nvgpu_gpu_vsms_mapping_entry array before copying the latter back to user. Bug 200260086 Change-Id: I0fccc6fb6e0d6b6f737b3a44818d2b47438cd3c8 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1266174 (cherry picked from commit e28882c05491cb8f9573ff71c2d7309e5714e385) Reviewed-on: http://git-master/r/1269623 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: handle vf curve change due to tempVijayakumar2016-12-15
| | | | | | | | | | | | | | | | | | | JIRA DNVGPU-129 1)Add function hook for PMU VFE event handler which will do for VF curve re-evaluation 2)Add function hook to send temperature limit of GPU sensor 3)Call VFE event handler from PMU's event handle function Change-Id: I2e3577d3d895e97e6ad06e92f0f4827f9855d0b6 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1245393 (cherry picked from commit 1a5c6c32cdec73fb23735430f43577eda675e5af) Reviewed-on: http://git-master/r/1268060 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add device alarmsThomas Fleury2016-12-15
| | | | | | | | | | | | | | | | | | | Add event definitions for: - Clock alarm (target frequency not met) - Thermal alarm (temperature above threshold) - Power alarm (power above threshold) - GPU shut down Jira DNVGPU-186 Change-Id: I52edd44352ed0cba83033949272f41cc9e1c630f Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1249342 (cherry picked from commit 67a6681aade241ff24982771778f7e2193d1cd7f) Reviewed-on: http://git-master/r/1267157 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: support negative temperaturesThomas Fleury2016-12-15
| | | | | | | | | | | | | Jira DNVGPU-166 Change-Id: Id0561d49c64096ad5cbcd23bd371b49b2e0db57c Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1245557 (cherry picked from commit 2e0269c76fdda5c8e1a30ca7ef73a08ebe644f88) Reviewed-on: http://git-master/r/1267156 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: store last_freq in gk20a structDeepak Nibade2016-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In gk20a_scale_target(), to check for duplicate freq requests we compare current frequency with devfreq->previous_freq But for very first request after boot, we have devfreq->previous_freq set to MIN freq And in case we evaluate new frew as MIN freq then we skip calling postscale() and scaling of EMC clock This results in keeping EMC at MAX value To fix this, add new variable last_freq in gk20a structure. Use this variable to store frequency value and to compare for duplicate requests Bug 200255163 Bug 200257544 Change-Id: Icfc57234c63f68cce8ccf8221237105272dad853 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1263747 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: read effective frequency from counterDavid Nieto2016-12-09
| | | | | | | | | | | | | | | JIRA DNVGPU-164 Adding export functions to gk20a and gk20a_clk structure Change-Id: Ia448f17a6c456139544c1d36a3e17ceec0edd2f6 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239465 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1268000 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: pmu version updateMahantesh Kumbar2016-12-09
| | | | | | | | | | | | | JIRA DNVGPU-71 Change-Id: I08668e17a258fe7c025c79ee2e00a0f4d7cb8a2d Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1243834 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267999 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: get voltage, current, power and temperatureThomas Fleury2016-12-09
| | | | | | | | | | | | | | | | Add ioctls to retrieve voltage, current, power and temperature. Add flags in GPU characteristics to indicate if feature is supported. Jira DNVGPU-166 Change-Id: Idd5a767326c9d43630e8289ca7d2c27bb96a9f14 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1241862 Tested-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1267153
* nvgpu: gpu: arbiter for vf switch managementDavid Nieto2016-12-09
| | | | | | | | | | | | | | | | | | | JIRA DNVGPU-143 (1) Added conversion routines in ctrl_gk20a.c to do conversions between Hz and MHZ (2) Use new api to prevent corruption of requests is multiple threads on same session commit simultaneously Change-Id: I87875e593d2cc90647d5c4f60a4e293ed3ea6b83 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239460 Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267152 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: add clocks control capabilityThomas Fleury2016-12-09
| | | | | | | | | | | | | | | Add NVGPU_GPU_FLAGS_SUPPORT_CLOCK_CONTROLS bit to allow user library to determine if GPU supports clock control ioctls. Jira DNVGPU-125 Change-Id: Ia09808ed36aa85a7c520039bb336888e2b467076 Signed-off-by: David Martine Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239379 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267154 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Use end of vidmem as bootstrap regionTerje Bergstrom2016-12-09
| | | | | | | | | | | | | | | | | Instead of hard coding bootstrap region, it should always be set to the last 256MB of vidmem. Bug 200244445 Change-Id: I91779d1bf861f4f23a0b646f70b1febbbc4581b5 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1242409 Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-on: http://git-master/r/1267124 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix timeout retry usage in mm_gk20a.cKonsta Holtta2016-12-09
| | | | | | | | | | | | | | | | | | | | | | | Loop conditions of timeout checking introduced in commit 21094783114b9314d57f412196544a34b3a40f4a ("gpu: nvgpu: Use timeout retry API in mm_gk20a.c") were flipped by accident, so each usage in a loop actually did not wait enough but ran only one iteration. Fix the conditions to loop as long as the timeout is NOT expired. Also restore l2 flush timeout to 10 ms from 1, which was done in commit 030ef82bdd474ef4261a2f40995b8db57857899e ("gpu: nvgpu: increase l2 flush timeout") but overwritten by the above "use timeout" commit. Bug 200260715 Change-Id: I0db16be79a1a27caa3d97fac9d4361582cc232e8 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1268482 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Enable signed versus non-signed errorsTerje Bergstrom2016-12-08
| | | | | | | | | | | Fix a few trivial signed versus unsigned problems, and enable compilation flag to treat them as errors. Change-Id: I68cc327885ef1efb12db7f347a2699a65415f889 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1265291 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix pes_tpc_countPeter Daifuku2016-12-08
| | | | | | | | | | | | | | | | | In calculation of pes_tpc_count, accumulate the number of PEs with TPCs connected to them instead of using the architectural maximum number. Bug 200250616 Change-Id: I4b2edc420ac03e24f2c298587d4dd1d77c51f5d6 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1262642 (cherry picked from commit 65723cf5be8fe24bcaf56570883f0880a198efcb) Reviewed-on: http://git-master/r/1263958 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: fix va leak when call gk20a_vm_free_vaRichard Zhao2016-12-08
| | | | | | | | | | | | | | | | page size index needs to be set explicitly when call gk20a_vm_free_va. Bug 200255799 JIRA VFND-3033 Change-Id: I376c63e724b8f59aee389c54ca1589683536f043 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1262586 (cherry picked from commit 82c05633f17fa094d8e08c8a0fa4bad2d3275268) Reviewed-on: http://git-master/r/1263403 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: check untrusted num_entries for clock controlsThomas Fleury2016-12-07
| | | | | | | | | | Jira DNVGPU-125 Change-Id: I0e547b05d57c08f76327869c189498e82f4ffd1a Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1244916 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix clock controls compileThomas Fleury2016-12-07
| | | | | | | | | | | | | Add clock controls only for ARCH_T18x and later. Jira DNVGPU-125 Change-Id: Iab7c831aec925253dd3d9336c653305cb96e052c Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1244932 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: update clock controlsThomas Fleury2016-12-07
| | | | | | | | | | | | | | | | | | | Install one completion fd per SET request. Notifications on dedicated event fd. Changed frequencies unit to Hz from MHz. Remove sequence numbers from dummy arbiter. Added effective clock type (query frequency from counters). Jira DNVGPU-125 Change-Id: Ica364eccdf85b188fd208f770e4eae0e9f0379e9 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1230224 (cherry picked from commit f9b06686c090c676e60e1e137fdc9bbfc76d4843) Reviewed-on: http://git-master/r/1243109 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: flags to query specific clk domainsThomas Fleury2016-12-07
| | | | | | | | | | | | | | | | | | Added NVGPU_GPU_CLK_FLAG_SPECIFIC_DOMAINS to indicate that a request (get clock info/range) applies only to domains specified in clock entries. If flag is not set, request returns all clock domains. Jira DNVGPU-125 Change-Id: I11bffbdf491ebffa7f47bd327037b0b8cfcbde31 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1227998 (cherry picked from commit 7613dd30e120a82d342da402b4e0b070512dddad) Reviewed-on: http://git-master/r/1243108 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: ioctls for clock controlsThomas Fleury2016-12-07
| | | | | | | | | | | | | | | | | | Add ioctls for clock range and VF points query. Add ioctls to set target mhz, and get actual mhz. Jira DNVGPU-125 Change-Id: I7639789bb15eabd8c98adc468201dba3a6e19ade Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1223473 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> (cherry picked from commit 5e635ae34221c99a739321bcfc1418db56c1051d) Reviewed-on: http://git-master/r/1243107 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use timeout retry API in mm_gk20a.cAlex Waterman2016-12-05
| | | | | | | | | | | | | | Use the retry API that is part of the nvgpu timeout API to keep track of retry attempts in the vrious flushing and invalidating operations in the MM code. Bug 1799159 Change-Id: I36e98d37183a13d7c3183262629f8569f64fe4d7 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1255866 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use timeout API in PMU codeAlex Waterman2016-12-05
| | | | | | | | | | | | | | Instead of using custom code for timeout monitoring use the generic timeout API for nvgpu. Bug 1799159 Change-Id: If77e67b2d8678b824d6948620003d3892d5f41d2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1255865 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add timeout APIAlex Waterman2016-12-05
| | | | | | | | | | | | | | | | | | | | | Add a timeout API to nvgpu since this is a common operation done all across the nvgpu driver. Also add two new directories for this common code: drivers/gpu/nvgpu/common drivers/gpu/nvgpu/include/nvgpu The common directory is for common C code. The include directory is for common include files. Bug 1799159 Change-Id: I8b710eecaa75c0707df83f859fb28484525185a6 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1255864 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Wait for full UDE completionTerje Bergstrom2016-12-05
| | | | | | | | | | | | | | | | | devinit signals completion even before the full UDE script has been executed. Wait for both devinit complete & PMU halt to make sure UDE is fully completed. Bug 200244445 Change-Id: Iaec27d9fc312f282a778aabbbe8b75d85e7a0a87 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1242253 (cherry picked from commit a013029e48fcc83f670bfd0e82da035fa41d6030) (cherry picked from commit e742842eb4fbcefdc5bb88b2f7b3055a1a60652b) Reviewed-on: http://git-master/r/1263293 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: fix hardcoded page size referenceKrishna Reddy2016-12-05
| | | | | | | | | | | | Bug 1843356 Bug 1769772 Change-Id: I6c2a3a72f7082074bbf1165a74d5070195e1e653 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/1258352 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: Get rid of include of mach/clk.hLaxman Dewangan2016-12-05
| | | | | | | | | | | | | | mach/clk.h just include the linux/clk/tegra.h and hence directly include this header instead of via mach/clk.h. bug 200259459 Change-Id: Ia84c325309c308e02bb5dc1a8b32ef669053f439 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1264322 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: enable gm20b clk APIs for CCFDeepak Nibade2016-12-02
| | | | | | | | | | | | | | | | | | | | | | GM20B platform specific clk API should now support both Tegra Clock Framework and Common Clock Framework Hence enable those APIs for both TCF and CCF Bug 200256389 Bug 200233943 Change-Id: If0f0568c7779e4ea16cf5e3b3e2380cf9c4cd697 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1262892 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com> Tested-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: increase l2 flush timeoutseshendra Gadagottu2016-12-02
| | | | | | | | | | | | | | | Under heavy throttling case gpu runs 8 times slower. This is making l2 flush to timeout, to avoid this increase timeout to 10msec from 1msec. Bug 1787261 Change-Id: Ia112ce968c136135ccb9df4a7364073103684403 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1216559 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix enable engine activitySeema Khowala2016-12-02
| | | | | | | | | | | | | | | | | fifo_sched_disable_true_v() returns 1 and this value is being right shifted by runlist_id. This will work only if runlist_id is 0. For runlist_id other than 0, 1 right shifted by runlist_id will return 0 and engine will remain disabled. fifo_sched_disable_true_v() should be left shifted by runlist_id to fix the bug. Change-Id: If747035b9f6c80a21a67c63e27fb214223a55d4d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1257344 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: enable FECS traces by defaultThomas Fleury2016-12-02
| | | | | | | | | | | | | Compile FECS ctxsw tracing code by default. GPU that support this feature implement ops.fecs_trace.init() function Bug 1739908 Change-Id: Ie347524e788614bc94fc119cd48f740e2998c2be Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1255941 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix deadlock between clean up and timeout workerDeepak Nibade2016-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case one job completes just around timeout boundary, it is possible that we launch both clean up worker and timeout worker for same job Then in clean up worker we try to cancel timeout worker, and in timeout worker we try to wait for clean up to finish which leads to deadlock with below stacks stack 1: [<ffffffc0000bb484>] cancel_delayed_work_sync+0x10/0x18 [<ffffffc0004f820c>] gk20a_channel_cancel_job_clean_up+0x20/0x44 [<ffffffc0004fc794>] gk20a_channel_abort_clean_up+0x34/0x31c [<ffffffc0004fcb30>] gk20a_channel_abort+0xb4/0xc0 [<ffffffc0004f3d18>] gk20a_fifo_recover_ch+0x9c/0xec [<ffffffc0004f3f04>] gk20a_fifo_force_reset_ch+0xdc/0xf8 [<ffffffc0004fa8c4>] gk20a_channel_timeout_handler+0xf8/0x128 stack 2: [<ffffffc0000bb484>] cancel_delayed_work_sync+0x10/0x18 [<ffffffc0004f82c4>] gk20a_channel_timeout_stop+0x40/0x60 [<ffffffc0004fc488>] gk20a_channel_clean_up_jobs+0x7c/0x238 To fix this, cancel the timeout worker in gk20a_channel_update() itself instead of cancelling in gk20a_channel_clean_up_jobs() Bug 200246829 Change-Id: Idef9de3cae29668f4e25beb564422cf2e3736182 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1259963 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix dGPU support rule for T18xThomas Fleury2016-11-30
| | | | | | | | | | | | | | | | | Fix typo for GK20A_PCI dependency on ARCH_TEGRA_18x_SOC. Bug 200251486 Change-Id: I9210fb88b6b25fbddd14353a86c6f0eb4fd7d209 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1258436 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Lawrence Ibarria <libarria@nvidia.com> Reviewed-by: Hugo Lin <hugol@nvidia.com> Tested-by: Hugo Lin <hugol@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: chip specific channel commit_instseshendra Gadagottu2016-11-30
| | | | | | | | | | | | | Add function pointer to add chip specific commit_inst. Update this function pointer for gk20a and gm20b. JIRA GV11B-21 Change-Id: Iae7231fae70c7b4f56647fe242776670675de3fd Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1258275 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: API to access fb memoryDeepak Nibade2016-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IOCTL API NVGPU_DBG_GPU_IOCTL_ACCESS_FB_MEMORY to read/write fb/vidmem memory Interface will accept dmabuf_fd of the buffer in vidmem, offset into the buffer to access, temporary buffer to copy data across API, size of read/write and command indicating either read or write operation API will first parse all the inputs, and then call gk20a_vidbuf_access_memory() to complete fb access gk20a_vidbuf_access_memory() will then just use gk20a_mem_rd_n() or gk20a_mem_wr_n() depending on the command issued Bug 1804714 Jira DNVGPU-192 Change-Id: Iba3c42410abe12c2884d3b603fa33d27782e4c56 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1255556 (cherry picked from commit 2c49a8a79d93fc526adbf6f808484fa9a3fa2498) Reviewed-on: http://git-master/r/1260471 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: fix setup_rop_mapping for gm20b+Konsta Holtta2016-11-29
| | | | | | | | | | | | | | | | | | | gm20b_init_gr does not inherit the ops set by gk20a_init_gr_ops, and the gr.setup_rop_mapping HAL was not set there, so it was not set for chips that inherit from gm20b_init_gr and do not override it explicitly. Set the pointer in gm20b_init_gr, which other chips inherit, and delete the surrounding if condition from the call, making sure that future users always call it, because there is an implementation since the earliest supported chip. Bug 1833382 Change-Id: I7893c9aac7c5c49ce9a55031ea6baa9382a1b7ca Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1258960 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: register clkdev for DVFS purposesPeter De Schrijver2016-11-29
| | | | | | | | Change-Id: I354d4bbddb2aba2a1a668cc0401437f1e2403b79 Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-on: http://git-master/r/1259495 GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
* gpu: nvgpu: hardcode gk20a/gm20b fbpa valuesPeter Daifuku2016-11-22
| | | | | | | | | | | | | | | | gk20a/gm20b do not have an fbpa unit, although the hw header files claim they do. Hardcode all fbpa values to 0. Bug 200249125 Change-Id: I4afb29795199552979247de7c76b6b55ea4f368f Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1256420 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: chip specific init_inst_blockseshendra Gadagottu2016-11-21
| | | | | | | | | | | | | Add function pointer to add chip specific init_inst_block. Update this function pointer for gk20a and gm20b. JIRA GV11B-21 Change-Id: I74ca6a8b4d5d1ed36f7b25b7f62361c2789b9540 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1254875 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: free veid bundle init dataseshendra Gadagottu2016-11-21
| | | | | | | | | | | | | During gk20a_remove_gr_support, free veid bundle init data. JIRA GV11B-21 Change-Id: Ie1ea7387202c0bae55d5e5f0e1827b5b7b826e96 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1254869 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix error handling bugSachit Kadle2016-11-21
| | | | | | | | | | | | | | | | | | This change fixes error handling logic in gk20a_alloc_channel_gpfifo(). In cases, where we don't allocate a channel_sync at gpfifo allocation time, we shouldn't attempt to destroy it while handling an error. Bug 200253447 Change-Id: I57a78c74bbce84fa17fb0360c59b8f413a9124a7 Signed-off-by: Sachit Kadle <skadle@nvidia.com> Reviewed-on: http://git-master/r/1255858 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: FBPA broadcast supporttk2016-11-17
| | | | | | | | | | | | | | | | Add FBPA broadcast support to hwpm regops Bug 200249125 Change-Id: Iaf413a162a8985bcce94ff96ec6318e129609c4c Signed-off-by: Tejaswi K <tk@nvidia.com> Reviewed-on: http://git-master/r/1247408 (cherry picked from commit 4e0a805f5a8762d1a90f3b5dd76902a04941d9ef) Reviewed-on: http://git-master/r/1252160 Tested-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix gpc addr determinationPeter Daifuku2016-11-17
| | | | | | | | | | | | | | | | Fix pri_is_gpc_addr: determines whether a register offset is a GPC address. Needed for: Bug 200249125 Change-Id: I8322efc95cb8d02fa42b916f6649d9fa3f93171c Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1255061 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Expose boot freq as max freq for dGPUTerje Bergstrom2016-11-17
| | | | | | | | | | | | | | | On dGPU so far we boot only at maximum GPC2CLK frequency. Expose that as maximum clock rate to user space. Bug 200251486 Change-Id: Ie3463782a0e36028074325ce652c7ef554f6ea2c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252907 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Enable dGPU support only on T18xTerje Bergstrom2016-11-17
| | | | | | | | | | | | | | We build all necessary components only on builds with T18x support. Bug 200251486 Change-Id: I927ceecbbc8c9e83ee84656fb4a8643356f224ec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1253632 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: use define macros for litter valuesseshendra Gadagottu2016-11-17
| | | | | | | | | | | | | | | | Instead of using enum type for litter values, use define macros. This will fix: 1. Resolve ambiguity associated with enum type size. 2. Litter values can be extended easily in future chips. JIRA GV11B-21 Change-Id: Idca5144ea3754820c67831a716bb0aaf2e375eb2 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1254854 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix signed comparison bugsTerje Bergstrom2016-11-17
| | | | | | | | | | | | Fix small problems related to signed versus unsigned comparisons throughout the driver. Bump up the warning level to prevent such problems from occuring in future. Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252068 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: set clk_rate on frequency changeSachit Kadle2016-11-17
| | | | | | | | | | | | | | | | | | | | | | Currently, in gk20a_scale_target, we set clock frequency even if it is equivalent to the rate previously requested by the governor. This change adds a check to bypass this in case new_frequency == prev_frequency. These clocking operations result in multiple BPMP calls, and add significant overhead to submit time. So, we avoid these operations when possible. Bug 1795076 Change-Id: I0f180564e54581f0f4add4626c647e0b9a1bbe43 Signed-off-by: Sachit Kadle <skadle@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1247913 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aaron Huang <aaronh@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 11:54:46 -0500