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* gpu: nvgpu: Remove support for legacy mappingSami Kiminki2017-11-08
| | | | | | | | | | | | | | | | | | | | Make NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL mandatory for all map IOCTLs. We'll clean up the legacy kernel code in subsequent patches. Remove support for NVGPU_AS_IOCTL_MAP_BUFFER. It has been superseded by NVGPU_AS_IOCTL_MAP_BUFFER_EX. Remove legacy definitions to nvgpu_map_buffer_args and the related flags, and update the in-kernel map calls accordingly by switching to the newer definitions. Bug 1902982 Change-Id: Ie9a7f02b8d5d0ec7c3722c4481afab6d39b4fbd0 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1560932 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove use of linux specific powergate_mode flagDeepak Nibade2017-11-08
| | | | | | | | | | | | | | | | | | | | | In dbg_set_powergate(), we use flags NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE/ENABLE which are defined in linux specific uapi header Hence we need to remove those flags from common code Update dbg_set_powergate() to receive boolean flag to disable/enable powergate instead of NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE/ENABLE Also update corresponding HALs as per above change Jira NVGPU-259 Change-Id: I9c4eb30e29ea5ce0d8e25517a6a072fb9f0e92e5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1594326 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: enable pbus intr for si/fpgaSeema Khowala2017-11-08
| | | | | | | | | | | | | | | | | Enable pri squash, fecs err and pri_timeout pbus interrupt for si and fpga platforms only. Bug 200350539 Change-Id: Id452edf92eac0209d3b43d98b3ff6efd0764e40a Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1569590 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: spew err for pbus interruptSeema Khowala2017-11-08
| | | | | | | | | | | | | | | | | | | | | | | Spew err message for pri_squash, fecserr and pri_timeout pbus interrupts. If FECS_TGT is set in timeout_save_0, addr, write fields are not reliable. Also timeout_save_1 is unreliable. For both squash and timeout should have correct data most of the time. Even for FECS_TGT, a timeout for a read should indicate the correct transaction as Host only supports one read at a time. It's mostly just writes to FECS that have potentially incorrect information. Bug 200246808 Bug 200350539 Change-Id: I8a992d924ff6c740a8dacecaaaf4ef257756d01d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1568860 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Introduce queries for big page sizesTerje Bergstrom2017-11-08
| | | | | | | | | | | | | | Introduce query functions for default big page size and available big page sizes. Move initialization of GPU characteristics big page sizes to the GPU characteristics query function. JIRA NVGPU-259 Change-Id: Ie66cc2fbfcd88205593056f8d5010ac2539c8bc2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593685 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Store VBIOS version in g->biosTerje Bergstrom2017-11-08
| | | | | | | | | | | | | | Store VBIOS version in g->bios instead of GPU characteristics. This removes a few Linux dependencies from common code, because GPU characteristics is defined in Linux IOCTL header. JIRA NVGPU-259 Change-Id: I9aab3d37b7ca000edd59c92b8601a96ee288e2bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593684 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gp10b: change prod value for pg slcgseshendra Gadagottu2017-11-07
| | | | | | | | | | | | | | | | SW WAR to fix graphics slcg hang issue by updating prod value for slcg gating register. Bug 200349133 Change-Id: Ia9b32f6cfe79393d3c7c23f7b6880df5fd627c8e Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593076 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use is_enabled flags also in vgpuTerje Bergstrom2017-11-07
| | | | | | | | | | | | | | | | One vgpu file was not changed when all nvgpu flags were moved to use nvgpu_is_enabled(). JIRA NVGPU-259 Change-Id: Ie3964ed05ce5831cb2bd3cd51c07bb19a1f1d4d3 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593688 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix type defs in dbg_gpu_gk20a.hTerje Bergstrom2017-11-07
| | | | | | | | | | | | | | | | | dbg_gpu_gk20a.h used implictly definitions that it did not forward declare or #include definitions for. Also regops_whitelist fields were unused. The type itself is not defined anywhere. Delete the fields. Change-Id: I4b002247c67a4ce4cb54810720b0bbc06381bf83 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593681 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: drop user callback support in CEKonsta Holtta2017-11-07
| | | | | | | | | | | | | | | | | | | | | | | Simplify the copyengine code by deleting support for the ce_event_callback feature that has never been used. Similarly, create a channel without the finish callback to get rid of that Linux dependency, and delete the finish callback function as it now serves no purpose. Delete also the submitted_seq_number and completed_seq_number fields that are only written to. Jira NVGPU-259 Change-Id: I02d15bdcb546f4dd8895a6bfb5130caf88a104e2 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589320 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add elcg/blcg/slcg enabled checksDeepak Goyal2017-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -Power features should be enabled only if s/w flags xxcg_enabled are set for corresponding features. These flags control whether feature should be kept disabled in the hardware or not. For disable case, register programming will happen for CG registers and they will be set to disabled. For ELPG, init command will be sent to PMU, but “ELPG_ALLOW” will not be sent to PMU. Also these flags can be modified using sysfs. These flags are noop if corresponding can_xxxg flags are set to flase. S/w flags can_xxxg tell the ability of platform to support a power feature and cannot be modified by syfs. Setting these flags to false will avoid any HW register write or init sequence for the power feature from executing. For ELPG, no commands will be sent to PMU. -g->elcg_enabled flag should not be modified here. It should be modified only by sysfs. This will be cleaned up in follow up implementation where debug session will have some kind of lock where it will keep power features disabled as long as it wants to. Debugger cannot rely on this flag to keep power management disabled as these flags can be changed from sysfs. Due to this issue someone can easily break debugging session by accidentally changing something in sysfs. Proper fix for this is being tracked in NVGPU-320 Bug 1982434 Change-Id: I660ef02491f4df9910bf4dea3561ac8a0838e1b1 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1587205 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix missing #includes and fw decls in Linux codeTerje Bergstrom2017-11-06
| | | | | | | | | | | | | ioctl_channel.h and cde.h referred to multiple structures that were not forward declared or explitly #included in. Add several forward declarations and #includes. Also add #include for <uapi/linux/nvgpu.h> to multiple Linux .c files that were missing it. Change-Id: Iefd52e71224d5810b5abbcc765f92bc535d7a28b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591634 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add RMOS include path for rwsem.hSourab Gupta2017-11-06
| | | | | | | | | | | | | | | | The patch adds include path for rmos header file pertaining to rwsem.h Change-Id: I7f9cfac38e971e1d78e76968911df72669598b9d Signed-off-by: Sourab Gupta <sourabg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591108 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use common destructor for boardobjgrpThomas Fleury2017-11-06
| | | | | | | | | | | | | | | | | | | | | | Use boardobjgrp_super for boardobj_e255 and boardobj_32. In both cases, we want the destructor to remove and destroy related objects, as well as freeing any pmucmd buffer. JIRA EVLR-1959 Bug 200352099 Change-Id: I220d2d6b26347a36d73028db6740fcc2ef702987 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586597 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: call destructor for boardobj and boardobjgrpThomas Fleury2017-11-06
| | | | | | | | | | | | | | | | | | Maintain a list of boardobj and boardobjgrp, so that we can free related objects when removing pmu support. A flag is added in boardobj so that the destructor can determine if it should free the object. This 'allocated' flag is false when the object is embedded into another structure, which should be freed through other means. JIRA EVLR-1959 Bug 200352099 Change-Id: I6a3ff3c57f7428dd145deacf98f2992a9be9796d Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586596 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix dma memory leak in remove pmu supportThomas Fleury2017-11-06
| | | | | | | | | | | | | | | | | | | Add missing unmap and free for seq_buf and ucode (acr & hsbl). JIRA EVLR-1959 Bug 200352009 Change-Id: I3e422ce07228b59554ab1407c29e45c70479134d Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586576 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix kernel memory leak in pmu remove supportThomas Fleury2017-11-06
| | | | | | | | | | | | | | | When unbinding the driver, secure pmu firmware was not freed in nvgpu_remove_pmu_support(). Free related firmware if previously allocated. JIRA EVLR-1959 Bug 200352099 Change-Id: If9e431964837b3233ec25931b2ab61da920e5540 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1582909 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add g cross reference in boardobjgrpThomas Fleury2017-11-06
| | | | | | | | | | | | | | Added a pointer to GPU context in boardobjgrp, and updated constructors. It will be useful to free allocated DMA resources. JIRA EVLR-1959 Bug 200352099 Change-Id: I006e4f970c9a2525dabdfd6ad417be64e36b7b68 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586551 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: support tuning per-ch deterministic optsKonsta Holtta2017-11-06
| | | | | | | | | | | | | | | | Add a new ioctl NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS to adjust deterministic options on a per-channel basis. Currently, the only supported option is to relax the no-railgating requirement on open deterministic channels. This also disallows submits on such channels, until the railgate option is reset. Bug 200327089 Change-Id: If4f0f51fd1d40ad7407d13638150d7402479aff0 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1554563 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: define EVENT_IDs in common codeDeepak Nibade2017-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All the event ids NVGPU_IOCTL_CHANNEL_EVENT_ID_* are defined in linux specific user header uapi/linux/nvgpu.h and can't be used in common code Hence add new definitions of type NVGPU_EVENT_ID_* for all the events in common code and use them wherever required in common code For future additions to event ids, we need to update both NVGPU_IOCTL_CHANNEL_EVENT_ID_* and NVGPU_EVENT_ID_* fields Also add new API nvgpu_event_id_to_ioctl_channel_event_id() to convert common event_id of the form NVGPU_EVENT_ID_* to Linux specific event_id of the form NVGPU_IOCTL_CHANNEL_EVENT_ID_* Use this API in gk20a_channel/tsg_event_id_post_event() to get correct event_id Jira NVGPU-259 Change-Id: I15a7f41181fdbb8f1876f88bbcd044447d88325f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591434 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: protect stacktrace.h include with configDeepak Nibade2017-11-06
| | | | | | | | | | | | | | | | struct stack_trace is protected with config GK20A_CHANNEL_REFCOUNT_TRACKING and hence protect linux/stacktrace.h header include in gk20a/channel_gk20a.h with same config Jira NVGPU-259 Change-Id: I365a4faa7eb071dd559e9b27fe03377dede7484d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1592603 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix license in platform_gk20a.hDeepak Nibade2017-11-06
| | | | | | | | | | | | | | | | Since platform_gk20a.h is now in linux specific code, update it to use GPL license NVGPU-316 Change-Id: Iaee5cb306b36e10c0f1b674dfecc0d9a02bc2a2b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591433 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use nvgpu_udelay and optimize do while loopSeema Khowala2017-11-06
| | | | | | | | | | | | | | | | | - For interrupt context, use nvgpu_udelay() instead of nvgpu_usleep_range() - Use while loop instead of do while loop for polling as this will help minimize overall delay Bug 200350539 Change-Id: Icc05911082877df7f9e807da8f16e4d54e620cd8 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1573303 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Put #includes in vgpu.h behind #ifdefTerje Bergstrom2017-11-06
| | | | | | | | | | | | | JIRA NVGPU-259 Change-Id: I6d88f652d24ff6cf418b5f3680ace733309a6fea Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590126 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use a callback to free struct gk20aTerje Bergstrom2017-11-06
| | | | | | | | | | | | | | | | | struct gk20a is now part of nvgpu_os_linux in Linux builds. gk20a.c still frees struct gk20a by kfree(struct gk20a *), which is wrong. Create a new function pointer in struct gk20a for freeing the structure and call kfree(struct nvgpu_os_linux *) instead. JIRA NVGPU-259 Change-Id: I412ee993002cb2a42f0db015fc676de43418ec2f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591012 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Return error code properly from nvgpu_vm_map_linuxSami Kiminki2017-11-03
| | | | | | | | | | | | | | | | | The function nvgpu_vm_map_linux() used to return GPU VA on successful map or 0 when things didn't go smoothly. However, this scheme does not propagate the actual map error back to the userspace. So, modify the function a bit: return error and return the GPU VA via pointer on success. Bug 1705731 Change-Id: I2174b5fbaf64dcb00f9567dab1c583d6ddfa5d78 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590961 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "gpu: nvgpu: fix patch buf count update for vidmem"Timo Alho2017-11-03
| | | | | | | | | | | | | | This reverts commit de399ccb0019513a5f9e8f2bcadb02486f99bc80. Bug 2012077 Change-Id: Ie608c3b41aa91f9aaed3fad240ed882a0c6f1ea2 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1591423 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: fix patch buf count update for vidmemPeter Daifuku2017-11-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | gr_gk20a_ctx_patch_write_begin() updates the patch buffer data_count when the associated graphics context memory buffer has been CPU-mapped; it was doing so by looking for a non-null cpu_va. However, if the graphics context has been allocated from vidmem, cpu_va is always 0, so we can't tell if nvgpu_mem_begin() was called for the context buffer or not. Instead: - add a cpu_accessible flag to the nvgpu_mem struct and set it in nvgpu_mem_begin() - return the value of that flag in nvgpu_mem_cpu_accessible() - gr_gk20a_ctx_patch_write_begin() now calls this new function instead of checking cpu_va. Bug 2012077 JIRA ESRM-74 Change-Id: I8401699f30b4ae7154111721c25c7ec3ff95d329 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1587293 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: fix reserve mempool err checkingAparna Das2017-11-02
| | | | | | | | | | Bug 2016793 Change-Id: I3fe91b5c31d96bfc460624e8c4054945bee25383 Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590373 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_is_enabled() for ASPMTerje Bergstrom2017-11-02
| | | | | | | | | | | | | | | | Convert disable_aspm and references to that field to use nvgpu_is_enabled(NVGPU_SUPPORT_ASPM). Initialize it from gk20a_platform struct at probe time. This removes another dependency to struct gk20a_platform. JIRA NVGPU-259 Change-Id: I32e30160f817ea275aa190dcf86c5fd594138d75 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590124 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move platform_gk20a.h to linuxDeepak Nibade2017-11-02
| | | | | | | | | | | | | | | | | | | | | Move gk20a/platform_gk20a.h to linux specific directory as common/linux/platform_gk20a.h since this file includes all linux specific stuff Fix #includes in all the files to include this file with correct path Remove #include of this file where it is no more needed Fix gk20a_init_sim_support() to receive struct gk20a as parameter instead of receiving linux specific struct platform_device NVGPU-316 Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589938 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove use of os_linux.h from mm_gp10b.cDeepak Nibade2017-11-02
| | | | | | | | | | | | | | | gp10b/mm_gp10b.c does not depend on os_linux.h and since it is linux header anyways, remove it from common code Jira NVGPU-259 Change-Id: I85231f188ecc27d7e83bee026f915b5a5a99a7fd Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590524 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Initialize Linux sched in Linux codeTerje Bergstrom2017-11-02
| | | | | | | | | | | | | Initialize Linux scheduling extensions from Linux code. This removes a dependency between common and Linux code. JIRA NVGPU-259 Change-Id: Ibd882f82479eaac05ecc8cf743dd4a89bd7386f2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1588663 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "gpu: nvgpu: WAR: unbind_channel_verify_status ret val"Deepak Nibade2017-11-02
| | | | | | | | | | | | | | | | | | | This reverts commit a8643b3a99af5011f4e933967f8a09f227ce4949. Proper resolution is implemented in user space (nvrm_gpu) to idle all channels of TSG before unbinding a channel from it And with that we should not see NEXT bit set on channel while unbinding Hence revert the WAR and again return error if we find NEXT bit set on channel Also restore the error print Bug 200327095 Change-Id: Id58e00c4602a4a5c9f65e5ee1329b606f45993d7 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1585991 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix mutex leak on fecs_mutexDeepak Nibade2017-11-02
| | | | | | | | | | | | | | | | | | In gk20a_gr_reset(), we acquire g->gr.fecs_mutex and call a bunch of APIs But in case any of these APIs fail, we don't release the mutex and just return the error leaking the mutex So the next attempt to acquire g->gr.fecs_mutex results in a deadlock Fix this by releasing the mutex before returning error Bug 2015370 Change-Id: I9a0214ff53515f819c6566c7d44d1898027416e1 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589062 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use struct gk20a for create_gr_sysfsDeepak Nibade2017-11-02
| | | | | | | | | | | | | | | | | | API gr_gp10b_create_sysfs() and GR HAL create_gr_sysfs() right now receive linux specific struct device But since this function is called from/declared in common code, we need to remove linux dependency from it Hence update the API and GR HAL to receive struct gk20a pointer instead of device pointer Jira NVGPU-259 Change-Id: I7effa16407d47a2ab5f9562ec4a4dec975a32d6c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1588464 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add t19x specific TSG fields.Deepak Goyal2017-11-02
| | | | | | | | | | | | | | | TSG struct is extended to accomodate t19x specific args. JIRA GPUT19x-16 Change-Id: I52b6613d84878f68861fe2515bafba92f83d9572 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586855 Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move submit path to linuxDeepak Nibade2017-11-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nvgpu submit path has a lot of dependency on Linux framework e.g. use of copy_from_user, use of structures defined in uapi/nvgpu headers, dma_buf_* calls for trace support etc Hence to keep common code independent of Linux code, move submit path to Linux directory Move below APIs to common/linux/channel.c trace_write_pushbuffer() trace_write_pushbuffer_range() gk20a_submit_prepare_syncs() gk20a_submit_append_priv_cmdbuf() gk20a_submit_append_gpfifo() gk20a_submit_channel_gpfifo() Move below APIs to common/linux/ce2.c gk20a_ce_execute_ops() Define gk20a_ce_execute_ops() in common/linux/ce2.c, and declare it in gk20a/ce2_gk20a.h since it is needed in common/mm code too Each OS needs to implement this API separately gk20a_channel_alloc_gpfifo() use sizeof(nvgpu_gpfifo) to get size of one gpfifo entry, but structure nvgpu_gpfifo is linux specific Define new nvgpu_get_gpfifo_entry_size() in linux specific code and use it in gk20a_channel_alloc_gpfifo() to get gpfifo entry size Each OS needs to implement this API separately Export some APIs from gk20a/ce2_gk20a.h and gk20a/channel_gk20a.h that are needed in linux code Jira NVGPU-259 Jira NVGPU-313 Change-Id: I360c6cb8ce4494b1e50c66af334a2a379f0d2dc4 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1586277 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gp10b: enhance priv ring error reportingSeema Khowala2017-11-02
| | | | | | | | | | | | | | | | | | -Add start_conn, disconnect and overflow fault type priv error detection -For busy looping in interrupt context, use nvgpu_udelay() instead of nvgpu_usleep_range() Bug 200350539 Change-Id: I0d0da86d5688bca36817d445151818632c5ea4f1 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1569589 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split ctxsw_trace API into non-Linux componentAlex Waterman2017-11-01
| | | | | | | | | | | | | | | | | | | Split the ctxsw trace "core" API code into <nvgpu/ctxsw_trace.h>. This is not perect though since there's some Linuxisms present in the HAL and as such that code has to be hidden by the ctxsw tracing CONFIG. But this patch should work for QNX such that it will allow the code to build as long as CONFIG_GK20A_CTXSW_TRACE is not set. Also fix the copywrite notice in the ctxsw code present under common/linux to be GPL. JIRA NVGPU-287 Change-Id: I94715864caf335b7220185492e4629d713b025e0 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589429 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: set mmu error for all channels of a tsg at onceRichard Zhao2017-11-01
| | | | | | | | | | | | | | | | | | | | | | In current code vgpu only set error notifier for the reporting channel but abort the whole tsg. When the tsg is aborted, all channels of the tsg are supposed have had their error notifiers set. Set it for all channels once any of the channels gets an MMU fault. For now, RM server still reports num-of-channel times for tsg mmu fault. We may optimize it in future. Jira VFND-3798 Change-Id: I6deaca55e7420899af8eabec72ad888d2726ad3c Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1588098 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove buffer_attrs structAlex Waterman2017-11-01
| | | | | | | | | | | | | | | | | | | | Remove the buffer_attrs struct and replace it with a more streamlined nvgpu_ctag_buffer_info struct. This struct allows several different fields to all be passed by pointer to the various kind/compression functions in the VM map process. This path also moves several comptag/kind related functions to the core vm.c code since these functions can be reused by other OSes. Change-Id: I2a0f0a1c4b554ce4c8f2acdbe3161392e717d3bf Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1583984 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove user_mapped from mapped_bufAlex Waterman2017-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the always true field 'user_mapped' from the mapped_buf struct. All mapped_bufs are mapped by a user request since they always originate from a dma_buf (for Linux, that is). As such there is a fair amount of logic that could be deleted. Linux specific: the own_mem_ref field was also be deleted. The logic of only storing a dma_buf ref when the buffer is mapped for the first time by a user is easy: when the mapped buffer is found in the map cache release the outstanding dma_buf ref taken earlier on in the map path. If the map cache does not have the buffer simply let the higher level map code keep the dma_buf ref. The dma_buf ref is released when the nvgpu_vm_unmap_system() call-back is called by the unmap path. JIRA NVGPU-30 JIRA NVGPU-71 Change-Id: I229d136713812a7332bdadd5ebacd85d983bbbf0 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1583983 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: VM unmap refactoringAlex Waterman2017-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-organize the unmap code to be better split between OS specific requirements and common core requirements. The new code flow works as follows: nvgpu_vm_unmap() Is the primary entrance to the unmap path. It takes a VM and a GPU virtual address to unmap. There's also an optional batch mapping struct. This function is responsible for making sure there is a real buffer and that if it's being called on a fixed mapping then the mapping will definitely be freed (since buffers are ref-counted). Then this function decrements the ref-count and returns. If the ref-count hits zero then __nvgpu_vm_unmap_ref() is called which just calls __nvgpu_vm_unmap() with the relevant batch struct if present. This is where the real work is done. __nvgpu_vm_unmap() clears the GMMU mapping, removes the mapped buffer from the various lists and trees it may be in and then calls the nvgpu_vm_unmap_system() function. This function handles any OS specific stuff and must be defined by all VM OS implementations. There's a a short cut used by some other core VM code to free mappings without going through nvgpu_vm_map(). Mostly they just directly decrement the mapping ref-count which can then call __nvgpu_vm_unmap_ref() if the ref-count hits zero. JIRA NVGPU-30 JIRA NVGPU-71 Change-Id: Ic626d37ab936819841bab45214f027b40ffa4e5a Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1583982 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: modify tsg enable sequenceAparna Das2017-11-01
| | | | | | | | | | | | | | | | | | TSG enable sequence in native has been modified due to a hardware bug requiring enabling all channels with NEXT and CTX_RELOAD set in a TSG, and then enabling rest of channels. However it is not possible to check if NEXT and CTX_RELOAD is set in vgpu. Have a separate implementation for enabling tsg sequence in vgpu till the fix for hardware bug is implemented for virtualized configuration. Bug 200348087 Change-Id: I6bfc52138bc540c0ea0ad18a85155eeff6f9efa8 Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1588740 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove use of platform_gk20a.h from gk20a.cTerje Bergstrom2017-11-01
| | | | | | | | | | | | | gk20a.c does not depend on platform_gk20a.h anymore. As the header is inux specific, remove its use entirely. JIRA NVGPU-259 Change-Id: I6c8934a7a3d4f51e4ca1d7fc580619a3ba248e68 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1590125 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Introduce ecc_gk20a.hash_node only if SYSFS supportedTerje Bergstrom2017-11-01
| | | | | | | | | | | | | | | ecc_gk20a structure has field hash_node for sysfs operations. Make that field conditional to CONFIG_SYSFS to allow building the code in systems without sysfs. JIRA NVGPU-259 Change-Id: Ic153272daa2ae6d9099b95280d10c085f1bef796 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589506 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove pg419 emulation on pg418Terje Bergstrom2017-11-01
| | | | | | | | | | | | | Remove emulation of pg419 board with a pg418 which does not have a power sensor, but claims to have one in VBIOS. JIRA NVGPU-259 Change-Id: I6527d08dd05b79f96e505561685504bb239ab4ac Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1588732 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: save act_eng_bitmask in runlist_infoSeema Khowala2017-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Issue Currently bitmask of engine indices is being saved. This will give wrong active engine ids for a given runlist and s/w will end up checking/polling wrong engine_status registers as these registers are indexed by active engine ids. Also reset_eng_bitmask will end up having wrong value for active engine ids to be reset. Details for runlists serving engines ids for gv11b are:- runlist id 0: gr = 0, grcopy 0 = 2, grcopy1 = 3 runlist id 1: async ce = 1 Incorrect values init_runlist:705 [DBG] runlist 0 : eng bitmask 7 (eng 0, 1, 2) init_runlist:705 [DBG] runlist 1 : eng bitmask 8 (eng 3) Fix Save bitmask of active engine ids in runlist info. Right value init_runlist:705 [DBG] runlist 0 : eng bitmask d (eng 0, 2, 3) init_runlist:705 [DBG] runlist 1 : eng bitmask 2 (eng 1) Bug 200277163 Bug 1945121 Change-Id: Ia299aa0881c4a258080bb0daa3a542fef0d94e4f Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1584066 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: halt gr pipe & gr_reset do not work on fmodelSeema Khowala2017-11-01
| | | | | | | | | | | | | | | | Do not halt gr pipe as it will hang simulator. Also during ch/tsg teardown, gr_reset without halting gr pipe crashes simulator. Bug 1958308 Change-Id: I4036b4a4999932f05a0f292d4fc51de21d3a030a Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1566575 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-22 16:07:55 -0400