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* gpu: nvgpu: gk20a: add syncpt null checksDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | On channel_finish() path, we first check if last submit was WFI and in that case we do not submit new WFI but just wait on old syncpt fence. But it is possible that sync resource is already freed from another path (channel_suspend()) Hence add a NULL check there to prevent Null pointer exception. Also, in channel_free() path, move syncpt free API after channel_unbind() since we logically free the syncpt after unbinding the channel. Bug 1305024 Change-Id: Icc2fc83f004310560fc459527e1d37730428ec2d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/400233 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: free syncpt when channel becomes idleDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | All of the channel's submit jobs are added to the list channel->jobs In channel_update(), we iterate over this list and check if any job has completed. If any job is complete then we remove it from the list. If this list is empty then it means channel is idle and we can free its syncpt. Hence after iterating this list, check if it is empty or not. If it is empty AND if we are aggressive to free the syncpt (syncpt_aggressive_destroy flag is set) then free the syncpt at this point. Keep the syncpt free code inside submit_lock to avoid race conditions. Also, do not free the syncpt if we have already scheduled WFI on some other path. In that case, syncpt is still needed to check for channel idle. Once WFI completes, we free the syncpt anyway. Bug 1305024 Change-Id: I1654e1db3b76b7ad14644dbb900b03f195ca3b2c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/398617 Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: add submit_lockDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add submit mutex lock to avoid race conditions between submitting a job, removing a job and submitting WFI With this lock make below operations atomic : during submit_gpfifo() - 1. getting new syncpt 2. inserting syncpt increment 3. submitting gpfifo 4. setting job completion interrupt during submit_wfi() - 1. getting new syncpt 2. inserting syncpt increment when idle during channel_update() - 1. checking the submit job completion 2. freeing the job if it is completed Bug 1305024 Change-Id: I0e3c0b8906d83fd59642344626ffdf24fad2aaab Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/397670 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gm20b: Alloc phys mem for CBC in simArto Merilainen2015-03-18
| | | | | | | | | | | | | | | CBC frontdoor access works incorrectly in the simulator if CBC is allocated from IOVA. This patch makes CBC allocation to happen from physical memory if are running in simulator. Bug 1409151 Change-Id: Ide08f4eab6911adc5737001c6d751ee227fec8f9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/401544 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement gm20b fifo recoveryTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Implement gm20b version of fifo recovery. Bug 1495967 Change-Id: I2792b217178d157427f49e0c450d4ac620399962 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/394138 Reviewed-on: http://git-master/r/401402 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
* gpu: nvgpu: gm20b: Add fuse headerTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I85038d320ed224074eca14c32d7cb6fd3ed79070 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/401500 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: gk20a, gm20b headersKen Adams2015-03-18
| | | | | | | | update headers from latest gen_register/ip_check info Change-Id: Iae892ab7138e7bba4abc821b9d7893e768647daa Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/399382
* gpu: nvgpu: gk20a: minor fixesKen Adams2015-03-18
| | | | | | | | | fixes one use of unitialized var renames a register to make it match dev_* file. Change-Id: Iafba659bbf2df509e0b494b2c5dab3819bf650ef Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/394792
* gnu: nvgpu: gm20b: CBC clean and invalidateBo Yan2015-03-18
| | | | | | | | | the CBC clean and invalidate is done for gk20a for bug 1409151, now it's time to do the same fo gm20b. the text of this change is strictly copied from gk20a, simply to make build pass. Change-Id: Id717cb1e2ca0fa3f8483c3fd40d7629a9cc85ec9 Signed-off-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: select NETC for gm20bKevin Huang2015-03-18
| | | | | | | | | | | Change-Id: I6e7b5e77907033c7e7cbcc32cae200d46a3700ea Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/387381 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/397712 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Separate gm20b configurationTerje Bergstrom2015-03-18
| | | | | | | | | | | Separate gm20b platform data from gk20a data. Change-Id: Ie90ebc9e06ba94dfe852dfe07c163cd00fd90a9c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396376 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Call railgate only if definedTerje Bergstrom2015-03-18
| | | | | | | | | | | Call railgate and unrailgate ops only if they are defined. Change-Id: I0a87ac0259af3719098d4372be7e25f0a54416fc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396375 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Do not wait for FE idle on linsimTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Waiting for FE idle hangs on simulation, so skip it. Change-Id: I4f49eab725fcf2eb0b8340040a79731e16a1a0a0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/394053 Reviewed-on: http://git-master/r/396374 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: add gm20b channel opKevin Huang2015-03-18
| | | | | | | | | | | | | | Bug 1450792 Change-Id: I09f7c727a773178613fe555eb025ac324da0008e Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/381128 Reviewed-on: http://git-master/r/396373 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Add GPU driver for GM20BBo Yan2015-03-18
| | | | | | this moves GM20B driver to the new location Change-Id: I5fde14e114a8db79738a4c61849912b1ae225fb5
* video: tegra: gk20a: remove redundant codeBo Yan2015-03-18
| | | | | | | | | | | | | gk20a_ltc_init_comptags and gk20a_ltc_clear_comptags are defined in ltc_gk20a.c, gm20b has its own init/clear functions, so remove these two from ltc_common.c change nvhost_allocator_init to gk20a_allocator_init, this is a left-over after rebase, just like the above 2 function definitions, so fix it. Change-Id: I829639dd7fee9110dd65d5df7d7f0f8fe5fca6c1 Signed-off-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: gk20a: Remove duplicated codeTerje Bergstrom2015-03-18
| | | | | | | | | | Two calls to gk20a_init_gpu_characteristics() is not needed. GPU sim aperture was defined twice. Change-Id: Iaf78611717c55b1cae456358fcae2641ad552d9f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383855 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Re-enable gm20b driverTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I473d7ac712afc10bc255d57d441965556fa0e957 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383840 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Implement gr opsTerje Bergstrom2015-03-18
| | | | | | | | | | | Implement gm20b specific gr ops. Bug 1387211 Change-Id: I4523311f1c155ba2d3403dcf222769f6817b2450 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/362415 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
* video: tegra: host: Move LTC debugfs codeAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the LTC debugfs sync code to the gk20a LTC code. Change-Id: I145b04e1e8aade170c2e9c6b3beb60774c6124f2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366178 (cherry picked from commit c099b4fde779942d7559248c30a2df55aa4fd4f4) Reviewed-on: http://git-master/r/376515 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: commonize set ZBC color entryAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the set_zbc_color_entry() operation to the LTC common code as this is part of the LTC. Change-Id: Iba41e32e273d86fcf76094440c2313a75a928326 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366174 (cherry picked from commit 569ce1f3370532f12face62664a07d2d17a96bef) Reviewed-on: http://git-master/r/376505 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: comptag init and clearAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the comptags cache init and clear operations to the LTC from the gr code as this is part of the LTC. Change-Id: I2163a09bcfe68a8833d5135bfa4035f37c7157ab Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366173 (cherry picked from commit f56d4723f996f0dd2fcf0ae4279dbc4b6483b405) Reviewed-on: http://git-master/r/376504 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: t210: Fix opsPrashant Gaikwad2015-03-18
| | | | | | | | | Change-Id: I99deddd7323f9ee7f8de4a032296ceeaebd81a95 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/375310 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: Read GPU arch earlyTerje Bergstrom2015-03-18
| | | | | | | | | | | | Read GPU architecture and implementation early. Bug 1387211 Change-Id: Iffc1aa013f28ec786b0325ae055d016cf004ee06 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/360237 (cherry picked from commit b7071920b90ff1b21a5d14039e609a95ba48bd64) Reviewed-on: http://git-master/r/359754
* video: tegra: gpu: provide generic ops interfaceAlex Waterman2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an interface for the gk20a driver to have generic ops which are implemented by a chip specific HAL layer. The HAL layer is provided by the gpu_ops struct which defines function pointers for chip specific oeprations. This is necessary for supporting multiple chips with the same code base and minimal per chip hacking. Also, since much code is common except in the HW headers that are needed, the LTC common code is compiled by first including the necessary chip specific header(s) and then including the ltc common code file. This allows for easy updating of functions that are only different between chips as a result of register offset and field changes whereas the HAL provides the mechanism for functions that have actual semantic changes. Change-Id: I96f9a8350d34e7e101beb141d4521fab69dcfbae Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/360627 (cherry picked from commit fe90cad939cf979fc2516a96e5911bd8ab6fc457) Reviewed-on: http://git-master/r/362228 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: add gm20b platform dataKevin Huang2015-03-18
| | | | | | | | | | Bug 1387211 Change-Id: If093c1f64ed8f79099ea8f115db6c91177a5e3ef Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/359987 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: GM20B characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | This patch adds initial support for GM20B for GPU characteristics IOCTL. Bug 1392902 Change-Id: I55bfb7e087244eae1462d44319bd91c7c0901c2e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/359227 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gk20a: GPU characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | | | | | | | This adds new IOCTL that provides information for the userspace for GPU characterization. Specifically, the following items are provided: GPU arch/impl/rev, number of GPCs, L2 cache size, on-board video memory size, num of tpc:s per gpc, and bus type. The primary user of the new IOCTL will be rmapi_tegra. Bug 1392902 Change-Id: Ia7c25c83c8a07821ec60be3edd018c6e0894df0f Reviewed-on: http://git-master/r/346379 (cherry picked from commit 0b9ceca5a06d07cc8d281a92b76ebef8d4da0c92) Reviewed-on: http://git-master/r/350658 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
* gpu: nvgpu: Handle missing DMA addressSami Kiminki2015-03-18
| | | | | | | | | | | | | If DMA address is not defined, use the physical address. Bug 1500983 Change-Id: Ic33b21f74c8c2760e43146b87eec7ea467fc87be Signed-off-by: Sami Kiminki <skiminki@nvidia.com> (cherry picked from commit 8ae9a6567349241ce1cfff383526b0d9d39c28a1) Reviewed-on: http://git-master/r/415238 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Turn off scaling when not poweredSantosh Katvate2015-03-18
| | | | | | | | | | | | | | | | | | | | | This far the scaling has been disabled only when we suspend the system and therefore we unnecessarily keep gpu workers running even if the gpu itself would be railgated. This is not proper behaviour and it causes a race in suspend sequence. This patch reorders scaling disable to happen always when we turn off the GPU. Bug 200004860 Change-Id: Ief0bfd89378d5a7ced26c3ef29094dd5c378b01a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/410443 (cherry picked from commit bcae65bea24be2a1e0abe42522d99ba70c94cbe2) Reviewed-on: http://git-master/r/413249 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: mm: free allocations on validate errorShridhar Rasal2015-03-18
| | | | | | | | | | | | | Free allocated virtual address when marking PTE for validation or update fails. Bug 1479803 Change-Id: I9a8bd7c245b478f4252a261f246002fcc65d750d Signed-off-by: Shridhar Rasal <srasal@nvidia.com> (cherry picked from commit b5c0ad4e00dfc86b65e8efe3d8691b5cfaafbe4c) Reviewed-on: http://git-master/r/415248 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Disable pm runtime on shutdownArto Merilainen2015-03-18
| | | | | | | | | | | | | | In some cases the gpu has still work pending while the device is being suspended. This patch forces pm runtime to be disabled for the device to avoid powering up the gpu unnecessarily. Bug 1515437 Change-Id: I4b57d72eb34e794f0457d7a074d26c9d096a13b3 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/411968 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: fix pte memory leakKirill Artamonov2015-03-18
| | | | | | | | | | | | | | | Force cleanup of all GMMU PTEs when releasing vm. bug 1514178 Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Change-Id: Ice1ff837ca4decbdec2d4a78ea5eb64bfeefc0db Reviewed-on: http://git-master/r/411198 (cherry picked from commit e14ee5646554fd6cd812f4e7edf220c40116d722) Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/411895 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
* gpu: nvgpu: Balance usage count on resume failTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | | If PM runtime resume fails, pm_runtime_get_sync() still increments the usage count. Balance the usage count by decrementing it on fail. Bug 200003289 Change-Id: I127d2697ff2601d4884a4ecfdec8ad50894bf7d0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/411285 (cherry picked from commit 736846ff999bb9d1ca3340fc02ab49f8c65c4145) Reviewed-on: http://git-master/r/411473 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* video: tegra: host: gk20a: add class perf settingsRandy Spurlock2015-03-18
| | | | | | | | | | | | | | | | | Add a place to edit context-switched perf settings based upon class. Disable tex-lock as the first of such for compute. Bug 1409041 Change-Id: I5317a2a2e5f855661a1400b42f69211d16ae0c1d Signed-off-by: Randy Spurlock <rspurlock@nvidia.com> Reviewed-on: http://git-master/r/405908 (cherry picked from commit 250e149be35ecb8893dcef053ec44ffea86c302a) Reviewed-on: http://git-master/r/407094 (cherry picked from commit 54337c08cbf6c2c6b5c929c1be24e87165d9d946) Reviewed-on: http://git-master/r/408837 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
* gpu: nvgpu: gk20a: add fecs error intr handlerDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | Add handler gk20a_gr_handle_fecs_error() in case we have pending fecs error interrupt And clear this interrupt after handling. Also, in gk20a_gr_handle_fecs_error(), for now just print the contents of NV_PGRAPH_FECS_INTR and clear it Bug 1495957 Change-Id: Ie7f70c84ec76ab698141646cd683584c4501e3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/402874 (cherry picked from commit a29f219c57d65a06f6dae8086f19fa1af94d95bd) Reviewed-on: http://git-master/r/403587 (cherry picked from commit e65ebebd0d4d5c3dbb6fa454dd51c383ea13d715) Reviewed-on: http://git-master/r/411160 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: gk20a: add fecs intr h/w headersDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | add below hardware headers for fecs error interrupt : gr_fecs_intr_r() gr_intr_fecs_error_reset_f() gr_intr_fecs_error_pending_f() Bug 1495957 Change-Id: I0c1d606ae766f1e6badbbaa1288bb08a37bff842 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/402873 (cherry picked from commit 00ce5e538dc6669bfaeb9f81b8506b3ae8472faf) Reviewed-on: http://git-master/r/403586 (cherry picked from commit 2476df761199187ac53ba668603cf1917d455626) Reviewed-on: http://git-master/r/411159 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: fix memory leak in regops ioctlKevin Huang2015-03-18
| | | | | | | | | | | | | | | | Bug 200003921 Change-Id: Iebaca62793201ae86ce5f2cf4af3fc870a2aa3a6 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/408415 (cherry picked from commit 7d8fd07a26e33ba53a71dae475dc1074d52767a8) Signed-off-by: Hridya <hvalsaraju@nvidia.com> Reviewed-on: http://git-master/r/409832 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alka Mohite <amohite@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Tested-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: Ignore lbreq interruptTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Even though we mask LBREQ interrupt, hardware will still indicate it in PBDMA interrupt register. Stop treating LBREQ as fatal. Bug 1498688 Change-Id: Iec4c199437c50951ed9289cb85faf0008646d5c0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408763 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Do not enable lbreq interruptTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Lbreq interrupt can assert when there is memory back pressure. Do not enable it as either stalling or nonstalling interrupt. Bug 1498688 Change-Id: I02f94a64ab9df82402d80a632450d87457644d50 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408040 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
* gpu: nvgpu: Fix sched error and recovery raceTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Fix race between channel recovery and sched error. Bug 1499214 Change-Id: If95526c7e374703e8941f1b24d3916384261058e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/405662 (cherry picked from commit f8092e158294260dd9d041dc7f4d2c1872e02474) Reviewed-on: http://git-master/r/407571 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Fix TLB invalidate raceTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | TLB invalidate can have a race if several contexts use the same address space. One thread starting an invalidate allows another thread to submit before invalidate is completed. Bug 1502332 Change-Id: I074ec493eac3b153c5f23d796a1dee1d8db24855 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/407578 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407543 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* video: tegra: gk20a: Disable gfx before save zbcSantosh Katvate2015-03-18
| | | | | | | | | | | | | | | | | | | This change disables gr engine before calling into pmu for saving zbc and re-enables once it is finished. Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE happens because of active concurrent memory traffic. Bug 1489850 Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/398398 GVS: Gerrit_Virtual_Submit (cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6) Reviewed-on: http://git-master/r/402779 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: Allow sysfs write only to rootTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | Allow write access only to root to gk20a sysfs files. Bug 200001241 Change-Id: Ibafb84ed703dd32743b520e01a57ffc82f8b4ac4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/405028 (cherry picked from commit dc0f977fe8fcacd260bf61ab658c166b004c1fcd) Reviewed-on: http://git-master/r/406898 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
* gpu: nvgpu: disable aggresive syncpoint destroyShridhar Rasal2015-03-18
| | | | | | | | | | | Bug 1503225 Change-Id: I52fd660de9bd251ceb936ad4edc34359753a0074 Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/399460 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Allow module buildLauri Peltonen2015-03-18
| | | | | | | | | | | | | This patch makes the necessary modifications to the gk20a driver to allow building it as a module. Bug 1476801 Change-Id: I88c4e1c1867baa1c2d010ac6e0c30bdb5fd63b91 Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Reviewed-on: http://git-master/r/380970 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Define module licenseArto Merilainen2015-03-18
| | | | | | | | | | | This patch adds missing license definition (GPL v2). Change-Id: I73d48dffd60eaab9517d09370875d51901853c4e Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/397590 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Do not enable HCE priv modeTerje Bergstrom2015-03-18
| | | | | | | | | | | | Do not enable HCE priv mode. Bug 1501689 Change-Id: I3da0ed7c7c1d59ef3e2a8bc727ca531eb22bab11 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/398102 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: gk20a: check the return value of gk20a_channel_busyKerwin Wan2015-03-18
| | | | | | | | | | | | | | gk20a_channel_busy is called to host gpu so that gk20a can be accessed. But it may return error like if gpu fails to be powered on. Always check the return value of gk20a_channel_busy to avoid illegal access to gk20a. Bug 1488409 Change-Id: Ie22da9e436ee5ea711003530419f546a73791b73 Signed-off-by: Kerwin Wan <kerwinw@nvidia.com> Reviewed-on: http://git-master/r/395180 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-09 14:36:53 -0500