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* gpu: nvgpu: add enable_exceptions gr opsSeema Khowala2017-05-30
| | | | | | | | | | | | This is needed to enable chip specific gr exceptions JIRA GPUT19X-75 Change-Id: I5ca8d0e51d00947c3ab1675bb6331207def433a4 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1474851 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: drop tegra idle registration callsKonsta Holtta2017-05-29
| | | | | | | | | | | The deprecated functions tegra_{register,unregister}_idle_unidle() have not existed in ages, so remove this dead code. Change-Id: I45005844d59282ff9638cce1c61002bddab74ce2 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1488813 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix build failure by missing headersskadamati2017-05-29
| | | | | | | | | | | | | | | | | | | | Forward declare struct file & inode ../../../nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:26:0: ../../../nvgpu/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h:29:57: error: 'struct file' declared inside parameter list [-Werror] int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp); Bug 200310575 Change-Id: I872b3a2483fb4dda9569aca1b4729bcd8acd5968 Signed-off-by: skadamati <skadamati@nvidia.com> Reviewed-on: http://git-master/r/1490166 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
* gpu: nvgpu: add chip specific sync point supportseshendra Gadagottu2017-05-26
| | | | | | | | | | | | | | Added support for chip specific sync point implementation. Relevant fifo hal functions are added and updated for legacy chips. JIRA GPUT19X-2 Change-Id: I9a9c36d71e15c384b5e5af460cd52012f94e0b04 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1258232 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix build failure by missing headersskadamati2017-05-26
| | | | | | | | | | | | | | | | | | Move the platform_gk20a.h include out of the ifdef CONFIG_DEBUG_FS in the CDE code since dev_from_gk20a() is used regardless of whether debugfs is enabled. Also modify some of the CE ops to take a struct gk20a instead of a struct device. This avoids any requirement for including linux/device.h or platform_gk20a.h. Bug 200310575 Change-Id: Ifef963cd0f66d05094a698200386cc6140920eac Signed-off-by: skadamati <skadamati@nvidia.com> Reviewed-on: http://git-master/r/1487830 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove duplicate \n from log messagesStephen Warren2017-05-26
| | | | | | | | | | | | | | | nvgpu_log/info/warn/err() internally add a \n to the end of the message. Hence, callers should not include a \n at the end of the message. Doing so results in duplicate \n being printed, which ends up creating empty log messages. Remove the duplicate \n from all err/warn messages. Bug 1928311 Change-Id: I99362c5327f36146f28ba63d4e68181589735c39 Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-on: http://git-master/r/1487232 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split stalling interrupt handlingTerje Bergstrom2017-05-26
| | | | | | | | | | | | | | | | | | | | | | Split handling of stalling interrupt to Linux specific chip agnostic and OS independent chip specific parts. Linux specific chip independent part contains handler for ISR and passing the control to a bottom half. It uses the new MC HALs intr_stall (query interrupt status), intr_pause (pause interrupts) and intr_resume (resume interrupts). MC HAL isr_stall now returns void and gets called in thread context and thus remove isr_thread_stall and replace the implementation with isr_stall. JIRA NVGPU-26 Change-Id: I206f330f6fc4a1f4def47c5f986585ac4080216d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1480243 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add and use VM init/deinit APIsAlex Waterman2017-05-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the VM init/de-init from the HAL and instead use a single set of routines that init/de-init VMs. This prevents code divergence between vGPUs and regular GPUs. This patch also clears up the naming of the routines a little bit. Since some VMs are used inplace and others are dynamically allocated the APIs for freeing them were confusing. Also some free calls also clean up an instance block (this is API abuse - but this is how it currently exists). The new API looks like this: void __nvgpu_vm_remove(struct vm_gk20a *vm); void nvgpu_vm_remove(struct vm_gk20a *vm); void nvgpu_vm_remove_inst(struct vm_gk20a *vm, struct nvgpu_mem *inst_block); void nvgpu_vm_remove_vgpu(struct vm_gk20a *vm); int nvgpu_init_vm(struct mm_gk20a *mm, struct vm_gk20a *vm, u32 big_page_size, u64 low_hole, u64 kernel_reserved, u64 aperture_size, bool big_pages, bool userspace_managed, char *name); void nvgpu_deinit_vm(struct vm_gk20a *vm); JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: Ia4016384c54746bfbcaa4bdd0d29d03d5d7f7f1b Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477747 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Refactor VM init/cleanupAlex Waterman2017-05-26
| | | | | | | | | | | | | | | | | Refactor the API for initializing and cleaning up VMs. This also involved moving a bunch of GMMU code out into the gmmu code since part of initializing a VM involves initializing the page tables for the VM. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I4710f08c26a6e39806f0762a35f6db5c94b64c50 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477746 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: do not disable SM exceptions for BPT_INTDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | In gr_gk20a_handle_sm_exception(), we disable all SM exceptions if SM debug mode is set and irrespective of exception type But we should not disable SM exceptions if the only exception is BPT_INT Fix this by checking if only interrupt is BPT_INT and do not disable SM exceptions in that case Note that for rest of the exceptions we still need to disable SM exceptions Also, remove redudant checks of sm_debugger_attached since we bail out early if this flag is not set anyways Bug 200264850 Change-Id: I7732567273fc88f6c98f25372fd8619d92339734 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1487040 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Track also pushbuf get for watchdogKonsta Holtta2017-05-24
| | | | | | | | | | | | | | | Make the watchdog notice also fine-grained changes within a single pushbuffer - by tracking just the gpfifo get, the watchdog could wake when the channel hasn't really been stuck but processing a relatively large or slow pushbuf. Jira NVGPU-72 Change-Id: I15374eea5d9abc9d3725a79d0b960503237e478c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1485919 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Refactor gk20a_vm_alloc_va()Alex Waterman2017-05-24
| | | | | | | | | | | | | | | | This function is an internal function to the VM manager that allocates virtual memory space in the GVA allocator. It is unfortunately used in the vGPU code, though. In any event, this patch cleans up and moves the implementation of these functions into the VM common code. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I24a3d29b5fcb12615df27d2ac82891d1bacfe541 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477745 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_cond in gr init_wqTerje Bergstrom2017-05-24
| | | | | | | | | | | | | Change graphics initialization wait queue to use nvgpu_cond instead of Linux wait queue. JIRA NVGPU-14 Change-Id: I55ed64c29856947798e927ffaa5f1dbb1683b977 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469851 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Proper timeout for NVGPU_COND_WAITTerje Bergstrom2017-05-24
| | | | | | | | | | | | | | | | | | The timeout parameter to NVGPU_COND_WAIT() was passed directly to wait_event_timeout(), which takes jiffies. Also allows zero timeout to disable timeout. The return value of NVGPU_COND_WAIT() was defined in a way specific to how Linux wait_event_() calls work. Replace that with proper error reporting and change the callers to check against error codes. JIRA NVGPU-14 Change-Id: Idbd2c8fbbef7589c3ca4f4c5732852bc71217515 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1484927 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix build failure in allocator.hAlex Waterman2017-05-24
| | | | | | | | | | | | | | | | Fix a build failure caused by missing definition for struct device. Instead of including device.h wrap the debugfs init function with CONFIG_DEBUG_FS and forward declare struct device. We don't use any struct device internals here so we only need to let the compiler know that this type does exist. Bug 200310575 Change-Id: I1ae45a8f191d920d9b606fefd5029fad84869cff Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1486012 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: re-arrange parity countersDavid Nieto2017-05-24
| | | | | | | | | | | | | (1) Re-arrange the structure for parity counters reporting so multiple units can be managed JIRA: GPUT19X-84 Change-Id: If59a883dfe22d5a1d91a6d0ed2f5a6254434ffcb Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1485276 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use I2C port from platform dataThomas Fleury2017-05-24
| | | | | | | | | | | | | | | | | | | PG419 board has been reworked to swap I2C_B and I2C_C (in order to solve PL issues). As a result, we use a different I2C port to access INA3221. This information is now provided in platform data. Bug 1914023 Change-Id: Icaa7bb281f48f4dfa4f29ffd411c1b4bd84aca11 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1467931 (cherry picked from commit b3ebc022588ae485c0f6e88733b264a858cd4c12) Reviewed-on: http://git-master/r/1485192 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: I2C port for INA3221 in platform dataThomas Fleury2017-05-24
| | | | | | | | | | | | | | | | | | | | | PG419 board had been reworked to swap I2C_B and I2C_C (in order to solve PL issues). As a result, on this board we now use a different I2C port than on PG418. Remove support for non-reworked boards: VBIOS version must be at least .56 Add I2C port in platform data. Bug 1914023 Change-Id: Ia7940eaa823bb4d21f662491ba1de7c8490ce9f0 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1467930 (cherry picked from commit cda5fefb456c0edc75c99dedf67a3020424967c1) Reviewed-on: http://git-master/r/1485191 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: compile clk_gm20b.c alwaysDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | We currently compile clk_gm20b.c only if CONFIG_COMMON_CLK is set But since all linux and tegra dependencies are removed from this file, we can compile this file always and irrespective of CONFIG_COMMON_CLK Jira NVGPU-49 Change-Id: I695ebca74c91dcd068e19ec20d4f09cc950b64b3 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483863 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: remove clk_common.cDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | clk/clk_common.c includes some linux specific clock calls which can be easily replaced Move linux specific call to platform file Rest of the APIs are removed by directly substituting API code into caller function Jira NVGPU-49 Change-Id: Ia70e7a65c877649699b5d064683c34c0cb696d2e Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483862 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: use common fuse APIs in clk_gm20b.cDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | Use common fuse APIs in clk_gm20b.c Include <nvgpu/fuse.h> in clk_gm20b.c and remove tegra specific include <soc/tegra/fuse.h> Jira NVGPU-49 Jira NVGPU-75 Change-Id: I3e89ee7fc20d67fc26ee289e35a68560ff442ada Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483861 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add common fuse APIsDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | Add a new file common/linux/fuse.c for common fuse operations with below APIs nvgpu_tegra_fuse_read() nvgpu_tegra_fuse_write() nvgpu_tegra_get_gpu_speedo_id() Export the APIs in header <nvgpu/fuse.h> Jira NVGPU-49 Jira NVGPU-75 Change-Id: I5b0b0772584a5d408b23e629df9c5f73ecc05f6b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483860 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: move linux clk calls to tegra specific fileDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | clk_gm20b.c has number of calls specific to linux and tegra-soc environment In order to unify the driver, move all of those calls to tegra/linux specific file tegra/linux/clk.c All the clk_*() and tegra_dvfs_*() calls are now abstracted behind GPU's clock operations and shoule be accessed using g->ops.clk.<API> format Remove <linux/clk.h> and <soc/tegra/tegra-dvfs.h> from clk_gm20b.c Remove <linux/version.h> from clk_gm20b.c too since we only support k4.4 and higher version only Jira NVGPU-49 Change-Id: Ib26811e0423bbd3868b9a46e662b80a8ca088dc5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483092 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move gm20b clock register to platform fileDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | | We currently register gm20b clock operations gm20b_clk_ops in function gm20b_register_gpcclk() which is in clk_gm20b.c Since this is common clock framework and hence linux dependency, move this clock registration to platform specific file Note that all the clock operations remain in clk_gm20b.c. APIs in platform file will eventually call operations in clk_gm20b.c Jira NVGPU-49 Change-Id: Ib0b0d9f4719b196d764825a7dddb08f1fbd7a567 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483091 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: remove TEGRA_CLK_FRAMEWORK supportDeepak Nibade2017-05-24
| | | | | | | | | | | | | | CONFIG_TEGRA_CLK_FRAMEWORK is no longer supported hence remove this config and all the code that is protected with this config Jira NVGPU-49 Change-Id: Ica28019e0c99e95743216e005ba2fba20357b2d5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483090 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: per-chip GPCCS exception supportDavid Nieto2017-05-24
| | | | | | | | | | | | Adding support for ISR handling of GPCCS exceptions JIRA: GPUT19X-83 Change-Id: Ia5550aac8f368d8915f6c94aa22478cacbb2bddc Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1480992 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_thread in FECS traceTerje Bergstrom2017-05-24
| | | | | | | | | | | | | | | | Use nvgpu_thread for launching the FECS trace periodic poller thread. JIRA NVGPU-14 Change-Id: Idc53d85b96ae72a367dd1447bf18a8207b9886d6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469649 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Add query nvgpu_thread_is_runningTerje Bergstrom2017-05-24
| | | | | | | | | | | | | | | | Add query nvgpu_thread_is_running(). It returns true if thread has already been started. JIRA NVGPU-14 Change-Id: If3bed6f9ffe181703134ae1b92b0b275db364195 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1480257 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: add ioctls to get current timesliceThomas Fleury2017-05-24
| | | | | | | | | | | | | | | | | | Add the following ioctls - NVGPU_CHANNEL_IOCTL_GET_TIMESLICE for channel timeslice in us - NVGPU_TSG_IOCTL_GET_TIMESLICE for TSG timeslice in us If timeslice has not been set explicitly, ioctl returns the default timeslice that will be used when programming the runlist entry. Bug 1883271 Change-Id: Ib18fdd836323b1a2d4efceb1e27d07713bd6fca5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1469040 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: use ivm to send auxiliary dataAparna Das2017-05-24
| | | | | | | | | | | | | | RM server retrieves auxiliary data only from IVM. Modify IVC commands to send auxiliary data to RM server using IVM and not as a part command message. VFND-4166 Change-Id: I9bfe33cf9301f7c70709318b810c622ec57b1cdf Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: http://git-master/r/1484130 Reviewed-by: svcboomerang <svcboomerang@nvidia.com> Tested-by: svcboomerang <svcboomerang@nvidia.com>
* gpu: nvgpu: fix static sparse warningSachin Nikam2017-05-19
| | | | | | | | | | | | | | | | Make function as static to fix below sparse warning: $TOP/kernel/nvgpu/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c:999:5: warning: symbol 'gk20a_tegra_late_probe' was not declared. Should it be static? Bug 200299572 Change-Id: I66817e8a3d35b02a63729f51f41401aab747ffae Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1485850 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Split vm_area management into vm codeAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | The vm_reserve_va_node struct is essentially a special VM area that can be used for sparse mappings and fixed mappings. The name of this struct is somewhat confusing (as node is typically used for list items). Though this struct is a part of a list it doesn't really make sense to call this a list item since it's much more. Based on that the struct has been renamed to nvgpu_vm_area to capture the actual use of the struct more accurately. This also moves all of the management code of vm areas to a new file devoted solely to vm_area management. Also add a brief overview of the VM architecture. This should help other people follow along the hierachy of ownership and lifetimes in the rather complex MM code. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: If85e1cf868031d0dc265e7bed50b58a2aed2602e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477744 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split VM implementation outAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | This patch begins splitting out the VM implementation from mm_gk20a.c and moves it to common/linux/vm.c and common/mm/vm.c. This split is necessary because the VM code has two portions: first, an interface for the OS specific code to use (i.e userspace mappings), and second, a set of APIs for the driver to use (init, cleanup, etc) which are not OS specific. This is only the beginning of the split - there's still a lot of things that need to be carefully moved around. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I3b57cba245d7daf9e4326a143b9c6217e0f28c96 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477743 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split VM interface outAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch begins the major rework of the GPU's virtual memory manager (VMM). The VMM is the piece of code that handles the userspace interface to buffers and their mappings into the GMMU. The core data structure is the VM - for now still known as 'struct vm_gk20a'. Each one of these structs represents one addres space to which channels or TSGs may bind themselves to. The VMM splits the interface up into two broad categories. First there's the common, OS independent interfaces; and second there's the OS specific interfaces. OS independent -------------- This is the code that manages the lifetime of VMs, the buffers inside VMs (search, batch mapping) creation, destruction, etc. OS Specific ----------- This handles mapping of buffers represented as they are represented by the OS (dma_buf's for example on Linux). This patch is by no means complete. There's still Linux specific functions scattered in ostensibly OS independent code. This is the first step. A patch that rewrites everything in one go would simply be too big to effectively review. Instead the goal of this change is to simply separate out the basic OS specific and OS agnostic interfaces into their own header files. The next series of patches will start to pull the relevant implementations into OS specific C files and common C files. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I242c7206047b6c769296226d855b7e44d5c4bfa8 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464939 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add GCC exception handling supportLakshmanan M2017-05-19
| | | | | | | | | | | | Add support for per-chip handling of GCC exception. JIRA GPUT19X-86 Change-Id: I76ea588dc76b5c821ae5b53529db6dd64b3a856a Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1485836 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check commit_inst err codesKonsta Holtta2017-05-19
| | | | | | | | | | | gr_gk20a_init_golden_ctx_image() didn't check for error codes from gr.commit_inst(). Add the missing checks. Change-Id: I9f8449b2741c5a69cf65ad8191e9bc74c6ad1393 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1483867 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Scrub gk20a_platform dependenciesTerje Bergstrom2017-05-18
| | | | | | | | | | | | | | Remove gk20a_platform dependencies from gk20a.h. This makes gk20a_platform a Linux platform specific data structure. Add #include for platform_gk20a.h in the source files that still depend on Linux. JIRA NVGPU-16 Change-Id: Ib098accd34a1f5066eb8680c387f9b178169f3f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463547 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add gr_t19x support for gv11b ECCLakshmanan M2017-05-18
| | | | | | | | | | | | | | | | | | | | | | This CL covers the following modification, 1) Added gr_t19x support for gv11b ECC 2) Modified the gp10b platform config for gv11b sysfs support JIRA GPUT19X-85 JIRA GPUT19X-104 JIRA GPUT19X-100 JIRA GPUT19X-103 Bug 1825948 Bug 1825962 Bug 1775457 Change-Id: I0bf13f80a73cc2184147230d098e89a517554c01 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1478952 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add poweron voltage to clock structureAlex Frid2017-05-17
| | | | | | | | | | | | | | | | Added GPCPLL poweron voltage field to GPU clock structure. Initialized it differently for GPCPLL revisions B1 and C1. Bug 1924194 Change-Id: Ide7a08445afd3ab9aea21f75871b750f45c02c99 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/1481263 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Remove uses of platform->can_elpgTerje Bergstrom2017-05-17
| | | | | | | | | | | Remove newly introduced uses of gk20a_platform->can_elpg. Rename the field to can_elpg_init and replace all uses with gk20a->can_elpg. Change-Id: Id6e84d4c16159b5da80c583a8a94a9c5cc2423ec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1480955 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add czf_bypass sysfs node for gp10bPeter Boonstoppel2017-05-17
| | | | | | | | | | | | | | | | | | | | | | | | | This change adds a new sysfs node to allow configuring CZF_BYPASS, to enable platforms with low context-switching latency requirements. /sys/devices/17000000.gp10b/czf_bypass Values: 0 - always 1 - lateZ (default) 2 - single pass 3 - never The specified value will apply only to newly allocated contexts. Bug 1914014 Change-Id: Ibb9a8e86089acaadaa7260b00eedec5c80762d6f Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/1478567 (cherry picked from commit 3bc022cb385b53f698b04f218db535e8162e8c94) Reviewed-on: http://git-master/r/1473820 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: pmgr: fix sparse warningSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | Make function as static to fix below sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pmgr/pmgrpmu.c:275:5: warning: symbol 'pmgr_send_pwr_policy_to_pmu' was not declared. Should it be static? Bug 200299572 Change-Id: I1734c76d0e7ed7d9e5a266d68e0d8e8209952e17 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482956 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gk20a: fix sparse warningsSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | Make functions as static to fix sparse warnings: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:93:32: warning: symbol 'gk20a_fecs_trace_get_record' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:478:29: warning: symbol 'gk20a_fecs_trace_debugfs_ring_seq_ops' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:511:30: warning: symbol 'gk20a_fecs_trace_debugfs_ring_fops' was not declared. Should it be static? Bug 200299572 Change-Id: I62695f9711bcee1bf7d5831e42989ea4da169e42 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482942 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gp10b: fix sparse warningSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | Make function as static to fix below sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/gp10b.c:105:5: warning: symbol 'gp10b_init_gpu_characteristics' was not declared. Should it be static? Bug 200299572 Change-Id: I50a54ac611cacdf2a787aedc91014abd047db8b8 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482934 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: mm_gk20a: fix sparse warningSachin Nikam2017-05-17
| | | | | | | | | | | | | | | Make function as static to fix below sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/mm_gk20a.c:3351:22: warning: symbol '__get_pte_size_split_addr' was not declared. Should it be static? Bug 200299572 Change-Id: I46b8608e3a520748e33b00fede2ce28d842899af Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482918 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove dead function gk20a_gmmu_unmapSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | | | | While fixing sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/mm_gk20a.c:2586:6: warning: symbol 'gk20a_gmmu_unmap' was not declared. Should it be static? when gk20a_gmmu_unmap() is made static compiler complained that it is not used. Hence removing the unused function. Bug 200299572 Change-Id: I9dcfb504d7f0f9b4d53eba59ecf53d05d5da0dbd Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482907 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: volt: fix sparse warningSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | Make volt_volt_policy_construct() as static to fix below sparse wanring: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/volt/volt_policy.c:118:23 : warning: symbol 'volt_volt_policy_construct' was not declared. Should it be static? Bug 200299572 Change-Id: If9c340cb6a3b869c34527df020640c1a7cc3fbc7 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482900 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: fix static sparse warningsSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | | | | | | | | Fix below sparse warnings by making function static or including right header: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/fecs_trace_gp10b.c:45:6: warning: symbol 'gp10b_init_fecs_trace_ops' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp106/hal_gp106.c:195:5: warning: symbol 'gp106_init_gpu_characteristics' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pstate/pstate.c:175:5: warning: symbol 'pstate_construct_super' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pstate/pstate.c:195:5: warning: symbol 'pstate_construct_3x' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pstate/pstate.c:204:15: warning: symbol 'pstate_construct' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pstate/pstate.c:218:5: warning: symbol 'pstate_insert' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/clk/clk_arb.c:1457:6: warning: symbol 'nvgpu_clk_arb_ioctl_event_dev' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pmgr/pmgr.c:68:5: warning: symbol 'pmgr_pwr_devices_get_power_u64' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pmgr/pmgr.c:80:5: warning: symbol 'pmgr_pwr_devices_get_current_u64' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/pmgr/pmgr.c:92:5: warning: symbol 'pmgr_pwr_devices_get_voltage_u64' was not declared. Should it be static? Bug 200299572 Change-Id: I0112ba3af5b858d2ce2a37a8366dcb6be1eb688d Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482866 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_cond in semaphore wqTerje Bergstrom2017-05-16
| | | | | | | | | | | | | Change semaphore wait queue to use nvgpu_cond instead of Linux wait queue. JIRA NVGPU-14 Change-Id: I3be5097ded168300b4480e986218d9f4fd6104b1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469852 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Don't reject unusual ZBC colorsLauri Peltonen2017-05-16
| | | | | | | | | | | | | | For some use cases, we need to program two ZBC slots with the same DS color value but different FB color value. Remove the check that would reject such unorthodox ZBC entries. Bug 1847208 Change-Id: Ibed2c8195516832789470f7f1a8c865568694c28 Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Reviewed-on: http://git-master/r/1477611 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 21:38:21 -0500