| Commit message (Collapse) | Author | Age |
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Required to support multiple SM
JIRA GPUT19X-75
Change-Id: If4397f29bfc4f31da13187182f0ae3c7423d0432
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1490096
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
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-Add sm input param for handle_sm_exception and
pre_process_sm_exception for gr ops/functions.
-Add functions to calculate gpc and tpc reg offsets.
-Add function to find SMs which raised SM exception.
JIRA GPUT19X-75
Change-Id: I257e7342ddabadb1556c9551c50a54d34b0f9d1e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1476108
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
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Required for multiple SM support in t19x
JIRA GPUT19X-75
Change-Id: I14e19700849faf5180813e82179707a78eb977a5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1510358
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Sets default polling rate for GPU podgov governor to 25ms.
Jira NVGPU-20
Change-Id: I994f3aab772b41c238f6755e0bd22ed3d4b27cf4
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: https://git-master/r/1473141
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove dependency for nvgpu to invoke devfreq govenor on every
gk20a_busy/idle() call. This dependency was originally necessary to
track GPU load (busy vs idle) in software. However, since we currently
read the load GPU from HW/PMU there is no need to invoke the devfreq
governor in this path. Instead it can use timer-based polling.
Jira NVGPU-20
Change-Id: Id09f89a8a562ed49164a2e06dcbb901e4a46e7d5
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: https://git-master/r/1473140
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add vgpu support for ModeE perfbuffers
- VM allocation is handled by the kernel, with final mapping
handled by the RM server
- Enabling/disabling the perfbuffer is handled by the RM server
Bug 1880196
JIRA EVLR-1074
Change-Id: Ifbeb5ede6b07e2e112b930c602c22b66a58ac920
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master/r/1506747
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Remove the special cases for fmodel in the GMMU allocation code. There
is no reason to treat fmodel any different than regular DMA memory.
If there is no IOMMU the DMA api will handle that perfectly acceptably.
JIRA NVGPU-30
Change-Id: Icceb832735a98b601b9f41064dd73a6edee29002
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master/r/1507562
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the ltc
sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I1110e301e57b502cf7f97e6739424cb33cc52a69
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1507564
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Remove ltc_common.c and integrate the included functions
into device specific ltc_gXXXX.c files. Merge non-device reg
definition dependent ltc functions into ltc_gk20a.c/h.
Prior to this patch, ltc_common.c was being directly included
into the device specific ltc source files as a workaround to
allow different devices to share the same code but still include
in different hw reg definitions.
Given that this approach was not adopted for other
systems, this code has been separated out for readability and
consistency.
Jira NVGPU-74
Change-Id: I4eea301927418532cc150b029535f165928cab89
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1507502
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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- replace usage of pmu_copy_to_dmem() with
nvgpu_flcn_copy_to_dmem()
- delete nvgpu_flcn_copy_to_dmem()
JIRA NVGPU-99
Change-Id: I9bb5837556e144521b181f9e15731beee08b435a
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506577
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- Added falcon interface/HAL copy to DMEM
method.
JIRA NVGPU-99
Change-Id: I783f8046e96d9e47091afb943697256c289ebab6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506576
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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- replace usage of pmu_copy_from_dmem() with
nvgpu_flcn_copy_from_dmem()
- delete nvgpu_flcn_copy_from_dmem()
JIRA NVGPU-99
Change-Id: If0919187078f95a165d6a152f180549ac121beaa
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506534
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- Added interface/HAL method for falcon
to support copy from dmem
- Method to read dmem size
- Method to check error on input parameters
JIRA NVGPU-99
Change-Id: Id27b2b7f4f338196fc3b187555718543445d35bd
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1506525
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Move sysfs dependencies from gk20a/ and gp10b/ to common/linux. At
the same time the gk20a and gp10b variants are merged into one.
JIRA NVGPU-48
Change-Id: I212be8f1beb8d20a57de04a57513e8fa0e2e83b4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master/r/1466055
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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FECS override PMU support was removed with http://git-master/1297370.
Remove the sysfs API that is wired to that.
Change-Id: I5802e5a8dd78b80c3d255dd93587b24df9203fca
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master/r/1507934
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This is needed to handle new pbmda intr_1 in t19x
JIRA GPUT19X-47
Change-Id: If75de0b57f3f18420aff07ee99feaad67ac63752
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1329373
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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It'll let gpu tests pass by using sem before enabling syncpt.
Especially for vgpu, the plat data is shared across different GPUs, so
we can use dt to override and disable syncpt.
Jira VFND-3796
Change-Id: I2cc32a1ea1cc1097047427eb1e52ec50c3a0bf90
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1507494
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
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Add gm20b "B" revision chipip.
Bug 1870669
Change-Id: Ife31e6d739aabb8ef4a4f401091c3202b415a70e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1490650
Reviewed-by: Samuel Payne <spayne@nvidia.com>
Signed-off-by: Samuel Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/1490648
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- set nvgpu_flcn_reset() to point to gk20a_pmu_reset()
- set PMU interrupt using nvgpu_flcn_enable_irq()
- replace pmu_idle with nvgpu_flcn_wait_idle()
JIRA NVGPU-57
Change-Id: I50d0310ae78ad266da3c1e662f1598d61ff7abb6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469478
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- Added flacon reset dependent interface & HAL
methods to perform falcon reset.
- method to wait for idle
- method to reset falcon
- method to set irq
- method to read status of CPU
- Updated falcon ops pointer to point gk20a
falcon HAL methods
- Added members to know support of falcon
& interrupt.
- Added falcon dependency ops member to support
flacon speicifc methods
JIRA NVGPU-99
JIRA NVGPU-101
Change-Id: I411477e5696a61ee73caebfdab625763b522c255
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469453
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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H/W header for gk20a, gm20b, gp10b &
Gp106 falcon controller.
JIRA NVGPU-56
Change-Id: Iec2066f83f499e86f5d28860ffaa6bdac0716c71
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1331258
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Reorder non-function pointer members of gpu_ops to be at the
very end of their respective sub-structs. This allows for
easier debug interpretation and slightly improves readability.
Jira NVGPU-107
Change-Id: Ife3279180306de70f7fad6760f616c6d69769b36
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: http://git-master/r/1506591
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move devfreq field from struct gk20a to os_linux. It's a Linux
specific framework.
JIRA NVGPU-38
Change-Id: I1e00f5a80e31deb4aaba379274c3a7a7b04d963b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505176
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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dma_params is inherently a Linux structure, so move it to os_linux.
JIRA NVGPU-38
Change-Id: If81249b3cb7d65187202df72b35a1d24e274263b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505928
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move Linux devnode related fields to a new header file os_linux.h.
The class structure is defined in module.c, so move its declaration
to module.h.
JIRA NVGPU-38
Change-Id: I5d8920169064f4289ff61004f7f81543a9aba221
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505927
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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linux/version.h and linux/sched.h are not used by gk20a.h, so remove
them.
acr_gm20b.h and bus_gk20a.h are not needed by gk20a.h, so remove them.
pmu_gp106.c relies on implicit #include of acr_gm20b.h by gk20a.h, so
add that as an explicit #include.
Remove #include of iomap.h. platform_gk20a_tegra.c legacy rail gating
code still relies on access to that header, so add it as explicit
include.
JIRA NVGPU-38
Change-Id: I1cf57b9d3a7ee5e3cad298341107e317b4b8662f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505926
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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When contexts are unloaded from GR, the valid bit is reset
but the instance pointer information remains intact.
Check valid bit in *is_channel_ctx_resident* function as
valid bit might not be set when *get_channel_from_ctx function*
is called from gr_isr
Bug 200289491
Change-Id: I4da7f04794c7e7e80b511756dbd851205cd76fbc
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1505908
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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ctx id should be read from right mem area else
it will return 0 and cause issue with fecs methods
that depend on ctx id
Bug 200289491
Change-Id: Iba74f653afccf34e95cd90175833e3270239c264
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1505902
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Enable the log.h debug printing to print log messages on
boot based on the NVGPU_DEFAULT_DBG_MASK define. Previously
this only affected the legacy gk20a_dbg() function which
is being slowly phased out.
Change-Id: I74caed3bcdeec5481fb34e3151cfbc1acaabf233
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1505922
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add backward support for HW2.5 Rev.A board:
- no INA3221 for voltage, current, and power
- use PG418 MCLK switching sequences
Allow VBIOS from .53 for PG419
Bug 1929155
Change-Id: Ifacfc8cff6d00f66af92305119d0f0d3b9a1e438
Reviewed-on: http://git-master/r/1497001
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
(cherry picked from commit 952778f814916b0b3d5043c43755bfccb467c3d4)
Reviewed-on: http://git-master/r/1497295
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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move mclk switching to gp106 hal.
Bug 1921082
JIRA EVLR-1269
Change-Id: I97812b871384460bec88fddac0f6a326df12fc45
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1499393
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VBIOS memory settings have been updated for PG419, significantly
modifying MCLK switching sequences. This change adds support for
PG419 tables, while remaining backward compatible with PG418.
Bug 1921082
JIRA EVLR-1269
Change-Id: Ia8a1f8b3f482e348a46f0acb540af23287d9c11e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1484110
(cherry picked from commit c2444ae89caf97da2702e8486cc8fb162b4f50b1)
Reviewed-on: http://git-master/r/1485300
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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tegra/linux path was created to separate Tegra kernel specific
dependencies from common Linux specific dependencies. The split has
not really worked, so merge tegra/linux to common/linux.
JIRA NVGPU-38
Change-Id: I582e12a0a8b5de62a29e41a37f4f8b8caae955fc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505178
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Always check for valid channel gr_ctx before issuing channel
preempt. Commands like "echo > /dev/nvhost-gpu" create channel
to just power-up gpu without any valid channel context. So
don't try to preempt those channels.
Bug 1937331
Change-Id: I48a4bfd35728b83b27eb968e51a56b900d1fa799
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1505783
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Instead of the very coarse jiffies, use the more accurate monotonic
Linux ktime API for the nvgpu timeout API.
The expiration time is handled as an u64 nanosecond value to hide the
ktime_t from the public nvgpu_timeout struct. The conversion is cheap.
Jira NVGPU-83
Change-Id: I08a0a67be8935d46f05356162281463d4eb6f4ae
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1505390
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove pointer to struct device from gk20a_gpu_ctx. The pointer is
not used anywhere, and it adds an unnecessary Linux dependency.
JIRA NVGPU-38
Change-Id: Id5843a21e4809ca840e4f5d561728f859bbd964e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505202
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Pass struct gk20a to secure alloc API instead of Linux specific
struct device.
JIRA NVGPU-38
Change-Id: I6d9afaeeff9b957351072caa29690f2caf58f858
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505179
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Pass struct gk20a pointer to gk20a_busy_noresume() and
gk20a_idle_nosuspend(). This reduces the number of dependencies to
Linux specific struct device.
JIRA NVGPU-38
Change-Id: I5e05be32e2376bc8be5402bb973c20e28c35a1c3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505177
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Delete a version of WRITE_ONCE() that gk20a.h defines only for
kernels older than 3.18. We don't support kernels below 4.4.
JIRA NVGPU-38
Change-Id: I0af50936523fde9929c21eea0547b91dac4a0081
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505175
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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We don't use cooling device, so delete its definition from gk20a.h.
JIRA NVGPU-38
Change-Id: Ie39d3dea4f0de870ebe6493bbf90a286452ae61d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505174
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Move internal channel trace function to ioctl_channel.c. It's not
used anywhere else, so it does not need to be exported outside
ioctl_channel.c.
JIRA NVGPU-38
Change-Id: If6300781961ffffad4f63bc212d68adf8f3497fc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505173
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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The function tsg_gk20a_from_ch() is an operation on tsg_gk20a
structure, so move it to be part of tsg_gk20a.c and export
via tsg_gk20a.h.
JIRA NVGPU-38
Change-Id: I2afba3533ac829088a5edf8b16cf4e071b69b77a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505172
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Time correlation does not have chip or OS specific dependencies, so
move it to generic new source file bus.c.
JIRA NVGPU-38
Change-Id: Ic7fdf8c9ccacf05baf1b3438a86b28e517093641
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1505171
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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The gk20a_channel_wait() ioctl still considers a timeout value type to
be jiffies, but NVGPU_COND_WAIT_INTERRUPTIBLE takes milliseconds. Pass
the millisecond value from args directly to the cond wait.
NVGPU_NO_TIMEOUT is the max unsigned value that fits in 32 bits, so it
does not need to be tested explicitly.
Jira NVGPU-83
Change-Id: If7979c015696b2d1e0bbe9612c546410a0f41f2e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1505422
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Currently callbacks from the PM_QOS framework (for
thermal events), result in a RPC call to set GPU frequency.
Since the governor will now be responsible for setting desired
rate, the max PM_QOS callback will now cap the possible
GPU frequency w/ a new RPC call to the server. The server
is responsible for setting the ultimate frequency
based on the cap & desired rates.
Jira VFND-3699
Change-Id: I806e309c40abc2f1381b6a23f2d898cfe26f9794
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295543
(cherry picked from commit e81693c6e087f8f10a985be83715042fc590d6db)
Reviewed-on: http://git-master/r/1282467
(cherry picked from commit 7b4e0db647572e82a8d53e823c36b465781f4942)
Reviewed-on: http://git-master/r/1321836
(cherry picked from commit 57dafc08a57ea768eb302bf1adb901425ce2f835)
Reviewed-on: http://git-master/r/1313469
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add devfreq governor support in order to allow frequency scaling
in virtualization config. GPU clock frequency operations are
re-directed to the server over RPC.
Bug 200237433
Change-Id: I1c8e565a4fff36d3456dc72ebb20795b7822650e
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295542
(cherry picked from commit d5c956fc06697eda3829c67cb22987e538213b29)
Reviewed-on: http://git-master/r/1280968
(cherry picked from commit 25e2b3cf7cb5559a6849c0024d42c157564a9be2)
Reviewed-on: http://git-master/r/1321835
(cherry picked from commit f871b52fd3f553d6b6375a3c848fbca272ed8e29)
Reviewed-on: http://git-master/r/1313468
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
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msleep is not recommended for (1ms - 20ms). So use usleep_range
instead to have a more deterministic sleep time.
Also fix the print for target_ref_count that could either be 2 or
1 based on whether GPU rail-gating is enabled or not.
Bug 200294536
Change-Id: I26c9ed8a1badc84db5efa89347a227e6b46f603c
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/1500409
Reviewed-on: http://git-master/r/1503628
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Remove the two other unnecessary options based on jiffies and
gettimeofday, leaving only the time stamp counter clocksource.
Jira NVGPU-83
Change-Id: I289951aba832eda36cb9cb68b7e41e6061ec3a03
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1503000
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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This patch also adds new interface for GR INIT PARAM cmd
and adds new pmu command to update sub-feature mask for ELPG.
JIRA GPUT19X-20.
Change-Id: Id3b3b65882c714f80a05de5660895258b26a08bd
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1503141
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Save the time using nvgpu_current_time_ms() instead of the
Linux-specific jiffies counter.
Jira NVGPU-83
Change-Id: I19b4296d8b64ddf52506144e77d151f668ff7838
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1503002
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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