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* gpu: nvgpu: use explicit phys address for pci simulationDeepak Nibade2018-06-29
| | | | | | | | | | | | | | | | | | | | nvgpu_mem_get_addr() gets virtual/phys address depending on the platform. But we need to explicitly use physical addresses to configure PCI simulation support since simulator expects physical address only Hence use nvgpu_mem_get_phys_addr() explicitly to configure msg/send/recv buffers needed for pci simulation support Jira NVGPUT-41 Change-Id: I6870feef35fe81d43189fa048dc2f7052926bcc4 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1756843 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Keep lock while unreffing mappingsAlex Waterman2018-06-28
| | | | | | | | | | | | | | | | | | In the vm_area free code, when unreffing the mappings owned by the vm_area, we need to continue holding the VM lock. Also add a comment specifying this requirement in the VM code. Bug 2156667 Change-Id: If0b430f045e4c585fcba2d3176163e5b19be8326 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1763235 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove nvgpu_mem_{begin,end}()Konsta Holtta2018-06-28
| | | | | | | | | | | | | | | The NVGPU_DMA_NO_KERNEL_MAPPING flag is going away, and these functions are no longer used. Delete them. Change-Id: I0084d64c92783dd65306871e5cf6bd6366087caf Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761581 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: don't nvgpu_mem_{begin,end}() sim bufsKonsta Holtta2018-06-28
| | | | | | | | | | | | | | | nvgpu_dma_alloc_sys() gives cpu-mapped memory by default. Remove the explicit calls to map and unmap the sim buffers. Change-Id: Icf71961c16a8b2f5dae24382cc927c7a802a769a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761580 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove {map,unmap}_gmmu_pages()Konsta Holtta2018-06-28
| | | | | | | | | | | | | | | The GPU page tables are always mapped to the CPU now, so they don't need the nvgpu_mem_{begin,end}() calls. Change-Id: Ic48eeed3a6f002c78f89ef07922cddf835337de3 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761579 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove unnecessary nvgpu_memset callsKonsta Holtta2018-06-28
| | | | | | | | | | | | | | | | Some graphics context buffers are explicitly cleared to zero after allocation. That's not necessary because the allocator gives zero-initialized memory already, so remove the clears. Change-Id: I8f9913605801e35082762e7743762d97f88e1d12 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761578 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: don't use alloc_flags for subctx headerKonsta Holtta2018-06-28
| | | | | | | | | | | | | | No need to use the flags variant with no flags. Change-Id: I14effca4e7071e91230dd89c435843d128e022b1 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761577 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: don't mem_{begin,end}() for grKonsta Holtta2018-06-28
| | | | | | | | | | | | | | | | | | | | | Now that GR buffers always have a kernel mapping, remove the unnecessary calls to nvgpu_mem_begin() and nvgpu_mem_end() on these buffers: - global ctx buffer mem in gr - gr ctx mem in a tsg - patch ctx mem in a gr ctx - pm ctx mem in a gr ctx - ctx_header mem in a channel (subctx header) Change-Id: Id2a8ad108aef8db8b16dce5bae8003bbcd3b23e4 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1760599 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: kconfig: remove GK20A_PERFMON configseshendra Gadagottu2018-06-28
| | | | | | | | | | | | | | | | | | Removed de-funct GK20A_PERFMON config from Kconfig, since code related to this functionality removed long ago and DEVFREQ is getting used for gpu frequency scaling. Change-Id: Ic6828117a06f09446b64c789a1475c520ca520f8 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747883 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check for valid scaling profile dataseshendra Gadagottu2018-06-28
| | | | | | | | | | | | | Check for valid scaling profile private data before making calls to bandwidth manager. Bug 200423741 Change-Id: Iff12b4a26ff0dfb2c32248b325a07e97f2de4e98 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1763601 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gp106: fix scaling for mclkThomas Fleury2018-06-28
| | | | | | | | | | | | | | | | | | | Change mclk scaling factor from 2 to 4, as we use dramdiv4 to measure effective frequency. Bug 2212598 Change-Id: I154a74712dbedf315f755ee51f75a06795841a1c Reviewed-on: https://git-master.nvidia.com/r/1761896 (cherry picked from commit 35e26a5165ac08f783420343262e05e1d6d82996) Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1762345 Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove use of struct fence type.Debarshi Dutta2018-06-28
| | | | | | | | | | | | | | | | | | | struct fence and fence* APIs have changed to struct dma_fence and dma_fence* respectively. This patch makes the required changes that avoids using the struct fence type to prevent making API changes in nvgpu. Bug 200417423 Change-Id: I566de58a3659cbc2495670136dc2fc65862b46e7 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1754164 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: disable powergating for kernel-4.14 in gp10b temporarily.Debarshi Dutta2018-06-28
| | | | | | | | | | | | | | | | | | | All the powergating features such as railgating and other clock-gating are disabled temporarily for kernel-4.14 which leads to several kernel-panics. These will be re-enabled later. Bug 200414723 Bug 200424473 Change-Id: I72b95bf027517309bd4ae32d0513e458ae46283f Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1756503 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move submit code to commonKonsta Holtta2018-06-27
| | | | | | | | | | | | | | | | To finish OS unification of the submit path, move the gk20a_submit_channel_gpfifo* functions to a file that's accessible also outside Linux code. Also change the prefix of the submit functions from gk20a_ to nvgpu_. Jira NVGPU-705 Change-Id: I8ca355d1eb69771fb016c7a21fc7f102ca7967d7 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1760421 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: posix: Fix ffs() and fls() impl in POSIXAlex Waterman2018-06-27
| | | | | | | | | | | | | | | | | The GCC builtins act slightly differently than the Linux versions of these functions. This patch adds the necessary glue to emulate the Linux versions identically. JIRA NVGPU-525 Change-Id: Idadbecdfd516c68f3d3eb20eca495dc1eaa02c5b Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1741951 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* PMU: t19x: PMU ucode update.Deepak Goyal2018-06-27
| | | | | | | | | | | | | | | | | | | | | | | Remove Gr engine reset during ELPG entry. Engine reset is causing clock gating logic to get reset thus clock gating gets disabled during ELPG entry sequence. It leads to higher power numbers observed at light graphics. Removing GR reset during ELPG entry helped save power. Bug 2180198 Change-Id: I957951eb93f9d044f4d9a908f2b56a4903dfbfad Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1757695 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add bios debugfs nodeThomas Fleury2018-06-27
| | | | | | | | | | | | | | | | | Add bios debugfs node to get current VBIOS version. Bug 2113607 Change-Id: I8d52b651f923080000a4ad529e7efa05667563ba Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1743030 Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu:nvgpu: Enable P-State for Gv100Vaikundanathan S2018-06-27
| | | | | | | | | | Bug 200399373 Change-Id: Ia5d7be7cdb5679c867350da515978d156984a6ea Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1726914 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert: GV11B runlist preemption patchesAlex Waterman2018-06-26
| | | | | | | | | | | | | | | | | | | | This reverts commit 2d397e34a5aafb5feed406a13f3db536eadae5bb. This reverts commit cd6e821cf66837a2c3479e928414007064b9c496. This reverts commit 5cf1eb145fef763f7153e449be60f1a7602e2c81. This reverts commit a8d6f31bde3ccef22ee77023eaff4a62f6f88199. This reverts commit 067ddbc4e4df3f1f756f03e7865c369a46f420aa. This reverts commit 3eede64de058fcb1e39d723dd146bcd5d06c6f43. This reverts commit 1407133b7e1b27a92ee8c116009541904d2ff691. This reverts commit 797dde3e32647df3b616cea67f4defae59d38b3f. Looks like this makes the ap_compute test on embedded-qnx-hv e3550-t194 quite bad. Might also affect ap_resmgr. Signed-off-by: Alex Waterman <alexw@nvidia.com> Change-Id: Ib9f06514d554d1a67993f0f2bd3d180147385e0a Reviewed-on: https://git-master.nvidia.com/r/1761864 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: fix perf output buffer size validationAparna Das2018-06-26
| | | | | | | | | | | | | Currently we check if offset + size of perf output buffer crosses 4GB boundary. This check should be fixed to offset + size - 1. Bug 200422626 Change-Id: I87b1c0761a97903780ddde871d5ca396bf26170d Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1758338 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: enable RMW for gpu atomicsAshish Srivastava2018-06-26
| | | | | | | | | | | | | | | | | | | | | Separate HAL added in gv11b and gv100 for init_gpc_mmu function. In gv11b HAL, RMW is enabled for gpu atomics as default. In gv100 HAL, GPC atomic capability mode will get set based on the FB MMU capability. If GPU is connected through NVLINK then mmu will be set to RMW mode, else it will be in L2 mode. Bug 200390336 Change-Id: I224934f83d1762ec864ef8da7265dd01d86893a0 Signed-off-by: Ashish Srivastava <assrivastava@nvidia.com> Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1735137 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove variable that's only ever setAlex Waterman2018-06-25
| | | | | | | | | | | | | | Remove a variable that is only set but never used. Necessary for userspace builds to compile. JIRA NVGPU-525 Change-Id: Ie2f8f90e002a09f089a96a270c264ea1815445ad Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1760666 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: posix: Add missing bus C files to Makefile.sourcesAlex Waterman2018-06-25
| | | | | | | | | | | | | | | | | Add two missing bus files to the userspace build. This caused a couple of missing symbol problems when compiling. JIRA NVGPU-525 Change-Id: I6566e35166b4b2b00a4e8960f0728bf59957d363 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1757490 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: posix: Define __user to nothing in POSIXAlex Waterman2018-06-25
| | | | | | | | | | | | | | | | | | This __user field is used to annotate certain varibles in Linux. So define it in the POSIX headers so that common code can compile even with these Linux annotations. JIRA NVGPU-525 Change-Id: I417436ac40ed12f6551da600d8824f9bd7c191af Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1757489 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: fix fb flush issueseshendra Gadagottu2018-06-25
| | | | | | | | | | | | | | | | | | | | | membar.sys does synchronization with the whole system (GPU and CPU), membar.gl does synchronization within the GPU. In gv11b, fb flush is generating membar.gl instead of membar.sys, which is an issue. To fix this issue. following WAR is used: 1. Use bar1 engine id and bind it to a particular pdb, 2. Then instead of a fb_flush, issue a tlb invalidate of the bar1 pdb. Now allocation of vm for bar1 instance block and bar1 binding is done without check for bar1 support. Only bar1 register mapping is done based on bar1 support enabled. Bug 2112790 Change-Id: I76f43f1178a68f10823d48bc9da55d2bd686dd52 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1750257 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: add runlist abort & remove bare channelSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -Add support for aborting runlist/s. Aborting runlist/s, will abort all active tsgs and associated active channels within these active tsgs -Bare channels are no longer supported. Remove recovery support for bare channels. In case there are bare channels, recovery will trigger runlist abort Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: I6bec8a0004508cf65ea128bf641a26bf4c2f236d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640567 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: preempt runlist if tsg preempt times outSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -Even though tsg preempt timed out, teardown sequence would by design require s/w to issue another preempt. If recovery includes an ENGINE_RESET, to not have race conditions, use RUNLIST_PREEMPT to kick all work off, and cancel any context load which may be pending. This is also needed to make sure that all PBDMAs serving the engine are not loaded when engine is reset -Add max retries for pre-si platforms for runlist preempt done polling loop Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: If9d1731fc17e7e7281b24a696ea0917cd269498c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1709902 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: acquire/release runlist_lock during teardownSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recovery can be called for various types of faults. Make sure current teardown is done before proceeding to next one. Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: I2073cc4f659fcc2103cb1fc8b7d9e1b2f1fb466f Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1662681 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove timeout_rc_type i/p paramSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -is_preempt_pending hal does not need timeout_rc_type input param as for volta, reset_eng_bitmask is saved if preempt times out. For legacy chips, recovery triggers mmu fault and mmu fault handler takes care of resetting engines. -For volta, no special input param needed to differentiate between preempt polling during normal scenario and preempt polling during recovery. Recovery path uses preempt_ch_tsg hal to issue preempt. This hal does not issue recovery if preempt times out. Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: Ie76a18ae0be880cfbeee615859a08179fb974fa8 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1709799 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: preempt timeout set to 1000 msSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For Si platforms, gk20a_get_gr_idle_timeout returns 3000 ms i.e. 3 sec. Currently this time is used for polling each pbdma, eng and runlist and this conflicts channel timeout if preempt fails. Use 1000 ms timeout for polling preempt timeout when timeouts are enabled else use gk20a_get_gr_idle_timeout. For non-si platforms, polling loop is depending on max number of retries. Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: Icdb69b7b7d17292f2b6a43f1d8e9d75ff545d0ae Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1739543 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: do not poll preempt done if eng intr pendingSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | -During polling eng preempt done, reset eng only if eng stall intr is pending. Also stop polling for eng preempt done if eng intr is pending. -Add max retries for pre-si platforms for poll pbdma and eng preempt done polling loops. Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: I66b07be9647f141bd03801f83e3cda797e88272f Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1694137 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: disable/enable runlist sched during tsg preemptSeema Khowala2018-06-24
| | | | | | | | | | | | | | | | Disable sched before tsg preempt and re-enable after preempt is done or timed out. This is a WAR to fix Bug 2065990. Bug 2065990 Change-Id: I5f807449960d83366a3ed8c352ba4627fc1e7836 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1665319 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv100: add support for FECS traceVaibhav Kachore2018-06-22
| | | | | | | | | | | | | | | - This patch sets required fecs trace functions to hals. - In gv100, GPU VA needs to programmed in ucode to get FECS trace. Hence, setting this "NVGPU_FECS_TRACE_VA" characteristic to be true. EVLR-2708 Change-Id: I41845a1db8452b8e3fa9d67ecc4cabfac503fd0b Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747269 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_alloc_vid_at for dGPU ACRTerje Bergstrom2018-06-22
| | | | | | | | | | | | | | | | | | ACR allocates buffers from vidmem and passes explicitly flag NVGPU_DMA_NO_KERNEL_MAPPING. Vidmem buffers are never mapped to CPU, and dGPU ACR does not actually care, so switch to using nvgpu_alloc_vid_at(). This removes another explicit dependency to NVGPU_DMA_NO_KERNEL_MAPPING, which is going to be removed. Change-Id: I532d40c5ba9e71f07461c526bd2a43e1eb01a290 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1753711 Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add nvgpu_dma_alloc_vid_at()Terje Bergstrom2018-06-22
| | | | | | | | | | | | | | Add a wrapper function nvgpu_dma_alloc_vid_at() for performing vidmem allocation at a specific address without needing to pass any flags. Change-Id: Ib7a21a4fd33120749cf7b79750c3a382ba08b470 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1753710 Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Update Linux side VM code for API solidificationAlex Waterman2018-06-22
| | | | | | | | | | | | | | | | | | | | | | Update the Linux specific code to match the MM API docs in the previous patch. The user passed page size is plumbed through the Linux VM mapping calls but is ultimately ignored once the core VM code is called. This will be handled in the next patch. This also adds some code to make the CDE page size picking happen semi-intelligently. In many cases the CDE buffers can be mapped with large pages. Bug 2011640 Change-Id: I20e78e7d5a841e410864b474179e71da1c2482f4 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1740610 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Update __get_pte_size() to check IOMMU-abilityAlex Waterman2018-06-22
| | | | | | | | | | | | | | | | | | | | When generating the PTE size for a given mapping the code must consider whether the GPU is being IOMMU'ed. The presence and usage of an IOMMU implies the buffers will appear contiguous to the GPU. Without an IOMMU we cannot assume that and therefor must use small pages regardless of the size of the buffer to be mapped. Bug 2011640 Change-Id: I6c64cbcd8844a7ed855116754b795d949a3003af Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1697891 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: resolve missing -ENOSYS errorDebarshi Dutta2018-06-22
| | | | | | | | | | | | | | | | Added the header #include <nvgpu/errno.h> in os_fence.h Bug 200414723 Change-Id: I2a4290d2b9f80fdb66665ff4c8e8f3f163b9f2c3 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1721543 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: resolve missing kfree error messageDebarshi Dutta2018-06-22
| | | | | | | | | | | | | | | | | | Insert the header <linux/slab.h> to resolve the kfree error for driver_common.c Bug 200414723 Change-Id: I2696b88d3a29decb2c984f69295274ccda6c0069 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1721522 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: resolve missing DMA_ERROR_CODE error message.Debarshi Dutta2018-06-22
| | | | | | | | | | | | | | | | | | Add the header <linux/dma-mapping.h> to nvgpu_mem.c file to resolve compilation errors in linux-4.14 Bug 200414723 Change-Id: Ie6fd532688a1bf6d9705d423fcfde660693a3654 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1721526 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: zero prealloc indices on initKonsta Holtta2018-06-21
| | | | | | | | | | | | | | | | | | Initialize the prealloc job list put and get indices to zero when allocating these resources. Otherwise we'd get whatever got left from the channel's previous lifetime. Change-Id: Idb17ec7bfbd0c1e2121c7a63e41dc5845560e988 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1756871 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sami Kiminki <skiminki@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move slices_per_ltc & cacheline_size init to floorsweepingRichard Zhao2018-06-21
| | | | | | | | | | | | | It was initialized at .init_comptags, but we may also need them without comptags. Jira NVGPUT-63 Change-Id: Ie818c3ecf890fc84323b9662a32d666a6d2b3936 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1756373 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: suspend/resume support for vGPUDeepak Bhosale2018-06-21
| | | | | | | | | | | | | | | | | | | | | | | - Added suspend/resume power management callbacks for vGPU - Added suspend/resume commands for communication between vGPU and RM server - Added suspend/resume message parameters for IVC messages between vGPU and RM server JIRA EVLR-2305 JIRA EVLR-2306 Change-Id: I83a314b4e125a53117d16c5ea72dbc5d8ef96ef7 Signed-off-by: Deepak Bhosale <dbhosale@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1735153 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Nirav Patel <nipatel@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: only free wait_cmd if it existsKonsta Holtta2018-06-21
| | | | | | | | | | | | | | | | | | gk20a_submit_prepare_syncs can fall to error handling paths without an allocated wait command buffer. In that case, just don't try to free the null wait_cmd; the user never requested one. Change-Id: Ice9041c0efa9bb14cde917e7ea82f4a7b6bf537c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1756829 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sami Kiminki <skiminki@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: kernel version check for dma_buf_opsPritesh Raithatha2018-06-21
| | | | | | | | | | | | | | | | | | | In K4.14, dma_buf_ops members are renamed from kmap_atomic to map_atomic and kmap to map. So put the kernel version check to fix the build error for k4.14. Bug 200414723 Bug 200421495 Change-Id: Ic959960a43d2247f9cd4b530f9172a152bcbc08b Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747013 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Do not use NO_KERNEL_MAPPING for GRTerje Bergstrom2018-06-20
| | | | | | | | | | | | | | | | With arm64 mapping buffers to CPU is free. Remove the use of NO_KERNEL_MAPPING. Change-Id: Ic99ca6b7f8c698e2d3cb1d61a821939798bb237b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1753709 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: split gk20a_submit_append_gpfifoKonsta Holtta2018-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In gk20a_submit_channel_gpfifo the gpfifo entries can come from a kernel buffer or from userspace. To simplify the logic in gk20a_submit_append_gpfifo, extract out a function that copies the entries directly from userspace to the gpu memory for performance, and another function that copies from a kernel buffer to the gpu memory. The latter is used for kernel submits and when the gpfifo pipe exists which would mean that the gpfifo memory is in vidmem and is thus not directly accessible with a kernel virtual pointer. While this function is being changed a lot, also rename it to start with nvgpu_ instead of gk20a_. Additionally, simplify pushbuffer debug tracing by always using the kernel memory for the prints. Tracing when the gpfifo memory has been allocated in vidmem is no longer supported; sysmem is almost always used in practice anyway. Jira NVGPU-705 Change-Id: Icab843a379a75fb46054dee157a0a54ff9fbba59 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1730481 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: abstract away ioctl gpfifo readKonsta Holtta2018-06-20
| | | | | | | | | | | | | | | | | | | The biggest remaining Linuxism in the submit path is the copy_from_user() calls for reading the gpfifo entries to the HW-visible buffer. Abstract away the copy of one such segment starting at some offset and keep the wraparound logic and vidmem proxy in the core submit path. Jira NVGPU-705 Change-Id: I0c6438045c695e5e3f5da4fbc0c92d2c6e7f32cb Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1730480 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add submit entry points for kernel and ioctlKonsta Holtta2018-06-20
| | | | | | | | | | | | | | | | gk20a_submit_channel_gpfifo() supports reading the gpfifo entries from either a kernel buffer or an userspace buffer in an ioctl. Add two separate entry points: one for the ioctl and another for any other kernel use. This shortens the function prototypes and simplifies and clarifies the call sites slightly. Jira NVGPU-705 Change-Id: If5141a459261a451f78cc50972f4c94d95ba44d1 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1730479 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: PG refcount check moved to a wrapper function.Vinod G2018-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | Moved PG refcount checking to a wrapper function, this function manages the refcount and decides whether to call dbg_set_powergate function. Instead of checking the dbg_s->is_pg_disabled variable, code is checking g->dbg_powergating_disabled_refcount variable to know if powergate is disabled or not. Updating hwpm ctxsw mode without disabling powergate will result in priv errors. Bug 200410871 Bug 2109765 Change-Id: I33c9022cb04cd39249c78e72584dfe6afb7212d0 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1753550 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 10:56:19 -0500