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* gpu: nvgpu: acquire mutex for notifier readDeepak Nibade2016-12-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use &ch->error_notifier_mutex to protect writes and free of error notifier But we currently do not protect reading of notifier in gk20a_fifo_set_ctx_mmu_error() and vgpu_fifo_set_ctx_mmu_error() Add new API gk20a_set_error_notifier_locked() which is same as gk20a_set_error_notifier() but without the locks. In *_fifo_set_ctx_mmu_error() APIs, acquire the mutex explicitly, and then use this new API gk20a_set_error_notifier() will now just call gk20a_set_error_notifier_locked() within a mutex Bug 1824788 Bug 1844312 Change-Id: I1f3831dc63fe1daa761b2e17e4de3c155f505d6f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1273471 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: gk20a: Allow regops lists longer than 128Sami Kiminki2016-12-26
| | | | | | | | | | | | | | | | Process long regops lists in 4-kB fragments, overcoming the overly low limit of 128 reg ops per IOCTL call. Bump the list limit to 1024 and report the limit in GPU characteristics. Bug 200248726 Change-Id: I3ad49139409f32aea8b1226d6562e88edccc8053 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/1253716 (cherry picked from commit 22314619b28f52610cb8769cd4c3f9eb01904eab) Reviewed-on: http://git-master/r/1266652 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: replace tsg list mutex with rwsemKonsta Holtta2016-12-20
| | | | | | | | | | | | | | Lock only for modifications to the tsg channel list, and allow multiple concurrent readers. Bug 1848834 Bug 1814773 Change-Id: Ie3938d4239cfe36a14211f4649ce72b7fc3e2fa4 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1269579 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add tsg_open HAL interfaceSachit Kadle2016-12-19
| | | | | | | | | | | | | | | | | | Add HAL interface for TSG open, which is intended to be called from the exisiting gk20a_tsg_open function. The tsg_open entryoint is only implemented for vgpu, as the server needs to clear metadata when a tsg is opened. Bug 200215060 Change-Id: Icc8fd602f31e52d9fa9b2e7786b665b9e7b9294e Signed-off-by: Sachit Kadle <skadle@nvidia.com> Reviewed-on: http://git-master/r/1249218 (cherry picked from commit 35c86f7c796c6574d3dc336e20012ea5c16d7cb4) Reviewed-on: http://git-master/r/1256468 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: fix va leak when call gk20a_vm_free_vaRichard Zhao2016-12-08
| | | | | | | | | | | | | | | | page size index needs to be set explicitly when call gk20a_vm_free_va. Bug 200255799 JIRA VFND-3033 Change-Id: I376c63e724b8f59aee389c54ca1589683536f043 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1262586 (cherry picked from commit 82c05633f17fa094d8e08c8a0fa4bad2d3275268) Reviewed-on: http://git-master/r/1263403 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: Fix signed comparison bugsTerje Bergstrom2016-11-17
| | | | | | | | | | | | Fix small problems related to signed versus unsigned comparisons throughout the driver. Bump up the warning level to prevent such problems from occuring in future. Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252068 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client""Peter Daifuku2016-11-14
| | | | | | | | | | | | | | | | | This reverts commit 5f1c2bc27fb9dd66ed046b0590afc365be5011bf. Added back now that matching RM server has been updated: In hypervisor mode, all GPU VA allocations must be done by client; fix this for the allocation of the hwpm ctxt buffer Bug 200231611 Change-Id: Ie5ce2c2562401b1f00821231d37608e3fc30d4a4 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1252138 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove IOCTL FREE_OBJ_CTXTerje Bergstrom2016-11-11
| | | | | | | | | | | | | We have never used the IOCTL FREE_OBJ_CTX. Using it leads to context being only partially available, and can lead to use-after-free. Bug 1834225 Change-Id: I9d2b632ab79760f8186d02e0f35861b3a6aae649 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1250004 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: Do not overwrite err code on failTerje Bergstrom2016-11-11
| | | | | | | | | | | | | | vgpu_vm_alloc_share() wants to return -EINVAL if VMA areas requested do not fulfill the criteria. The error code gets overwritten by a call to vgpu_comm_sendrecv(), which makes vgpu_vm_alloc_share() always return 0. Change-Id: I93f56025f963d1d4ad2f9b06139fce742d3be41b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1249961 GVS: Gerrit_Virtual_Submit Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com>
* gpu: nvgpu: Do not post events to unbound channelsTerje Bergstrom2016-11-07
| | | | | | | | | Change-Id: Ia1157198aad248e12e94823eb9f273497c724b2c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1248366 Tested-by: Sachit Kadle <skadle@nvidia.com> Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> GVS: Gerrit_Virtual_Submit
* Revert "gpu: nvgpu: vgpu: alloc hwpm ctxt buf on client"Sivaram Nair2016-11-04
| | | | | | | | | | This reverts commit 57821e215756b3df7acc9c0eb5017e39f141d381. Change-Id: Ic4801115064ccbcd1435298a61871921d056b8ea Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Reviewed-on: http://git-master/r/1247825 Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com> Tested-by: Rakesh Babu Bodla <rbodla@nvidia.com>
* gpu: nvgpu: vgpu: alloc hwpm ctxt buf on clientPeter Daifuku2016-11-03
| | | | | | | | | | | | | | | | | | In hypervisor mode, all GPU VA allocations must be done by client; fix this for the allocation of the hwpm ctxt buffer Bug 200231611 Change-Id: I0270b1298308383a969a47d0a859ed53c20594ef Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1240913 (cherry picked from commit 49314d42b13e27dc2f8c1e569a8c3e750173148d) Reviewed-on: http://git-master/r/1245867 (cherry picked from commit d0b10e84d90d0fd61eca8be0f9e879d9cec71d3e) Reviewed-on: http://git-master/r/1246700 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove global debugfs variableAlex Waterman2016-10-26
| | | | | | | | | | | | | | | Remove a global debugfs variable and instead save the allocator debugfs root node in the gk20a struct. Bug 1799159 Change-Id: If4eed34fa24775e962001e34840b334658f2321c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1225611 (cherry picked from commit 1908fde10bb1fb60ce898ea329f5a441a3e4297a) Reviewed-on: http://git-master/r/1242390 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: css_vgpu: fix sparse warningsPeter Daifuku2016-10-12
| | | | | | | | | | | | | | css_vgpu.c: fix warnings found by sparse tool Bug 200088648 Change-Id: I4d9d33c6438be8fa8f2ba9cb0b2f786c46b7c9ce Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1234605 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: move gpfifo submit wait to userspaceAingara Paramakuru2016-09-15
| | | | | | | | | | | | | | | | | Instead of blocking for gpfifo space in the nvgpu driver, return -EAGAIN and allow userspace to decide the blocking policy. Bug 1795076 Change-Id: Ie091caa92aad3f68bc01a3456ad948e76883bc50 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/1202591 (cherry picked from commit 8056f422c6a34a4239fc4993c40c2e517c932714) Reviewed-on: http://git-master/r/1203800 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: NULL out unused css entriesPeter Daifuku2016-09-13
| | | | | | | | | | | | | | | Fix cyclestats snapshots HAL entries in the vgpu case, need to null out the ones that don't apply. Bug 1700143 JIRA EVLR-278 Change-Id: I1b5f4652d1bf3283d96fdb3c2f66c4f69a9f6acc Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1217507 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: vgpu: cyclestat snapshot supportPeter Daifuku2016-09-08
| | | | | | | | | | | | | Add support for cyclestats snapshots in the virtual case Bug 1700143 JIRA EVLR-278 Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1211547 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: unify nvgpu and pci probeDeepak Nibade2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have completely different versions of probe for nvgpu and pci device Extract out common steps into nvgpu_probe() function and separate it out in new file nvgpu_common.c Divide task of nvgpu_probe() into further smaller functions Do platform specific things (like irq handling, memresource management, power management) only in individual probes and then call nvgpu_probe() to complete the common initialization Move all debugfs initialization to common gk20a_debug_init() This also helps to bringup all debug nodes to pci device Pass debugfs_symlink name as a parameter to gk20a_debug_init() This allows us to set separate debugfs symlink for nvgpu and pci device In case of railgating, cde and ce debugfs, check if platform supports them or not Copy vidmem_is_vidmem from platform to mm structure and set it to true for pci device Return from gk20a_scale_init() if we don't have either of governor or qos_notifier Fix gk20a_alloc_debugfs_init() and gk20a_secure_page_alloc() to receive device pointer instead of platform_device Export gk20a_railgating_debugfs_init() so that we can call it from gk20a_debug_init() Jira DNVGPU-56 Jira DNVGPU-58 Change-Id: I3cc048082b0a1e57415a9fb8bfb9eec0f0a280cd Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1204207 (cherry picked from commit add6bb0a3d5bd98131bbe6f62d4358d4d722b0fe) Reviewed-on: http://git-master/r/1204462 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add gpu_dbg_map_v message typeAlex Waterman2016-08-30
| | | | | | | | | | | | | | | | | | | | | Add a new debug message type: gpu_dbg_map_v. This is used for mapping messages that are not specifically memory map operations. Also cleanup the memory mapping debugging a bit since there was one duplicate print and the memory map print was difficult to parse visually. As a result the message has been modified to put the most important information first in an easily readable format. Bug 1732449 JIRA DNVGPU-12 Change-Id: Ib19c9371ee958009ab5a2d89b9610e699d070ee2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1198593 (cherry picked from commit 51dba53b06ca171cdb13d1707f2d026b0ce29f07) Reviewed-on: http://git-master/r/1147670 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: do not flush FECS record on engine resetThomas Fleury2016-08-29
| | | | | | | | | | | | | | | | | | | | | | | Flushing timestamp record method can fail in case FECS is not processing the main method queue. In particular, this occurs in case of ctxsw timeout, where we process fifo sched interrupts from the host, but FECS is still waiting for idle (grWFI). In such scenario, this adds huge delay in fifo recovery procedure (timeout on FECS method). Since flushing the last (incomplete) record from FECS would only be useful in that case (context switch ongoing), remove flush operation on engine reset. Note that an explicit ENGINE_RESET event (with pid) is inserted in user-facing ctxsw buffer on engine reset. Bug 200228310 Change-Id: I885525f8f197f81266b50db161bb511867fc74f4 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1207305 (cherry picked from commit 44391b6204fd648949295f90481b0c424d9a5ddf) Reviewed-on: http://git-master/r/1208414 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: fix channel abortRichard Zhao2016-08-23
| | | | | | | | | | | | | set timeout for channel force reset, to prevent submit immediately. Bug 1778448 JIRA VFND-2097 Change-Id: I729597a68cbdc5ed3f6c878955a10ae7c4659fa4 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1203298 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add channel wdt supportRichard Zhao2016-08-18
| | | | | | | | | | | | | | - avoid dump gr registers for vgpu - init wdt lock Bug 1776876 JIRA VFND-2151 Change-Id: I73293e0d23b614129c763cb22b09156a8e1432cc Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1202256 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: use force_reset_ch in ch wdt handlerRichard Zhao2016-08-18
| | | | | | | | | | | | | | - let force_reset_ch pass down err code - force_reset_ch callback can cover vgpu too. Bug 1776876 JIRA VFND-2151 Change-Id: I48f7890294c6455247198e0cab5f21f83f61f0e1 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1202255 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: get constants of gpc_tpc_count/mask arraysRichard Zhao2016-08-15
| | | | | | | | | | | | It'll cover multi-gpcs. JIRA VFND-2103 Change-Id: Ie82bdaad360294696c5a679d694f6f0e2364ca2e Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1194631 GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add getting gr constantsRichard Zhao2016-08-15
| | | | | | | | | | | | | | | | | | | | move below attributes to constants: TEGRA_VGPU_ATTRIB_GPC_COUNT TEGRA_VGPU_ATTRIB_MAX_TPC_PER_GPC_COUNT TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT TEGRA_VGPU_ATTRIB_NUM_FBPS TEGRA_VGPU_ATTRIB_FBP_EN_MASK TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP TEGRA_VGPU_ATTRIB_MAX_LTS_PER_LTC JIRA VFND-2103 Change-Id: Ic2ac14a0f8a1cf19a996bcef20bef0003d3b9a3b Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1194630 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add getting sm version constantsRichard Zhao2016-08-15
| | | | | | | | | | | | | | move below attributes to constants: TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH JIRA VFND-2103 Change-Id: I5d6aa8f4a49e65307989ef02d223c3ee31fcdeed Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1190481 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add getting ltc constantsRichard Zhao2016-08-15
| | | | | | | | | | | | | | | | | | | move below attributes to constants: TEGRA_VGPU_ATTRIB_COMPTAG_LINES TEGRA_VGPU_ATTRIB_L2_SIZE TEGRA_VGPU_ATTRIB_CACHELINE_SIZE TEGRA_VGPU_ATTRIB_COMPTAGS_PER_CACHELINE TEGRA_VGPU_ATTRIB_SLICES_PER_LTC TEGRA_VGPU_ATTRIB_LTC_COUNT JIRA VFND-2103 Change-Id: Iecf9717ee553a16ffe8de445be5bfe5a99c3a094 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1190480 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add getting constants golden img size and zcull ctx sizeRichard Zhao2016-08-15
| | | | | | | | | | JIRA VFND-2103 Change-Id: I180324b36a1c6b39300b92a2cff6448d7665679b Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1190479 GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add cmd to get RM server constantsRichard Zhao2016-08-15
| | | | | | | | | | | | | | | | Moving getting constant attributes into one cmd which will be called only once. This patch adds basic infrastructure and gpu arch info, max_freq and num_channels support. JIRA VFND-2103 Change-Id: I100599b49f29c99966f9e90ea381b1f3c09177a3 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1189832 GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: vgpu: add vgpu private data and helper functionsRichard Zhao2016-08-15
| | | | | | | | | | | | | | Move vgpu private data to a dedicated structure and allocate it at probe time. Also add virt_handle helper function which is used everywhere. JIRA VFND-2103 Change-Id: I125911420be72ca9be948125d8357fa85d1d3afd Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1185206 GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: move dbg_session_ops to gopsPeter Daifuku2016-07-30
| | | | | | | | | | | | | | Move dbg_session_ops to gops for better code consistency JIRA VFND-1905 Change-Id: I04a11d77dd8c26d9922e80e556822f80dd2bc36d Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1192641 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Change the allocator flag naming schemeAlex Waterman2016-07-19
| | | | | | | | | Move to a more generic name of GPU_ALLOC_*. Change-Id: Icbbd366847a9d74f83f578e4d9ea917a6e8ea3e2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1176445 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
* gpu: nvgpu: Support multiple types of allocatorsAlex Waterman2016-07-19
| | | | | | | | | | | | | | | | | | | | | | Support multiple types of allocation backends. Currently there is only one allocator implementation available: a buddy allocator. Buddy allocators have certain limitations though. For one the allocator requires metadata to be allocated from the kernel's system memory. This causes a given buddy allocation to potentially sleep on a kmalloc() call. This patch has been created so that a new backend can be created which will avoid any dynamic system memory management routines from being called. Bug 1781897 Change-Id: I98d6c8402c049942f13fee69c6901a166f177f65 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1172115 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
* gpu: nvgpu: process granularity for FECS tracesThomas Fleury2016-07-19
| | | | | | | | | | | | | | | | | | | | | | | When processing FECS traces, a hash table is used to retrieve the 'pid' of the process that created the channel/TSG. Report process identifer (aka tgid in kernel) instead of thread identifier (aka pid) for FECS traces. Bug 1736423 Change-Id: I54cb9d298b9fe3e1cccdd7145604cd01c5758c9d Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1166501 (cherry picked from commit f7fd1f6d7ad0753b787ec20604a08a1f4882fe6f) Reviewed-on: http://git-master/r/1168728 (cherry picked from commit 97a62e5b89352fce576f1bca71b38bf2242ff047) Reviewed-on: http://git-master/r/1177823 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: add sched control APIThomas Fleury2016-07-19
| | | | | | | | | | | | | | | | | | | | | | | Added a dedicated device node to allow an app manager to control TSG scheduling parameters: - Get list of TSGs - Get list of recent TSGs - Get list of TSGs per pid - Get TSG current scheduling parameters - Set TSG timeslice - Set TSG runlist interleave Jira VFND-1586 Change-Id: I014c9d1534bce0eaea6c25ad114cf0cff317af79 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1160384 (cherry picked from commit 75ca739517cc7f7f76714b5f6a1a57c39b8cb38e) Reviewed-on: http://git-master/r/1167021 Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: vgpu: add pm qos supportRichard Zhao2016-07-14
| | | | | | | | | | | | | | | | | Send cmd to RM server to change clk rate when PM_QOS_GPU_FREQ_BOUNDS max changes. Bug 200206160 Change-Id: I7f19e5f711426517baf8e7f934bf41972012644b Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1172792 (cherry picked from commit 973c258fd85449c3862df2498362e358fd3682c9) Reviewed-on: http://git-master/r/1180892 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: use vidmem by default in gmmu_alloc variantsKonsta Holtta2016-07-08
| | | | | | | | | | | | | | | | | | For devices that have vidmem available, use the vidmem allocator in gk20a_gmmu_alloc{,attr,_map,_map_attr}. For others, use sysmem. Because all of the buffers haven't been tested to work in vidmem yet, rename calls to gk20a_gmmu_alloc{,attr,_map,_map_attr} to have _sys at the end to declare explicitly that vidmem is used. Enabling vidmem for each now is a matter of removing "_sys" from the function call. Jira DNVGPU-18 Change-Id: Ibe42f67eff2c2b68c36582e978ace419dc815dc5 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1176805 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: simplify power managementDeepak Nibade2016-07-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currenlty initialize both runtime PM and pm_domains frameworks and use pm_domain to control runtime power management of NvGPU But since GPU has a separate rail, using pm_domain is not strictly required Hence remove pm_domain support and use runtime PM only for all the power management This also simplifies the code a lot Initialization in gk20a_pm_init() - if railgate_delay is set, set autosuspend delay of runtime PM - try enabling runtime PM - if runtime PM is now enabled, keep GPU railgated - if runtime PM is not enabled, keep GPU unrailgated - if can_railgate = false, disable runtime PM and keep GPU unrailgated Set gk20a_pm_ops with below callbacks for runtime PM static const struct dev_pm_ops gk20a_pm_ops = { .runtime_resume = gk20a_pm_runtime_resume, .runtime_suspend = gk20a_pm_runtime_suspend, .resume = gk20a_pm_resume, .suspend = gk20a_pm_suspend, } Move gk20a_busy() to use runtime checks of pm_runtime_enabled() instead of using compile time checks on CONFIG_PM Clean up some pm_domain related code Remove use of gk20a_pm_enable/disable_clk() since this should be already done in platform specific unrailgate()/ railgate() APIs Fix "railgate_delay" and "railgate_enable" sysfs to use runtime PM calls For VGPU, disable runtime PM during vgpu_pm_init() With this, we will initialize vgpu with vgpu_pm_finalize_poweron() upon first call to gk20a_busy() Jira DNVGPU-57 Change-Id: I6013e33ae9bd28f35c25271af1239942a4fa0919 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1163216 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: dbg_set_powergate supportPeter Daifuku2016-07-06
| | | | | | | | | | | | | | | | | | Add support for dbg_set_powergate when virtualized Jira VFND-1905 Change-Id: I0d81c8863b3eda4ae4fee42e5a95d2fc9d78b174 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1162048 (cherry picked from commit 0dfc55f390a10e21ae13e14dd2f16e89a3bddfa7) Reviewed-on: http://git-master/r/1167182 (cherry picked from commit 4e34a1844558d93da5ad208532ec28aeda228f95) Reviewed-on: http://git-master/r/1174701 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: support in-kernel vidmem mappingsKonsta Holtta2016-07-06
| | | | | | | | | | | | | | | Propagate the buffer aperture flag in gk20a_locked_gmmu_map up so that buffers represented as a mem_desc and present in vidmem can be mapped to gpu. JIRA DNVGPU-18 JIRA DNVGPU-76 Change-Id: I46cf87e27229123016727339b9349d5e2c835b3e Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1169308 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: remove sysfs creationShawn Joo2016-07-04
| | | | | | | | | | | | | | | | gk20a sysfs is not currently applicable for vgpu. Remove it for now. Bug 200137760 Change-Id: Ia79eb5d0958856958fe74ce6eb6ccdd521a6f8f7 Signed-off-by: Shawn Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/1164600 (cherry picked from commit 2a630b197df914244f5be0608598e395c3783664) Reviewed-on: http://git-master/r/1172417 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: Add CE engine to engine listTerje Bergstrom2016-06-24
| | | | | | | | | | | | | | | | | Add CE engine to vgpu engine list. CE engine is defined differently for different GPUs, so we also add HAL for initializing the engine info. Bug 1780185 Change-Id: I5ae265551feac08d0c4d45402dd3277514e62b2d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1169720 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Tested-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Lakshmanan M <lm@nvidia.com>
* gpu: nvgpu: vgpu: correct value of g->ltc_countRichard Zhao2016-06-22
| | | | | | | | | | | | | | | | ltc.init_fs_state was not called for vgpu, because vgpu has its own poweron function. fixed it. Bug 1778448 Change-Id: I023625c3e2efc86e72e9dcd04195c5d0b3d0eada Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1165969 (cherry picked from commit 3304b459593e92650cb772301e9c5745abb6c371) Reviewed-on: http://git-master/r/1169050 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: disable batch map buffer in gpu characteristicsRichard Zhao2016-06-17
| | | | | | | | | | | | | | | vgpu has not implemented batch map buffer yet, so report it in gpu characteristics. Bug 200201431 Change-Id: Ia9bfd71735889706242f0c06a1c44c5ed318ab6d Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1157467 (cherry picked from commit c6999995f9a48f645d6ffb6b7361d29cf641e5e3) Reviewed-on: http://git-master/r/1156636 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add read ptimer supportRichard Zhao2016-06-16
| | | | | | | | | | | | | Bug 1395833 Change-Id: Id0d427b6a1ddaecfeec33c61a6161679cf596c92 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1159588 (cherry picked from commit d33aa89420990626fb377c56ed5517a00f717c2a) Reviewed-on: http://git-master/r/1158897 Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add uapi support for non-graphics enginesLakshmanan M2016-06-13
| | | | | | | | | | | | | | | | | | | Extend the existing NVGPU_GPU_IOCTL_OPEN_CHANNEL interface to allow opening channels for other than the primary (i.e., the graphics) runlists. This is required to push work to dGPU engines that have their own runlists, such as the asynchronous copy engines and the multimedia engines. Minor change - Added active_engines_list allocation and assignment for fifo_vgpu back end. JIRA DNVGPU-25 Change-Id: I3ed377e2c9a2b4dd72e8256463510a62c64e7a8f Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1161541 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add general event supportRichard Zhao2016-06-09
| | | | | | | | | | | | | | | | Events like bpt int/pause will help cuda work properly. Bug 200173403 VFND-1568 Change-Id: I29e534969028bf08aedd81c99f5a536779f431d1 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1159621 (cherry picked from commit a266e53c514639e15ed166e2c8ce5a55efc48eda) Reviewed-on: http://git-master/r/1152154 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add channel enable supportRichard Zhao2016-06-09
| | | | | | | | | | | | | | Bug 200173403 VFND-1568 Change-Id: I3636a77bbbbd719e961dce5ca7ca7bdd5aa33881 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1159620 (cherry picked from commit b22fb6518da15a09c3e298213af5e60b8e6907a2) Reviewed-on: http://git-master/r/1155403 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add channel force resetSachit Kadle2016-06-09
| | | | | | | | | | | | | | | | Add forced channel reset support for vgpu Bug 200187507 JIRA EVLR-337 Change-Id: I48e3e2b430f3a4ae94244225232902a8c037cb07 Signed-off-by: Sachit Kadle <skadle@nvidia.com> Reviewed-on: http://git-master/r/1154781 (cherry picked from commit abd6688801fe76c822d6f67f554c18705d9f23d6) Reviewed-on: http://git-master/r/1161259 GVS: Gerrit_Virtual_Submit Tested-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add multiple engine and runlist supportLakshmanan M2016-06-07
| | | | | | | | | | | | | | | | | | | | | | | This CL covers the following modification, 1) Added multiple engine_info support 2) Added multiple runlist_info support 3) Initial changes for ASYNC CE support 4) Added ASYNC CE interrupt handling support for gm206 GPU family 5) Added generic mechanism to identify the CE engine pri_base address for gm206 (CE0, CE1 and CE2) 6) Removed hard coded engine_id logic and made generic way 7) Code cleanup for readability JIRA DNVGPU-26 Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1155963 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-08 00:09:21 -0400