| Commit message (Collapse) | Author | Age |
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Previous patch added ability so set default PRI timeout and
set it for one of the dGPU boards. Set the timeout to all
known dGPU boards.
Bug 200246808
Change-Id: I645ca8b4a51d61c924a9f52b1fc6e884795adf19
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1264304
Reviewed-on: http://git-master/r/1280436
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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And reduce pri timeout to match PCIE specs
bug 200246808
Change-Id: I0225ae964b5635665fe774c43f773d0ce86650ab
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1264179
(cherry picked from commit 1c3dbf8324b7ec5d06bd0e57e7deee9a1c8e9411)
Reviewed-on: http://git-master/r/1280328
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Disable ASPM on boot for PCIe platforms.
Bug 200256272
Change-Id: I0dc63c1a5a9941a5ecdc6a5d691c0b780fb9a6b5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1263272
(cherry picked from commit bf576ea8a88326d107b3a91d196fe6d6018185f6)
Reviewed-on: http://git-master/r/1274478
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Handle possible asynchronous GPU driver shutdown more gracefully.
This occurs when the GPU disappears from the PCI bus, for example,
if it overheats or detects an over current event.
Also add a preprocessor check to make sure that the
gk20a_channel_cancel_pending_sema_waits()
is always defined. In some builds CONFIG_SYNC is disabled but the
gk20a_remove_support() code does not check for this.
Bug 1816516
Bug 1807277
Change-Id: I932e312291c5c6a6ac5e13525ce8ca56a1be3652
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250028
(cherry picked from commit 337810f8c478238a38d8553c1492622d5fa9aafa)
Reviewed-on: http://git-master/r/1274476
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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bug 200245907
Change-Id: Ia10faf764a4b2378115c41d5e3a19a65b7bf2ddd
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1240623
(cherry picked from commit be278f2913c92ec1dfb83f9f5224d3de10a8defc)
Reviewed-on: http://git-master/r/1248740
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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On dGPU so far we boot only at maximum GPC2CLK frequency. Expose that
as maximum clock rate to user space.
Bug 200251486
Change-Id: Ie3463782a0e36028074325ce652c7ef554f6ea2c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252907
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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In the nvgpu_pci_devnode() function only set the mode if the mode
pointer is valid. In some cases this function only needs the name
of the node and not its permissions.
Bug 1816516
Change-Id: I603c1499083fb29cb5fe4a871068e0bf2cbe9c3d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1225614
(cherry picked from commit 11874ad9df49b44fac4e90d83e138ead63bbb2f9)
Reviewed-on: http://git-master/r/1244907
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Raise the minimum VBIOS version for 0x1c35 to 86.06.30.00.
Bug 1811880
Change-Id: I35f7511c3346394af45b8347e8c40f8d367bf3e0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1233401
(cherry picked from commit 9a92ef0f0ccf33c08d48d3a769158b30a0a1496c)
Reviewed-on: http://git-master/r/1239429
GVS: Gerrit_Virtual_Submit
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Add a minimum VBIOS version field for each SKU. This requires the
gk20a_platform structure to be per SKU.
Also sets power_on back to false if there was any error in booting
GPU.
Bug 1811880
Change-Id: I23ef312f0db7061b31a3d503ded7e41ef45ad6b3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1227229
(cherry picked from commit 69c9ab4349ec7526a7f8a2fcad01f9128ed4769c)
Reviewed-on: http://git-master/r/1239428
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Enable probing of gp106 sku10 by adding the device id
to the known device table.
JIRA DNVGPU-72
Change-Id: I2c10914c8510c6081202a374f50ef40371d7d183
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1221123
(cherry picked from commit 17ff6de69f19212b6c6be39496f8e76c8554b861)
Reviewed-on: http://git-master/r/1239427
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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JIRA DNVGPU-74
Change-Id: I67c65db4bd3389105299753ca92e94aac362b12e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1220434
(cherry picked from commit 3fd5dc515fc4f40ebf7a7e447f6a3182c5fe3c08)
Reviewed-on: http://git-master/r/1234090
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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JIRA DNVGPU-72
JIRA DNVGPU-73
Change-Id: I5932779f6913b55692f69fac692a1a66a9912fc4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1216562
(cherry picked from commit d44be7714afa1f4257a81799c326b453da3d2d5a)
Reviewed-on: http://git-master/r/1233350
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Add the known dGPU SKUs to the PCIe device id table, and remove the
wildcard ANY_GPU_ID wildcard. This makes nvgpu to not try to probe on unknown
GPUs.
JIRA DNVGPU-72
Change-Id: Ie32c3137e9fa89a9e6dcf1e578c0b9d7339d7e75
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1219129
(cherry picked from commit 5c56088fbf8cb815d8be3355ecbb597fb7bfc795)
Reviewed-on: http://git-master/r/1231042
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Expose PCI device id info for PCI devices.
Bug 1643487
Change-Id: Ib0e3295b33c2343d99553a5c48e3f67d419d207b
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/1214946
(cherry picked from commit a6e23a315a094f1df1f7db8e4307a10d06f28411)
Reviewed-on: http://git-master/r/1216336
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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We have completely different versions of probe for
nvgpu and pci device
Extract out common steps into nvgpu_probe() function
and separate it out in new file nvgpu_common.c
Divide task of nvgpu_probe() into further smaller
functions
Do platform specific things (like irq handling,
memresource management, power management) only in
individual probes and then call nvgpu_probe() to
complete the common initialization
Move all debugfs initialization to common gk20a_debug_init()
This also helps to bringup all debug nodes to pci device
Pass debugfs_symlink name as a parameter to gk20a_debug_init()
This allows us to set separate debugfs symlink for nvgpu
and pci device
In case of railgating, cde and ce debugfs, check if
platform supports them or not
Copy vidmem_is_vidmem from platform to mm structure
and set it to true for pci device
Return from gk20a_scale_init() if we don't have either of
governor or qos_notifier
Fix gk20a_alloc_debugfs_init() and gk20a_secure_page_alloc()
to receive device pointer instead of platform_device
Export gk20a_railgating_debugfs_init() so that we can call
it from gk20a_debug_init()
Jira DNVGPU-56
Jira DNVGPU-58
Change-Id: I3cc048082b0a1e57415a9fb8bfb9eec0f0a280cd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1204207
(cherry picked from commit add6bb0a3d5bd98131bbe6f62d4358d4d722b0fe)
Reviewed-on: http://git-master/r/1204462
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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While mapping the buffer, first check if buffer is in
vidmem, and if yes convert allocation into base address
And then walk through each chunk to decide the alignment
Add new API gk20a_mm_get_align() which returns the
alignment based on scatterlist and aperture, and use
this API to get alignment during mapping
Enable big page support for pci by unsetting disable_bigpage
Jira DNVGPU-97
Change-Id: I358dc98fac8103fdf9d2bde758e61b363fea9ae9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1207673
(cherry picked from commit d14d42290eed4aa7a2dd2be25e8e996917a58e82)
Reviewed-on: http://git-master/r/1210959
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Bug 200224907
Change-Id: I515bba1987e54fb5ab78efda85916b6f0d3a4297
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1201233
(cherry picked from commit aa45908e77d451376728860cebe3938e765c4388)
Reviewed-on: http://git-master/r/1201654
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Device nodes for PCI devices need to be RW for everybody.
Bug 200225622
Change-Id: I14de9d17f76ca45ba525d0c4f5e8d448bbfda98b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1198556
(cherry picked from commit 60bf9118715b61b8cd3f2379479caf280ae4e35c)
Reviewed-on: http://git-master/r/1200713
Reviewed-by: Automatic_Commit_Validation_User
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Added interface to allow kernel to create privileged CE channels for
page migration and clearing support between sysmem and videmem.
JIRA DNVGPU-53
Change-Id: I3e18d18403809c9e64fa45d40b6c4e3844992506
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1173085
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Add static qualifier to nvgpu_pci_pm_init, as it is
only used within the current file.
Bug 200067946
Bug 200088648
Change-Id: Ifb7d3ec174a9f8eea0ac53421c953761886f48c6
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1181867
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
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Enable runtime power management ops for PCIe devices, and
move gk20a_pm_finalize_poweron call into the resume routine.
This change only implements suspend as a stub, as suspend/resume
has not yet been verified for dGPU
Bug 1785512
Bug 200187507
Change-Id: I076bafc03c6b4ba10dce874804ed3fd0b9c7b0d8
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1179860
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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following compilation error are reported with CONFIG_DEBUG_FS=n:
pci.c:246:7: error: 'struct mm_gk20a' has no member named 'ltc_enabled'
pci.c:247:7: error: 'struct mm_gk20a' has no member named 'ltc_enabled_debug'
possible compilation error(reported sometime):
gk20a_allocator.c:1163:13: error: 'gk20a_alloc_debugfs_init' defined
but not used
fixed by adding '#ifdef CONFIG_DEBUG_FS' for debug only code.
following variables from gk20a.c are not initialized from
CONFIG_DEBUG_FS=n path, it will cause kernel oops when booting:
gk20a->mm.bypass_smmu = platform->bypass_smmu;
gk20a->mm.disable_bigpage = platform->disable_bigpage;
gk20a->mm.has_physical_mode = true;
fix it by move them out from '#ifdef CONFIG_DEBUG_FS' section.
Bug 1778001
Change-Id: Ic2da36b3f500882748ee46a5150903244b697761
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/1167358
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Fix below sparse warning :
$TOP/kernel/nvgpu/drivers/gpu/nvgpu/pci.c:145:14: warning: symbol
'nvgpu_pci_class' was not declared. Should it be static?
Bug 200088648
Change-Id: Ia3e8f1ae426fa72254b5204da0f6f85502b4670c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1155981
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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flag helps to enable/disable ELPG init in SW
Bug N/A
Change-Id: I73eb592b789c2c29db8a75018cbd1617dcf16df8
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1152430
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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To be able to scan, PCI devnodes need to be in a directory with read
permission. By default /dev is read protected by SELinux policy. Move
the devnodes to their own directory so that reading this one
directory can be allowed.
At the same time rename the nodes to start with string "card-".
JIRA DNVGPU-54
Change-Id: I0df4ced08afd1f3a468e983d07395ffcb8050365
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1152745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Big pages are not supported by all dGPUs on sysmem. Disable support
for all dGPUs for now.
Change-Id: I7bdcd9b18845c3d32d40e33220bf9afaf2d8c28e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150547
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
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Watchdog timeout is now zero for PCIe devices. This makes also
semaphore acquire timeout to be zero. Fix the timeout to be the
same as for platform devices.
JIRA DNVGPU-7
Change-Id: I5c2921b65f4f957c08a4e9f815deeed2ba231013
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1134441
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Fix below sparse warning:
drivers/gpu/nvgpu/pci.c:52:23: warning: symbol 'nvgpu_pci_device' was
not declared. Should it be static?
Bug 200067946
Bug 200088648
Change-Id: Ie30c952e0addf16fe3639e9372ecaace552d6e46
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1142612
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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If bar1 resource remap fails during initialization, return the correct
error code from g->bar1 instead of g->regs.
Coverity ID 32068
Bug 200192125
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Change-Id: Ia326bfa122259c7b3402f78746673612f0ac0009
Reviewed-on: http://git-master/r/1141078
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Use device name to distinguish between different instances of PCIe
devices.
JIRA DNVGPU-7
Change-Id: Ice0a9dae41396c8faada1815afd1237907896036
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1140685
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add support for probing PCIe graphics cards.
JIRA DNVGPU-7
Change-Id: Iad3d31a1dc0ca6575d8a9916857022cac9181948
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1127684
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