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path: root/drivers/gpu/nvgpu/os/posix
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* gpu: nvgpu: handle ioctl l2_fb_ops betterddutta2020-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Background: There is a race that occurs when l2_fb_ops ioctl is invoked. The race occurs as part of the flush() call while a gk20_idle() is in progress. This patch handles the race by making changes in the l2_fb_ops ioctl itself. For cases where pm_runtime is disabled or railgate is disabled, we allow this ioctl call to always go ahead as power is assumed to be always on. For the other case, we first check the status of g->power_on. In the driver, g->power_on is set to true, once unrailgate is completed and is set to false just before calling railgate. For linux, the driver invokes gk20a_idle() but there is a delay after which the call to the rpm_suspend()'s callback gets triggered. This leads to a scenario where we cannot efficiently rely on the runtime_pm's APIs to allow us to block an imminent suspend or exit if the suspend is currently in progress. Previous attempts at solving this has lead to ineffective solutions and make it much complicated to maintain the code. With regards to the above, this patch attempts to simplify the way this can be solved. The patch calls gk20a_busy() when g->power_on = true. This prevents the race with gk20a_idle(). Based on the rpm_resume and rpm_suspend's upstream code, resume is prioritized over a suspend unless a suspend is already in progress i.e. the delay period has been served and the suspend invokes the callback. There is a very small window for this to happen and the ioctl can then power_up the device as evident from the gk20a_busy's calls. A new function gk20a_check_poweron() is added. This function protects the access to g->power_on via a mutex. By preventing a read from happening simulatenously as a write on g->power_on, the likelihood of an runtime_suspend triggering before a runtime_resume is further reduced. Bug 200507468 Change-Id: I5c02dfa8ea855732e59b759d167152cf45a1131f Signed-off-by:Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299545 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use vpr resize APIVedashree Vidwans2019-08-30
| | | | | | | | | | | | | | | | | | | | This patch adds nvgpu API in linux and qnx to query vpr resize. The new API nvgpu_is_vpr_resize_enabled() is used in nvgpu_submit_channel_gpfifo(). Previously, if non-deterministic channel has timeout disabled and GPU cannot railgate on some platform, then channel doesn't power ref count and results in video freeze. This requires non-determinstic channel job tracking to be enabled if vpr resize is supported or if GPU can railgate. Bug 200532122 Change-Id: Icfbff6253762b195b2f5955749343974b1a7a269 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2167082 Reviewed-on: https://git-master.nvidia.com/r/2180581 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* nvgpu: pmu: cleanup init thread on destroyPeter Daifuku2018-12-15
| | | | | | | | | | | | | | | | | | | | | | | | In nvgpu_kill_task_pg_init(), call nvgpu_thread_join() if the init thread is no longer running in order to reclaim thread resources. Bug 2452799 JIRA ESRM-437 Change-Id: Id9c67f689027f00039ac2df226ee9c28ad89dd1d Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1967983 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1970058 Reviewed-by: Shmuel Ungerfeld <sungerfeld@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Tested-by: Shmuel Ungerfeld <sungerfeld@nvidia.com> Reviewed-by: Rahul Jain (SW-TEGRA) <rahuljain@nvidia.com>
* gpu: nvgpu: move header location of gk20a.hDebarshi Dutta2018-09-25
| | | | | | | | | | | | | | | | | | | | | | | 1) Update header path of gk20a.h files present in os/ to <nvgpu/gk20a.h> 2) os_fence_android_sema.c indirectly was dependent on gk20a.h via semaphore.h. So, added #include <nvgpu/gk20a.h> in os_fence_android_sema.c and replaced the header with forward declaration of struct gk20a in semaphore.h Jira NVGPU-597 Change-Id: I96e23befeb80713f3a399071eb5498f6f580211d Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1842868 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move tsg code to commonKonsta Holtta2018-09-24
| | | | | | | | | | | | | | | tsg_gk20a.c doesn't depend on any specific hardware, so move it to the common directory. Rename the posix tsg file to posix-tsg.c. Jira NVGPU-967 Change-Id: I6e8908a8f6cf43132db8dffe3a99e424e4f764b1 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1821509 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: posix: Add low level unit test IO mockingNicolas Benech2018-09-24
| | | | | | | | | | | | | | | | | | Add an interface that the unit test modules can use to interact with nvgpu IO accessors. This interface is incredibly simple but not the easiest to use. More simple wrappers will be added later. JIRA NVGPU-1040 Change-Id: I325f09a1739a58ea6bcb1c74834037d6977ce0e8 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1741952 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: posix: fix implementation of fls()Philip Elcan2018-09-20
| | | | | | | | | | | | | | | | | The POSIX implementation of fls() wasn't compliant with the Linux which returns fls(0)=0 fls(1)=1, etc. Bug found as result of JIRA NVGPU-1042. Change-Id: Id0279e36332ffe236ed792c013c32f2da841f557 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1828361 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: restrict devfreq during active clk_arb set requestsDebarshi Dutta2018-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | Restrict access to devfreq when there are active set requests in the clk_arbiter. We make the following changes in the patch. 1) Add a global counter in the struct gk20a named clk_arb_global_nr which is used to track the number of active set requests in the system. 2) Anytime a set request is successfully made by the userspace, clk_arb_global_nr is incremented by 1 and during the completion of request(releasing the corresponding file handle), clk_arb_global_nr is decremented by 1. 3) gk20a_scale_target(invoked by devfreq to set the new frequency based on load) atomically checks clk_arb_global_nr. If the value = 0, the code simply continue or else if its > 0, it quits thus making devfreq requests mutually exclusive with the clk_arbiter. Bug 2061372 Change-Id: I5d19de03e45520f4ff8fccb97b1f1589d04c8ab8 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1790002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: changing page_idx from int to u64Sai Nikhil2018-09-07
| | | | | | | | | | | | | | | | | | | | | page_idx is an element of the struct nvgpu_semaphore_pool, defined in include/nvgpu/semaphore.h file. page_idx can not be negative so changing it from int to u64 and its related changes in various files. This also fixes MISRA 10.4 violations in these files. Jira NVGPU-992 Change-Id: Ie9696dab7da9e139bc31563783b422c84144f18b Signed-off-by: Sai Nikhil <snikhil@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1801632 Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: support allocating CBC in vidmemDeepak Nibade2018-09-06
| | | | | | | | | | | | | | | | Update nvgpu_ltc_alloc_cbc() API to accept a flag for vidmem allocation and allocate CBC memory into vidmem if flag is set Bug 2180284 Jira NVGPUT-12 Change-Id: Ia6b9bb670c9fab6b5787de15526fcc753d702a73 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1805468 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move channel header to commonKonsta Holtta2018-09-05
| | | | | | | | | | | | | channel_gk20a is clear from chip specifics and from most dependencies, so move it under the common directory. Jira NVGPU-967 Change-Id: I41f2160b96d4ec84064288ecc22bb360e82352df Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1810578 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move common DMA code to common/mmAlex Waterman2018-09-05
| | | | | | | | | | | | | | | | | | | | | | | | | This migrates the common DMA code (os agnostic) to the common directory. This new unit will be the common DMA allocator that lets users allocate SYSMEM, VIDMEM, or either. Other units will be responsible for actually handling the mechanics of allocating VIDMEM or SYSMEM. Also update the names of the DMA related files so that tmake doesn't complain about duplicate C file names. To do this call the common DMA file dma.c and prepend the OS to the other DMA files. So now we have: common/mm/dma.c os/posix/posix-dma.c os/linux/linux-dma.c JIRA NVGPU-990 Change-Id: I22d2d41803ad89be7d9c28f87864ce4fedf10836 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1799807 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move gp106 specific clk_arbiter code into HALDebarshi Dutta2018-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, clock arbiter code is extensively using dgpu specific implementation. This patch restructures the clk_arbiter code and moves gp106 specific code into HAL. Following changes are made in this patch 1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e. g->ops.clk.clk_domain_get_f_points. 2) moved nvgpu_clk_arb_change_vf_point and other related static functions to clk_arb_gp106.c. 3) Instead of only checking if get_arbiter_clk_domain is empty, a check for support_clk_freq_controller is also added. This is to enable the clk_arbiter based on support from both the OS and the chips. Bug 2061372 Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1774279 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move channel code to commonKonsta Holtta2018-08-24
| | | | | | | | | | | | | | | | | | Do a simple rename of channel_gk20a.c to common/fifo/channel.c. Header cleanup and the like will soon follow. Also rename the os-specific files to have unique names across directories because tmake requires that. Jira NVGPU-967 Change-Id: I302bbbbe29735264e832378d444a176a4023e3e1 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1804608 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: posix: move the posix dir to osAlex Waterman2018-08-17
Since the posix code is supporting a particular OS this code should belong under os/ not common/. Change-Id: Idf5f75b8ab9d614c9dd43ea23dab8df3c346c0ef Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1800658 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 17:23:08 -0400