| Commit message (Collapse) | Author | Age |
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Cycle stats and cycle stats snapshot ioctls have been moved to
debug node. Removing channel ioctls.
Bug 2660206
Bug 220464613
Change-Id: I3aecdf4a8310eeb38de2de5ac076048891afe436
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2030992
(cherry picked from commit f20424ea6a7c6fcf977630e3e95d9e78418f13b8)
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092020
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Tested-by: Peter Daifuku <pdaifuku@nvidia.com>
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Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS to debugger node, to
install/uninstall a buffer for cycle stats.
Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT to debugger
node, to attach/flush/detach a buffer for Mode-E streamout.
Those ioctls will apply to the first channel in the debug session.
Bug 2660206
Bug 200464613
Change-Id: I0b96d9a07c016690140292fa5886fda545697ee6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2002060
(cherry picked from commit 90b0bf98ac01d7fa24c40f6a1f20bfe5fa481d36)
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092008
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Tested-by: Peter Daifuku <pdaifuku@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Data can be speculativerly stored and
code flow can be hijacked.
To mitigate this problem insert a
speculation barrier.
Bug 200447167
Change-Id: Ia865ff2add8b30de49aa970715625b13e8f71c08
Signed-off-by: Ranjanikar Nikhil Prabhakarrao <rprabhakarra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1972221
(cherry picked from commit f0762ed4831b3fe6cc953a4a4ec26c2537dcb69f)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/1996052
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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Currently, for platforms with canRailgate device characteristics disabled,
suspend can block as deterministic channels hold busy references. This
patch makes the change to first hold off any new jobs for deterministic
channels and then reverts back the busy references taken by those
channels. Following this, suspend also waits for the device to get idle
by waiting (with timeout) for the nvgpu's internal usage counter to be
come zero. This ensures there are no further jobs in progress and
allows the system to go into a suspend state.
Bug 200598228
Bug 2930266
Change-Id: Id02b4d41a9c2dd64303b2e2449dbed48c12aea4c
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328489
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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Background: There is a race that occurs when l2_fb_ops ioctl is
invoked. The race occurs as part of the flush() call while a
gk20_idle() is in progress.
This patch handles the race by making changes in the l2_fb_ops
ioctl itself. For cases where pm_runtime is disabled or railgate is
disabled, we allow this ioctl call to always go ahead as power is
assumed to be always on.
For the other case, we first check the status of g->power_on. In the
driver, g->power_on is set to true, once unrailgate is completed and is
set to false just before calling railgate.
For linux, the driver invokes gk20a_idle() but there is a delay after
which the call to the rpm_suspend()'s callback gets triggered. This
leads to a scenario where we cannot efficiently rely on the
runtime_pm's APIs to allow us to block an imminent suspend or exit if
the suspend is currently in progress. Previous attempts at solving this
has lead to ineffective solutions and make it much complicated to
maintain the code.
With regards to the above, this patch attempts to simplify the way this
can be solved. The patch calls gk20a_busy() when g->power_on = true.
This prevents the race with gk20a_idle(). Based on the rpm_resume and
rpm_suspend's upstream code, resume is prioritized over a suspend
unless a suspend is already in progress i.e. the delay period has been
served and the suspend invokes the callback. There is a very small
window for this to happen and the ioctl can then power_up the device as
evident from the gk20a_busy's calls.
A new function gk20a_check_poweron() is added. This function protects
the access to g->power_on via a mutex. By preventing a read from
happening simulatenously as a write on g->power_on, the likelihood of
an runtime_suspend triggering before a runtime_resume is further
reduced.
Bug 200507468
Change-Id: I5c02dfa8ea855732e59b759d167152cf45a1131f
Signed-off-by:Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299545
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Some of the APIs that access debugger register are not protected
from ELPG. This might trigger PRI access timeouts for corresponding
registers if GR engine is power gated.
Add gr_gk20a_elpg_protected_call() to protect against ELPG.
Bug 2820066
Change-Id: I467ea28aaea1c0e36c2d6aabce6a2daea6ee9911
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306383
(cherry picked from commit 0c0eb25ee798db3a8dcd8cab7db06312a220240e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313210
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Check kzalloc() allocations for failures and return
an error if an allocation fails.
Bug 2279948
Change-Id: I8a2c3b84904da897ad6118900c11489c8656c20f
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2020123
(cherry picked from commit fadd0014da39cb9498472494e52590db4b0bd7b9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298066
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Replaced ch->mmu_debug_mode_enabled with ch->mmu_debug_mode_refcnt.
If channel is enabled multiple times by userspace, then ref count is
updated accordingly. There is an expectation that enable/disable
calls are balanced for setting channel's mmu debug mode.
When unbinding the channel, decrease refcnt for the channel until it
reaches 0.
Also, removed tsg parameter from nvgpu_tsg_set_mmu_debug_mode as it
can be retrieved from ch.
Bug 2515097
Bug 2713590
Change-Id: If334e374a55bd14ae219edbfd3b1fce5ff25c226
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2184702
(cherry picked from commit f422aee39387a5aa337de69cc21a67f16697ae0e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208772
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
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Set NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and NV_PFB_PRI_MMU_DEBUG_CTRL
in addition to NV_PGRAPH_PRI_GPCS_MMU_DEBUG_CTRL, in
NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE
Bug 2515097
Bug 2713590
Change-Id: I1763b43e79fac3edb68a35980683d58bfa89519f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115785
(cherry picked from commit 8057514a9f7fc5f175e2e0571dfa91d78ebb6410)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208771
Reviewed-by: Automatic_Commit_Validation_User
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GPC MMU debug mode should be set if at least one channel
in the TSG has requested it. Add refcounting for MMU debug
mode, to make sure debug mode is disabled only when no
channel in the TSG is using it.
Bug 2515097
Bug 2713590
Change-Id: Ic5530f93523a9ec2cd3bfebc97adf7b7000531e0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123017
(cherry picked from commit a1248d87fe6e20aab3e5f2e0764f9fe8d80d0552)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208769
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Added NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE ioctl to set MMU
debug mode for a given context.
Added gr.set_mmu_debug_mode HAL to change NV_PGPC_PRI_MMU_DEBUG_CTRL
for a given channel. HAL implementation for native case is
gm20b_gr_set_mmu_debug_mode. It internally uses regops, which directly
writes to the register if the context is resident, or writes to
gr context otherwise.
Added NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE to enable the feature.
NV_PGPC_PRI_MMU_DEBUG_CTRL has to be context switched in FECS ucode,
so the feature is only enabled on TU104 for now.
Bug 2515097
But 2713590
Change-Id: Ib4efaf06fc47a8539b4474f94c68c20ce225263f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110720
(cherry-picked from commit af2ccb811d3de06f052b1dee39bd9ffa863ac8ce)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208767
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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When the TSG is initialized, the timeslice is initially set to 0,
which is a flag for using the default timeslice.
The sched get_params ioctl was returning 0 in this case; instead,
call gk20a_tsg_get_timeslice() to get the correct value.
Bug 2818547
Change-Id: I29fde48240098074de12e9a9a3e347e4042a64e8
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283962
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gk20a_pm_runtime_suspend can fail and invoke gk20a_pm_finalize_poweron
that can cause double mapping of the usermode mmap region via
io_remap_pfn_range(). Avoid this by using a boolean variable to track
whether the region is already mapped.
Bug 2707416
Bug 200582208
Change-Id: I4d8cbe427400a5b986348a19af145367cc08ffc6
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2229312
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283801
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>
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Add struct nvgpu_sched_ctrl to struct gk20a
Delete struct gk20a_sched_ctrl from struct nvgpu_os_linux
Update sched_ctrl functions to use the nvgpu_sched_ctrl struct
Bug 200576520
Change-Id: I35b13219e5ef0a8a03333dfd7d46e1d308aec541
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279152
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Satish Arora <satisha@nvidia.com>
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Nvgpu flags will miss fecs when nvgpu poweron. We have to add this
fecs in flag when we are seeing trace was initialized before.
Bug 2629615
Change-Id: I7815af7bf66a7a103a14cd375a3fd394243035b1
Signed-off-by: Jeremy Ho <jeremyh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279244
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Add new variable in nvgpu_as_map_buffer_ex_args for app
to specify the platform atomic support for the page.
When platform atomic attribute flag is set, pte memory
aperture is set to be coherent type.
renamed nvgpu_aperture_mask_coh -> nvgpu_aperture_mask_raw
function.
bug 200580236
Change-Id: I18266724dafdc8dfd96a0711f23cf08e23682afc
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012679
(cherry picked from commit 9e0a9004b71f92b7713fd3b30141b0d9d4cfa2c6)
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274914
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gk20a_idle can still race with gk20a_busy_noresume as the following
pm_runtime's functions can run concurrently. i.e. pm_runtime_suspend and
pm_runtime_get_noresume. pm_runtime_get_noresume simply increments the
refcount without first acquiring the pm_runtime's power_lock. This can
be resolved by the use of pm_runtime_get_if_in_use which acquires a
the power lock of PM runtime. This prevents a potential use of register
after power_off in the l2_ops ioctl path.
We still call pm_runtime_get_noresume even if pm_runtime_get_if_in_use
returns <= 0. This helps in the following ways.
1) The signature of the function gk20a_busy_noresume remains same w.r.t
QNX code
2) Any calls to gk20a_busy_noresume() in the driver is followed by a
check to g->power_on. When pm_runtime_get_if_in_use() returns <=0,
g->power_on is false and would immediately call gk20a_suspend_noidle()
thus keeping the original 'intent' of the gk20a_busy_noresume intact.
Bug 200507468
Change-Id: Id46bf2124047bb0e9a299fda57441e425195468f
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2180787
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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PG189 is not supported on rel-32.
Remove related device ids from nvgpu list of supported devices.
Bug 2732086
Change-Id: I800251a864357daab87769ec33a1e7268a2f7b57
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2222547
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Satish Arora <satisha@nvidia.com>
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Writing same value to railgate_enable_store should be treated as nop
and made successfully. Doing so is not only an optimization for the
operation but also convention that users expect for "settings". This
change is primary for fixing a peculiar situation in the driver:
root@localhost:/sys/devices/17000000.gp10b# cat railgate_enable
0
root@localhost:/sys/devices/17000000.gp10b# echo 0 > railgate_enable
bash: echo: write error: Invalid argument
Attempt to disable railgating on a platform where railgating isn't
supported shouldn't be treated as 'invalid'. It's disabled after all.
Bug 200562094
Change-Id: I3c04934bdbaf337c33d7de9cac6d53c96b4dacae
Signed-off-by: Leon Yu <leoyu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2225476
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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When virtualized, the guest OS has no direct access to
PMU functionality so don't create debugfs entries that
rely on PMU access
Bug 200543218
Change-Id: I12730b600802448a240f3de042760041d3ae7d29
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2213650
(cherry picked from commit 053131ef44252748aecaad11ba8dc54f1dc40fce)
Reviewed-on: https://git-master.nvidia.com/r/2215162
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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In nvgpu_linux_get_maxrate, if tegra_dvfs_get_maxrate
returns 0 (a sign that there is no dvfs support), call
nvgpu_clk_arb_get_arbiter_clk_range to get the max
gpu frequency.
Bug 200543218
Change-Id: I4f9bc0acaef98cd9dfa22f709656f4bb7e9fd349
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2215161
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Satish Arora <satisha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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after check failed, need release memory reference
Bug 200531152
Change-Id: I6bfad867eb9bd636a48b5ceb3a4417a80994a3ec
Signed-off-by: Bruce Xu <brucex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194025
(cherry picked from commit f85504ae46d65d5346d9e2a5cc84ffb960ba9fb7)
Reviewed-on: https://git-master.nvidia.com/r/2195437
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This patch results in a flaw that doesn't clear the GPU cache. This reverts commit 47f6bc0c2e85d0a8ff943b88c81108ca1bfc588e.
Bug 2687410
Change-Id: If78bd7ca29eb5621d4369cbddf21320e2a77a41a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2186886
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Check if CPU/GPU rails are joint, disable railgating if they are.
Add the DT support for T194 and T186 platforms.
Disable railgate_enable sysfs node update in the above condition.
Bug 200546450
Bug 200545711
Change-Id: I002488f6418805569b0ef0fc3032b58297adeafb
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2185221
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This patch adds nvgpu API in linux and qnx to query vpr resize.
The new API nvgpu_is_vpr_resize_enabled() is used in
nvgpu_submit_channel_gpfifo().
Previously, if non-deterministic channel has timeout disabled and
GPU cannot railgate on some platform, then channel doesn't power ref
count and results in video freeze. This requires non-determinstic
channel job tracking to be enabled if vpr resize is supported or if GPU
can railgate.
Bug 200532122
Change-Id: Icfbff6253762b195b2f5955749343974b1a7a269
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2167082
Reviewed-on: https://git-master.nvidia.com/r/2180581
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Mark usermode submit supported in gv11b and add the characteristics flag
to expose the capability to userspace.
Bug 200145225
Bug 200541476
Change-Id: Id9dcb0c71c020bd509fbdbffb94a756c69377f20
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795822
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 37659f5c8e0571655178c50a6296b68e3ebdc4cb
in rel-32)
Reviewed-on: https://git-master.nvidia.com/r/2170604
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Import userd and gpfifo buffers from userspace if provided via
NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX. Also supply the work submit token
(i.e., the hw channel id) to userspace.
To keep the buffers alive, store their dmabuf and attachment/sgt handles
in nvgpu_channel_linux. Our nvgpu_mem doesn't provide such data for
buffers that are mainly in kernel use. The buffers are freed via a new
API in the os_channel interface.
Fix a bug in gk20a_channel_free_usermode_buffers: also unmap the
usermode gpfifo buffer.
Bug 200145225
Bug 200541476
Change-Id: I8416af7085c91b044ac8ccd9faa38e2a6d0c3946
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795821
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 99b1c6dcdf328efcfe47338ad1b71a114ab7f272
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170603
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add an internal flag NVGPU_MEM_FLAG_FOREIGN_SGT to specify that the sgt
member of an nvgpu_mem must not be freed when the nvgpu_mem is freed.
Bug 200145225
Bug 200541476
Change-Id: I044fb91a5f9d148f38fb0cbf63d0cdfd64a070ce
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1819801
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 9de6d20abb8fef0cd11c22676846d809ee3f9afc
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add a mmap callback on the control device node for mapping the usermode
register region to userspace. Each such mapping is removed when the GPU
railgates, and brought back again on unrailgate.
The mapping offset must be 0 and its size must be 4 KB.
Bug 200145225
Bug 200541476
Change-Id: Ie8d3758da745b958376292691d7d1d02a24e7815
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795819
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit f33935f426c46b70b7aee33a1e52d5fdae5ca376
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170035
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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An upcoming patch will need to enumerate opened ctrl nodes; track them
in a list, protected by a mutex.
Bug 200145225
Bug 200541476
Change-Id: I50dc15056832a3bb53fbdd7bd2bffcdaecc7b21c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1811840
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit d53495400e15fdef80be2f04a9f2312b81d2bd6d
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170005
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Usermode submit needs to access the usermode region of registers from
userspace. Store the start address of register resource in struct
nvgpu_os_linux to be used in remap to userspace.
Bug 200145225
Bug 200541476
Change-Id: I3796b6bf67942af0cc16c86accb82a013032bfc8
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1811838
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 38c11db264f776fa495a3ba74caadf4262062b78
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2169921
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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For a long time now, the ALLOC_GPFIFO_EX channel IOCTL has done much
more than just gpfifo allocation, and its signature does not match
support that's needed soon. Add a new one called SETUP_BIND to hopefully
cover our future needs and deprecate ALLOC_GPFIFO_EX.
Change nvgpu internals to match this new naming as well.
Bug 200145225
Bug 200541476
Change-Id: I766f9283a064e140656f6004b2b766db70bd6cad
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1835186
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from e0c8a16c8d474eac6723fea3980833873ab921a6
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2169882
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- In GV11B, read fuse_status_opt_tpc_gpc register
to read which TPCs are floorswept.
- The driver will also read sysfs node: tpc_pg_mask
- Based on these two values "can_tpc_powergate" will
be set to true or false and mask will be used to write to
fuse_ctrl_opt_tpc_gpc register to powergate the TPC.
- can_tpc_powergate = true indicates that the mask value
sent from userspace is valid and can be used to power gate
the desired TPC
- can_tpc_powergate = false indicates that the mask value
sent from userspace is not valid and cannot be used to
power gate the desired TPC.
Bug 200532639
Change-Id: Ib0806e4c96305a13b3574e8063ad8e16770aa7cd
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159219
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gk20a_mm_l2_flush flushes the L2 cache when "struct gk20a->power_on"
is true. But it doesn't acquire power lock when doing that, which
creates a race that runtime PM might suspend the GPU in the middle
of L2 flush. The FB flush looks having the same issue with L2 flushing.
This patch fixes that by calling pm_runtime_get_if_in_use at the
beginning of the ioctl. This API from PM does a compare and add to
the usage count. If the device was not in use, it simply returns
without incrementing the usage count as its unnecessary to wake up
the GPU(using e.g. a call to gk20a_busy()) as the caches are
flushed when the device would be resumed anyways.
Bug 2643951
Change-Id: I2417f7ca3223c722dcb4d9057d32a7e065b9e574
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2151532
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mark Zhang <markz@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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In some cases, we would get deadlock issue due to there are two locks
acquisition on common clk driver's lock and nvgpu driver's locks. At
the bug, inconsistent lock ordering problem will come with one thread
gets "nvgpu lock -> clk lock" and the other thread gets "clk lock ->
nvgpu lock".
Slove the latter path with one-time initializing clk_parent entry
and use cached data afterward.
Bug 2555115
Change-Id: I31c5c2728f406307e7cfd4e555f4db0c163234d8
Signed-off-by: Jeremy Ho <jeremyh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146727
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Pass correct attr parameter to sysfs_attr_init().
This fixes the compilation error on enabling debug
lock alloc.
error: ‘struct device_attribute’ has no member named ‘key’
Bug 200464909
Bug 2604007
Change-Id: Ia0d2672b1c8fe9eb4807b4809892dcdc0cff2669
Signed-off-by: sumitg <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2034954
(cherry picked from commit daa4d7e42b3dcb0dc590b1b3c3356259ee0423d6)
Reviewed-on: https://git-master.nvidia.com/r/2132154
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Added support for TPC_PG_POWERGATE during probe for nvgpu via DT.
A new DT binding GV11B_FUSE_OPT_TPC_DISABLE is supported by nvgpu
driver that checks for valid masks and updates the global tpc_pg_mask
flag.
Bug 200518434
Change-Id: Ia65ae518b48e36d28de5e9375bc994232f6a9438
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2117783
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Register gk20a non-arch-specific functions for gm20b
gpu_ops.fecs_trace,
Register nvgpu_os_linux_ops.fecs_trace.init_debugfs
gp10b_fecs_trace_flush is now replaced by gm20b_fecs_trace_flush in
fecs_trace_gm20b.* and the fecs_trace_gp10b.* files are removed.
Bug 2052906
Change-Id: I245c91ae8e6015b87bafeb3ec023b98fe4c57501
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115247
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This reverts commit e9a6d179a42e ("gpu: nvgpu: cache gpu clk rate")
- Real clock rate doesn't always equal clock rate requested by caller
- call of clk_set_rate() and update of cached_rate are not atomic
- Real root cause for Bug 2051688 is in bpmp and gboost design
Bug 2538692
Change-Id: I9248e0c69e2271ed2d0070587db59afa6f8160f2
Signed-off-by: Peng Liu <pengliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109708
(cherry picked from commit cc70f89bb4efd106b81c2da5ecd6cbeb69c990d8)
Reviewed-on: https://git-master.nvidia.com/r/2113647
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aaron Tian <atian@nvidia.com>
Tested-by: Aaron Tian <atian@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add new power/clock gating functions that can be called by
other units.
New clock_gating functions will reside in cg.c under
common/power_features/cg unit.
New power gating functions will reside in pg.c under
common/power_features/pg unit.
Use nvgpu_pg_elpg_disable and nvgpu_pg_elpg_enable to disable/enable
elpg and also in gr_gk20a_elpg_protected macro to access gr registers.
Add cg_pg_lock to make elpg_enabled, elcg_enabled, blcg_enabled
and slcg_enabled thread safe.
JIRA NVGPU-2014
Change-Id: I00d124c2ee16242c9a3ef82e7620fbb7f1297aff
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2025493
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from c90585856567a547173a8b207365b3a4a3ccdd57 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2108406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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changes in path because we move the nvhost linux user-interface
from include/linux/ to include/uapi/linux
depends on I2e116dc8f6c33f53c03fb56b923931b6e600b534
Bug 2062672
Change-Id: If2e165852432d5795cf6680cfeb5d4b661fdee74
Signed-off-by: Anuj Gangwar <anujg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1953731
(cherry picked from commit 4e7333967da9cc5a5e4c01288cbc3dd6a25b9fe1)
Reviewed-on: https://git-master.nvidia.com/r/2110254
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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PMU counters #0 and #4 are used to count total cycles and busy cycles.
These counts are used by podgov to estimate GPU load.
PMU idle intr status register is used to monitor overflow. Overflow
rarely occurs because frequency governor reads and resets the counters
at a high cadence. When overflow occurs, 100% work load is reported to
frequency governor.
Bug 1963732
Change-Id: I046480ebde162e6eda24577932b96cfd91b77c69
Signed-off-by: Peng Liu <pengliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1939547
(cherry picked from commit 34df0035194e0203f68f679acdd84e5533a48149)
Reviewed-on: https://git-master.nvidia.com/r/1979495
Reviewed-by: Aaron Tian <atian@nvidia.com>
Tested-by: Aaron Tian <atian@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Use tsg_gk20a_from_ch to get tsg pointer for tsgid of a channel. For
invalid tsgid, tsg pointer will be NULL
Bug 2092051
Bug 2429295
Bug 2484211
Change-Id: I82cd6a2dc5fab4acb147202af667ca97a2842a73
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2006722
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 13f37f9c70b9ae2e0d179830cded93a0a6f86494
in dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2025507
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add compatibility version to page table and dma mapping structure.
Bug 200438879
Change-Id: I04b4601f71ae2b3e75843f39f5445ecca2b16677
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2029086
(cherry picked from commit 8bbbd09caa06f7c0f17a48e129d4fd07ce6fa9be)
Reviewed-on: https://git-master.nvidia.com/r/2071427
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Bug 200487652
Change-Id: Ib52cc6a85a19ea0396c8ab584c5ce9970f93085a
Signed-off-by: Dmitry Pervushin <dpervushin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2020386
(cherry picked from commit 617dff478c3687a08ed5b77f4ac2073b290c57ea)
Reviewed-on: https://git-master.nvidia.com/r/2035720
GVS: Gerrit_Virtual_Submit
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l->bar is a managed resource, it will be released automatically
Therefore, there is no need to explicitly unmap it
Bug 200487652
Change-Id: Ic543baa770d9cbcf7e7319281c4a27fab4b4b4df
Signed-off-by: dmitry pervushin <dpervushin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012324
GVS: Gerrit_Virtual_Submit
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Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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On Desktop verion, map is called nvidia_p2p_dma_map_pages and umap is
called nvidia_p2p_dma_umap_pages. So renamed these two apis to match
the desktop version.
Bug 200438879
Change-Id: I66301c48b832dfed8c3950678f473c2f82b8761a
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2014940
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Currently has_timedout variable is protected by wmb at places
where it is being set and there is no correspoding rmb whenever
has_timedout variable is read. This is prone to errors for
concurrent execution. This change is supposed to fix this issue.
Rename has_timedout variable of channel struct to ch_timedout.
Also to avoid rmb every time ch_timedout is read,
ch_timedout_spinlock is added to protect ch_timedout
variable for taking care of concurrent execution.
Bug 2404865
Bug 2092051
Change-Id: I0bee9f50af0a48720aa8b54cbc3af97ef9f6df00
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1930935
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 1f54ea09e3445d9ca3cf7a69b4967849cc9defc8
in dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2016975
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gv11b_fifo_preempt_tsg needs to access the runlist_id of the tsg as
well as pass the tsg pointer to other public functions such as
gk20a_fifo_disable_tsg_sched. This qualifies the preempt_tsg to use a
pointer to a struct tsg_gk20a instead of just using the tsgid.
Jira NVGPU-1461
Change-Id: I01fbd2370b5746c2a597a0351e0301b0f7d25175
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1959068
(cherry picked from commit 1e78d47f15ff050edbb10a88550012178d353288
in rel-32)
Reviewed-on: https://git-master.nvidia.com/r/2013725
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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The chid member of the channel_gk20a struct was being used as a unsigned
value. By being declared as an int, it was causing MISRA 10.3 violations
for implicit assignment of different types.
JIRA NVGPU-647
Change-Id: I7477fad6f0c837cf7ede1dba803158b1dda717af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918470
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 1c7bb9b538200a11aa3ef31d72038d8ba820dfca in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2008514
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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