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MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in the
include directory by renaming them to follow the convention,
'NVGPU_PARENT-DIR_HEADER_H'.
JIRA NVGPU-1028
Change-Id: I14e3558c80511314e32ef79c2b609a9fd9cf0a44
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Multiple places were missing explicit <nvgpu/types.h> includes but
used various types anyway. Fix that by including <nvgpu/types.h>
where necessary.
A gp106 file directly used the Linux delay header instead of
including <nvgpu/timers.h>.
This patch fixes both problems.
JIRA NVGPU-525
Change-Id: Ib7a30a8ed9098d469d646c0a2bba293087b8de90
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1673821
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Change license of OS independent source code files to MIT.
JIRA NVGPU-218
Change-Id: I1474065f4b552112786974a16cdf076c5179540e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add a pointer to struct gk20a to the FUSE APIs. This helps
QNX builds avoid any static data definitions.
Also this change plumbs struct gk20a in some of the Linux clk
code and fixes a few minor style nits.
Change-Id: I27dfb2c4e9a352f784d6cead150460d8e9e808d3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537611
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add below new APIs in common/linux/fuse.c and export them from
include/nvgpu/fuse.h to read/write specific tegra fuse offsets
void nvgpu_tegra_fuse_write_bypass(u32 val);
void nvgpu_tegra_fuse_write_access_sw(u32 val);
void nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(u32 val);
void nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(u32 val);
int nvgpu_tegra_fuse_read_gcplex_config_fuse(u32 *val);
int nvgpu_tegra_fuse_read_reserved_calib(u32 *val);
These APIs are needed to remove nvgpu's direct
dependency on platform specific <soc/tegra/fuse.h> header
Remove below generic APIs since they are no longer needed :
nvgpu_tegra_fuse_read()
nvgpu_tegra_fuse_write()
Jira NVGPU-75
Change-Id: I366e6a3382f0c392b2132f4d3a7e286306bb2ec2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1497517
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add a new file common/linux/fuse.c for common fuse
operations with below APIs
nvgpu_tegra_fuse_read()
nvgpu_tegra_fuse_write()
nvgpu_tegra_get_gpu_speedo_id()
Export the APIs in header <nvgpu/fuse.h>
Jira NVGPU-49
Jira NVGPU-75
Change-Id: I5b0b0772584a5d408b23e629df9c5f73ecc05f6b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1483860
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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