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* gpu: nvgpu: gv11b: update subctx pdb infoseshendra Gadagottu2018-02-13
| | | | | | | | | | | | | | | | | | | | | | | | | | Updated subctx pdb info for all instblks created. Earlier subctx pdb info was getting updated during instblk commit. But some instblks like pmu instblk are never committed. Missing subctx pdb info in instblk is creating issues accessing subctx info. So, by filling subctx pdb info during instblk creation fixed all these issues. Also as part of re-org of the function gv11b_init_subcontext_pdb, moved setting subctx info in ram_in_engine_wfi_veid_w() to channel_gv11b_setup_ramfc. Bug 2051863 Change-Id: Ida96118e8f86b638fa6a8586d026ad2617ebbf64 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1654678 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fold T19x code back to main code pathsTerje Bergstrom2018-01-23
| | | | | | | | | | | | | Lots of code paths were split to T19x specific code paths and structs due to split repository. Now that repositories are merged, fold all of them back to main code paths and structs and remove the T19x specific Kconfig flag. Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640606 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Make graphics context property of TSGTerje Bergstrom2018-01-17
| | | | | | | | | | | | | | | | | | | | Move graphics context ownership to TSG instead of channel. Combine channel_ctx_gk20a and gr_ctx_desc to one structure, because the split between them was arbitrary. Move context header to be property of channel. Bug 1842197 Change-Id: I410e3262f80b318d8528bcbec270b63a2d8d2ff9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1639532 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: modify dma alloc flagsseshendra Gadagottu2017-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call nvgpu_dma_alloc_flags_sys without NVGPU_DMA_NO_KERNEL_MAPPING flags, since it makes CMA memory handling simple in t194 and fixes error during subcontext header free: [ 340.378910] trying to free invalid coherent area: ffffffc0135ba000^M [ 340.378921] ------------[ cut here ]------------^M [ 340.378933] WARNING: CPU: 0 PID: 1618 at /code/volta/kernel/kernel-4.9/arch/arm64/mm/dma-mapping.c:1442 __arm_dma_free.isra.4+0x160/0x168^M [ 340.378950] Modules linked in: nvgpu^M [ 340.378958] ^M [ 340.378966] CPU: 0 PID: 1618 Comm: nvogtest Tainted: G W 4.9.52-tegra-g170e0c4 #20^M [ 340.378979] Hardware name: t194pre_si (DT)^M [ 340.378988] task: ffffffc018930d80 task.stack: ffffffc017e08000^M [ 340.378999] PC is at __arm_dma_free.isra.4+0x160/0x168^M [ 340.379009] LR is at __arm_dma_free.isra.4+0x160/0x168^M [ 340.379020] pc : [<ffffff800809cfd0>] lr : [<ffffff800809cfd0>] pstate: 60400045^M [ 340.379032] sp : ffffffc017e0bbe0^M [ 340.379039] x29: ffffffc017e0bbe0 x28: 00000000935ba000 ^M [ 340.379051] x27: 0000000000001000 x26: ffffffc0135b9580 ^M [ 340.379063] x25: ffffff8009ced1b0 x24: 0000000000000010 ^M [ 340.379075] x23: ffffffc070746010 x22: 0000000080000000 ^M [ 340.379088] x21: ffffffbf004d6e80 x20: ffffffc0135ba000 ^M [ 340.379100] x19: 0000000000001000 x18: ffffffffffffffff ^M [ 340.379112] x17: 0000007fa4d8fc60 x16: ffffff800823e370 ^M [ 340.379124] x15: ffffff8009cd8690 x14: ffffff8089fb34bf ^M [ 340.379135] x13: ffffff8009fb34cd x12: 0000000000000007 ^M [ 340.379147] x11: 0000000000000325 x10: 0000000005f5e0ff ^M [ 340.379159] x9 : 0000000000000326 x8 : 3331306366666666 ^M [ 340.379172] x7 : 6666203a61657261 x6 : ffffff8009fb3505 ^M [ 340.379184] x5 : 0000000000000012 x4 : 0000000000000000 ^M [ 340.379196] x3 : 0000000000010000 x2 : 0000000000040934 ^M [ 340.379207] x1 : 0000000000000000 x0 : 0000000000000036 ^M [ 340.379219] ^M [ 340.379224] ---[ end trace 9e7ab41f55eb32d2 ]---^M [ 340.379232] Call trace:^M [ 340.379241] [<ffffff800809cfd0>] __arm_dma_free.isra.4+0x160/0x168^M [ 340.379254] [<ffffff800809e3a0>] arm_dma_free+0x48/0x60^M [ 340.379827] [<ffffff8000f01250>] nvgpu_dma_free+0x260/0x410 [nvgpu]^M [ 340.380403] [<ffffff8000fb2fac>] gv11b_free_subctx_header+0x5c/0x80 [nvgpu]^M [ 340.380980] [<ffffff8000f3ed2c>] gk20a_free_channel_ctx+0x3c/0x150 [nvgpu]^M After changing dma alloc flags to none, this issue got fixed. Bug 1930032 Change-Id: I002236373c6a3ae5d7ec80a35f166429821662b7 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598193 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Switch to newer NVGPU_AS_MAP_BUFFER flagsSami Kiminki2017-11-08
| | | | | | | | | | | | | | | | | | Switch two cases using the old NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_* flags to the newer definitions, that is, NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE. The legacy NVGPU_MAP_BUFFER_FLAGS_* definitions have been deleted. Bug 1902982 Change-Id: Ifbd2678b10005b4af2375600888469b01dd09f4e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1592655 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: check for memory aperture typeseshendra Gadagottu2017-10-03
| | | | | | | | | | | | | | | | | | | | | | Check for memory aperture type before setting relevant sysmem non-coherent or vidmem flags in ram entry. Modified following functions to correct memory aperture type: gv11b_get_ch_runlist_entry gv11b_subctx_commit_pdb Added following hw constants for chan_inst_target: ram_rl_entry_chan_inst_target_sys_mem_coh_v ram_rl_entry_chan_inst_target_vid_mem_v Change-Id: I85698044b9fe4c8baed71121845e4fb69dc33922 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1569521 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: Change license for common files to MITTerje Bergstrom2017-09-25
| | | | | | | | | | | | | | | Change license of OS independent source code files to MIT. JIRA NVGPU-218 Change-Id: I93c0504f0544ee8ced4898c386b3f5fbaa6a99a9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1567804 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gv11b: enable per veid header for subctxseshendra Gadagottu2017-09-19
| | | | | | | | | | | | | | | | | Enable per veid header mode for subcontext header. Allocated only context header size for subcontext header. Bug 1958308 Change-Id: I6b45987eed968252326a366650fefd807975b70f Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1562681 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gv11b: add max_subctx_count to g->fifo.t19xRichard Zhao2017-08-11
| | | | | | | | | | | | | | | | - For better performance. It used to read register every time referencing max_subctx_count. - Avoid reading registers for vgpu. Jira VFND-3797 Change-Id: Id6e6b15a0d9a035795e8a9a2c6bb63524c5eb544 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1537009 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove mm.get_iova_addrAlex Waterman2017-08-04
| | | | | | | | | | | | Volta changes for equivalent change on nvgpu. JIRA NVGPU-30 Change-Id: I78e84ce67468dfe3556232ddb25e824f6b84835c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530863 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: set replay fault for tex and gccSeema Khowala2017-07-12
| | | | | | | | | | | | | This is to enable replay fault from tex and gcc engines JIRA GPUT19X-7 JIRA GPUT19X-12 Change-Id: I0cc8a59499da9eb056d19ee8d6cd33a94e3f0835 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1493407 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Implement PD packingAlex Waterman2017-07-06
| | | | | | | | | | | | | Necessary Volta changes for equivalent change in nvgpu. JIRA NVGPU-30 Change-Id: I541d6d6005bc7ea0bfb654d0f5f5554e46afc510 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master/r/1506611 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: support for full subcontextseshendra Gadagottu2017-07-05
| | | | | | | | | | | | | | | | | Changes to enable 64 subcontexts: 1 SYNC + 63 ASYNC Currently all subcontexts with in a tsg can have only single address space. Add support for NVGPU_TSG_IOCTL_BIND_CHANNEL_EX for selecting subctx id by client. Bug 1842197 Change-Id: Icf56a41303bd1ad7fc6f2a6fbc691bb7b4a01d22 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master/r/1511145 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gv11b: make subcontext mappings non-cacheableseshendra Gadagottu2017-06-20
| | | | | | | | | | | | | | | | | | Without non-cacheable, gpu filled subcontext data not visible to cpu without additional l2 flush. Similarly, there will be issues where cpu updates to subcontext header will not visible to gpu without additional l2 flush. Making subcontext header mapping non-cacheable fixes this issue. Bug 1937331 Change-Id: I8e25b7cac165e7481eec7c9f1f93bc7992183c46 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1505283 Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Separate GMMU out of mm_gk20a.cAlex Waterman2017-05-11
| | | | | | | | | | | | | t19x version of same named patch in nvgpu. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I0b176577c0edcdcc587f22a6908045a960f830e2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464111 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move Linux nvgpu_mem fieldsAlex Waterman2017-04-20
| | | | | | | | | | | | | | | | t19x part for this change in nvgpu. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I31116b4241076b39a6638273281630a1527bcd35 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464109 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: function to get max veidseshendra Gadagottu2017-04-16
| | | | | | | | | | | | | | | Defined function to get max number of subcontexs supported and used it where max subcontext count required. JIRA GV11B-23 Change-Id: I4f6307162486bab1e91cbf66abfee7763c70fe7b Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1318146 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: Use new error macrosTerje Bergstrom2017-04-10
| | | | | | | | | | | | | | | | | gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I8c0d8944f625e3c5b16a9f5a2a59d95a680f4e55 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1459822 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Rename nvgpu DMA APIsAlex Waterman2017-04-06
| | | | | | | | | | | | | | | | | | | gv11b changes to go along with gpu: nvgpu: Rename nvgpu DMA APIs In the main nvgpu repo. JIRA NVGPU-12 Change-Id: I5e28b13448d171e1511ace0842e53700385f8489 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1455213 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Move DMA API to dma.hAlex Waterman2017-04-06
| | | | | | | | | | | | | | | | | | | Handle gv11b specific of gpu: nvgpu: Move DMA API to dma.h In the main nvgpu repository. JIRA NVGPU-12 Change-Id: I9645c4eedc5f61585d15caeee54db92bc4cca079 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1455212 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: rename mem_desc to nvgpu_memAlex Waterman2017-04-06
| | | | | | | | | | | | | $ find -type f | \ xargs sed -i 's/struct mem_desc/struct nvgpu_mem/g' JIRA NVGPU-12 Change-Id: I2b5d015e45185269bfae7c6d4199fe843ff26834 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1326194 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Rename gk20a_mem_* functionsAlex Waterman2017-04-06
| | | | | | | | | | | | Rename the functions used for mem_desc access to nvgpu_mem_*. JIRA NVGPU-12 Change-Id: I5a1180c9a08d33c3dfc361ce8579c3c767fa5656 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1326193 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: abstract away dma alloc attrsKonsta Holtta2017-03-21
| | | | | | | | | | | | | | Don't use gk20a_gmmu_free_attr because the attrs are embedded in struct mem_desc now. Bug 1853519 Change-Id: Iaa4309d4c2cd334346e09c4fbf15ce826f2ff640 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321314 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Organize semaphore_gk20a.[ch]Alex Waterman2017-02-13
| | | | | | | | | | | | | t19x version. Bug 1799159 Change-Id: I5e4c2a5341909d2e366ebc15adb4cdce70d695c7 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1303264 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* nvgpu: gpu: HW header update for VoltaAlex Waterman2017-01-24
| | | | | | | | | | | | | | | | | | | Similar HW header update as has been done for all the other chips. HW header files are located under: drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/ And can be included like so: #include <nvgpu/hw/gv11b/hw_gr_gv11b.h> Bug 1799159 Change-Id: If39bd71480a34f85bf25f4c36aec0f8f6de4dc9f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284433 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: restore golden contextseshendra Gadagottu2017-01-20
| | | | | | | | | | | | | | | | Restore golden context correctly with subcontext header. Increase subctx header size to hold complete golden context. Also fill function pointer for freeing context header. Bug 1834201 Change-Id: Id8a3437bc437fef02ee15333c1163290217d34d1 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1282440 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: legacy support with subcontextseshendra Gadagottu2016-12-20
gv11b needs atleast one subcontext to submit work. To support legacy in gv11b, currently main context is always copied into subcontext0 (veid0) during channel commit instance. As part of channel commit instance, veid0 for that channel is created and relevant pdb and context info copied to vedi0. JIRA GV11B-21 Change-Id: I5147a1708b5e94202fa55e73fa0e53199ab7fced Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1231169 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-25 12:09:49 -0400