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* gpu: nvgpu: gv11b: hw header for CL 37750038 and mmu faultSeema Khowala2017-01-12
| | | | | | | | | | JIRA GV11B-7 Change-Id: I32428e6b91050ad3f697eb80e2aabda2cc1bfda4 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1249339 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: hw headers for mmu faultSeema Khowala2016-11-07
| | | | | | | | | | JIRA GV11B-7 Change-Id: Ib50c4266a1a9d05b98bf4cbef663b534289055ed Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1249156 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: hw headers for mmu faultSeema Khowala2016-11-03
| | | | | | | | | | | | | JIRA GV11B-7 Change-Id: I9d1a530c668cc3b9e27a6efb4761f68916e85b43 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1246513 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: hw header updateseshendra Gadagottu2016-09-12
| | | | | | | | | | | | | | Updated hw headers to CL#37001916. Some of important changes include new door bell user mode mechanism and new runlist structure. Bug 1735765 Change-Id: Icf01156dd3e7d94466f553ffc53267e4043e1188 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1205888 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: update code to HW CL 36758735seshendra Gadagottu2016-07-07
| | | | | | | | | | | | | Update headers and corresponding code to work with HW CL # 36758735 Bug 1735760 Change-Id: Ie26bfaa6377ab797c5ad978e4796a55334761b5d Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1175882 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gv11b: sysmem aperture for soc memorySeshendra Gadagottu2016-04-19
| | | | | | | | | | | | | In gv11b, soc memory needs to be accessed as sysmem instead of videmem. Bug 1749338 Change-Id: I325c107958229cf717b0b0f18dd123597d1d7567 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1128377 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
* gpu: nvgpu: gv11b: add hw headers for gv11bSeshendra Gadagottu2016-04-13
Add initial versions of header for gv11b Bug 1735757 Change-Id: I76f85bbe98c1fa13c11d8ee1b2889703f62c6f67 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1121486 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
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