| Commit message (Collapse) | Author | Age |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Change for new VA space allocator is being reverted with
http://git-master/r/#/c/749291/ but only for Kernel3.18
In Kernel3.10, we support the new VA allocator
Since we support both the kernel versions as of now,
use a KERNEL_VERSION based mechanism to select
appropriate call
Define new macro NVGPU_USE_NEW_ALLOCATOR for Kernel3.10
where we want to use new allocator
Bug 200106514
Change-Id: I9af26d555278c40e03fe82b0912961a862c8bf55
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/751353
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add platform specific gp10b_mm_iova_addr() to get
iova/phys address for gp10b
If SMMU is not enabled and IO coherence flag is set,
set 34th bit in the physical address and return the
physical address
If SMMU is enabled, return the iova address
Bug 1605653
Change-Id: I5c91a8c8d85d8a8e422406e3c91fc1dda3cb0870
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/713106
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
|
|
|
GP10B physical address width is 37 bits. Use old width for now,
and add gp10b specific definition. We can switch to new definition
once we've verified them.
Bug 1567274
Change-Id: I33cc1b99f14f1a7ee5f6fe3bd3d8b3126c23ecbe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/601703
|
