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* Revert "gpu: nvgpu: gp10b part of new VA allocator"Terje Bergstrom2016-12-27
| | | | | | | | | | This reverts commit 3a4f0285c7e9212b394b2c1b151987a7084de927. Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Change-Id: I886e434ce98e85f99b0a77749179e31c0bd00620 Reviewed-on: http://git-master/r/741468 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
* gpu: nvgpu: gp10b part of new VA allocatorAlex Waterman2016-12-27
| | | | | | | | | | | | | | The comptag allocator is made in the chip-specific init code for the comptags. Thus, a t18x change needs to be made to make sure the new allocator code compiles and works on t18x. Change-Id: I57a34f3c61ebd31f875caa577378e829812f2d4c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/721171 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: fix sparse warnings of static symbolDeepak Nibade2016-12-27
| | | | | | | | | | | | | | | Fix sparse warnings of below type by making necessary symbols static: warning: symbol '<symbol>' was not declared. Should it be static? Bug 200088648 Change-Id: Ic20ef3eb73dcbfe5f13506b5afa629c3e1db59d0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/728012 GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: gp10b: Program stream id to LTCTerje Bergstrom2016-12-27
| | | | | | | | | | | Program a constant stream id 31 to LTC. Bug 1610019 Change-Id: I9b5fb794b5ea8da0fba67a2376126d89e056f955 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/724348 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: gp10b: Do not clear compbit store sizeTerje Bergstrom2016-12-27
| | | | | | | | | Do not clear compbit store size if max size is zero. It's already zero at this point. Change-Id: I70d99cfe459fae27d8c1be4aa569ac0717a454d7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/720599
* gpu: nvgpu: gp10b specific LTC ISRTerje Bergstrom2016-12-27
| | | | | | | | | | | LTC interrupt register got moved, so use the new offset. Bug 1587638 Change-Id: I3dbd44d92f2bcb3634c21ed46870ec1620d936cf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/709571 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: read gobs_per_comptagline_per_sliceJussi Rasanen2016-12-27
| | | | | | | | | | | | Add code to read NV_PLTCG_LTCS_LTSS_CBC_PARAM2_GOBS_PER_COMPTAGLINE_PER_SLICE during t18x ltc init and store it for use in CDE code. Change-Id: I4d4a3a6c7e3ad369d8359ff838e7040a0521b441 Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com> Reviewed-on: http://git-master/r/673150 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: Compression page size to 64kTerje Bergstrom2016-12-27
| | | | | | | | | Define compression page size for gp10b to be 64k. We also need to copy some LTC initialization code from gm20b to gp10b. Change-Id: I0235c32cdb1486a23d33eb98ebbc79c97a3c32d4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/677837
* gpu: nvgpu: gp10b: Fix L2 size calculationTerje Bergstrom2016-12-27
| | | | | | | | | | L2 size is expressed in kB, so add a multiplier. Bug 1592495 Change-Id: I4c10034cd21bf874c84c96f1adc25261b195063d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/671704
* gpu: nvgpu: gp10b: Implement L2 queryTerje Bergstrom2016-12-27
Bug 1567274 Change-Id: I0b8eaebc0949e70f6d8bfbb101048a3d95bec5e3 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/602858 Reviewed-by: Automatic_Commit_Validation_User
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