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path: root/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h
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* gpu: nvgpu: gp10b: Wait for preempted or emptyTerje Bergstrom2016-12-27
| | | | | | | | | | | | | | | ZBC is safe to update and GPU is safe to rail gate when units are in preempted or empty state. Idle may never be reached in case of graphics preemption, so relax the ZBC update wait condition. Bug 1640378 Change-Id: I40c59e9af22a7a30b777c6b9f87e69d130042e44 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/745655 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: gp10b: Correct steady state CB sizeTerje Bergstrom2016-12-27
| | | | | | | | | | Program steady state CB size to be the HW default. Bug 1626065 Change-Id: If0bdc5a649f307b6adab4e914a6201222b8453f8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/725106
* gpu: nvgpu: gp10b: Regenerate HW headersTerje Bergstrom2016-12-27
| | | | | | Change-Id: Id1954b6e96dbc75ab217a4b36a11a0457f9ceef1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/722845
* gpu: nvgpu: accessor for memfmt exceptionDeepak Nibade2016-12-27
| | | | | | | | | | | | Add accessor for NV_PGRAPH_EXCEPTION_MEMFMT Bug 200078514 Change-Id: Ibf4ce91dfac12d7f6cffb7c65873696e080ff1a5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/714167 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add exception registers to dumpDeepak Nibade2016-12-27
| | | | | | | | | | | | | | | | | | Add below exception registers to GR dump : NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN Bug 200078514 Change-Id: I2400e360fea0b3bdcdf5f3dd6ef250867fb191e6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/712481 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: reg with FECS HALT methodSupriya2016-12-27
| | | | | | | | Change-Id: Ia196b98c79a71c9545e555260660e274982455a3 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/709279 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: dump GR status registersDeepak Nibade2016-12-27
| | | | | | | | | | | | | Add function pointer gr_gp10b_dump_gr_status_regs() which will enable dumping GR status registers for gp10b Bug 200062436 Change-Id: Iaecc2f9c9364232079bb03e114f68550bd035372 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/678832 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: update headersSeshendra Gadagottu2016-12-27
| | | | | | | | | | | | | Update replayable page fault fifo, interrupt and bar2 block headers. Bug 1587825 Change-Id: Ifa0d3b640bdd5f3f6fbc7826c1d1edba494340df Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/661117 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement gp10b context creationTerje Bergstrom2016-12-27
| | | | | | | | | | | Implement context creation for gp10b. GfxP contexts need per channel buffers. Bug 1517461 Change-Id: Ifecb59002f89f0407457730a35bfb3fe988b907a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/660236
* gpu: nvgpu: Write ZBC registers to DSSTerje Bergstrom2016-12-27
| | | | | | | | Bug 1567274 Change-Id: Ife98ae512c62bd26450e59338719c7a10635b5dd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/601108
* gpu: nvgpu: Add SM registersTerje Bergstrom2016-12-27
| | | | | | | | | | | | Add SM registers which were taken into use in GPU characteristics. Bug 1551769 Bug 1558186 Change-Id: I705da9ac25556b6b94137199e0acd9af3c8e6422 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/601020
* gpu: nvgpu: headers for linsim CL 33823014Adeel Raza2016-12-27
| | | | | | | | | Change-Id: I1b9172f0afa0391ce6289aa24dc1a993c723c90e Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: http://git-master/r/594681 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: Add SM debug registersTerje Bergstrom2016-12-27
| | | | | | | | | | Add SM debug registers to gp10b, and regenerate headers. Bug 1567274 Change-Id: Ifcfa65a6fbf16e89023caa5aaf4ae3a7846df749 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/592646
* gpu: nvgpu: gp10b specific CB callbacksTerje Bergstrom2016-12-27
| | | | | | | | | Bug 1570662 Change-Id: Icb7e90b1216acfd19bb3027dc9e9844eb08c99d9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/592101 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Synchronize gp10b headers with gm20bTerje Bergstrom2016-12-27
| | | | | | | | | | | | Added all registers added to gk20a and gm20b to gp10b. Remove gp10b trim registers, because they will not be accessed by CPU. Bug 1567274 Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/590312 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: headers for linsim CL 33688874Adeel Raza2016-12-27
| | | | | | | | | | Bug 1561645 Change-Id: Iccd909d54fc5b1d1c8fbc903b5908bf6f7f22ec8 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: http://git-master/r/553151 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
* gpu: nvgpu: gp10b headersKen Adams2016-12-27
first cut. just to get started... Change-Id: I3682909f9ac0a5395ec834046789356f53d0c47d Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/447753
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-17 07:36:46 -0400