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path: root/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h
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* gpu: nvgpu: gp10b: Use sysmem aperture for SoC memoryTerje Bergstrom2016-12-27
| | | | | | | | | | | | | In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it has to be accessed as sysmem. Change-Id: Id26588df17b4921533804f72bc8c0ac3892ae154 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1122591 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
* gpu: nvgpu: gp10b: Sync with register generatorTerje Bergstrom2016-12-27
| | | | | | | | | Use re-generated register definitions. This synchronizes kernel with the register generator. Change-Id: I5ad34ad0b92327091758a2d10581a1b4170fa919 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120811
* gpu: nvgpu: gp10b: Regenerate HW headersTerje Bergstrom2016-12-27
| | | | | | Change-Id: Id1954b6e96dbc75ab217a4b36a11a0457f9ceef1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/722845
* gpu: nvgpu: headers for linsim CL 34116551Peng Du2016-12-27
| | | | | | | | | Change-Id: Ia8760772b0135813475f96a786484d7caef3759d Signed-off-by: Peng Du <pdu@nvidia.com> Reviewed-on: http://git-master/r/677464 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: headers for linsim CL 34000094Adeel Raza2016-12-27
| | | | | | | | Change-Id: I43380fda328414e96601e1c03c3e0ec28c0b4871 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: http://git-master/r/666905 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gp10b: update headersSeshendra Gadagottu2016-12-27
| | | | | | | | | | | | | Update replayable page fault fifo, interrupt and bar2 block headers. Bug 1587825 Change-Id: Ifa0d3b640bdd5f3f6fbc7826c1d1edba494340df Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/661117 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Synchronize gp10b headers with gm20bTerje Bergstrom2016-12-27
| | | | | | | | | | | | Added all registers added to gk20a and gm20b to gp10b. Remove gp10b trim registers, because they will not be accessed by CPU. Bug 1567274 Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/590312 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gp10b headersKen Adams2016-12-27
first cut. just to get started... Change-Id: I3682909f9ac0a5395ec834046789356f53d0c47d Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/447753
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-17 09:28:14 -0400