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Move the gp106 HW headers to a new directory specially for them:
include/nvgpu/hw/gp106
And change the code to include like so:
#include <nvgpu/hw/gp106/hw_fb_gp106.h>
This is part of the process to restructure the nvgpu driver.
Bug 1799159
Change-Id: I76a4ff2e92021150ce65a8843bc12bb614a0e68a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1280327
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Read video memory size from hardware during initialization for devices
that support it.
JIRA DNVGPU-14
Change-Id: I84e1bca0eaac8dc204e1fb82628acc6b52c3e5cc
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1157212
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt support for
Pascal GPU series
5) Removed hard coded engine_id logic and
made generic way
6) Code cleanup for readability
JIRA DNVGPU-26
Change-Id: Ibf46a89a5308c82f01040ffa979c5014b3206f8e
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1156022
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Added device_info_data parsing
support for pascal GPU series.
This is required
to identify the (Logical CE)
NV_PTOP_DEVICE_INFO_TYPE_ENUM_LCE
instance id.
(example - CE0, CE1, CE2, CE3, ...)
JIRA DNVGPU-26
Change-Id: I35c42cb1d544729e4099db1528c690dd2be025f4
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1151605
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Add support for chips gp104 and gp106.
Change-Id: Ied5f239bdd0ec85245bce1fb6ef51330871d0f05
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120465
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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