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* nvgpu: gm20b: MISRA Rule 21.2 header gurad fixessmadhavan2018-09-06
| | | | | | | | | | | | | | | | | | | MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations caused by include guards by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER_H' JIRA NVGPU-1028 Change-Id: Ic60b2de8bb705f189134483fff1e2dff8ea96a12 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1808186 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: resolve MISRA 10.3 violationsPhilip Elcan2018-08-29
| | | | | | | | | | | | | | | | | | MISRA rule 10.3 prohibits implicit assigning of u64 to u32. The nvgpu was assigning the value returned by ARRAY_SIZE which is a u64 to a u32. This value was then returned in a function defined by gpu_ops. This patch changes the return type for these gpu_ops to u64 and updates the functions that implement the functions and lastly the saved value. This removes the violation in this instance. JIRA NVGPU-647 Change-Id: I2b93929633cf4809d8f65ee41f739f45d4c2cda7 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1805588 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Change license for common files to MITTerje Bergstrom2017-09-26
| | | | | | | | | | | | Change license of OS independent source code files to MIT. JIRA NVGPU-218 Change-Id: I1474065f4b552112786974a16cdf076c5179540e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1565880 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Reorg regops HAL initializationSunny He2017-08-02
| | | | | | | | | | | | | | | | | | | | Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the regops sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I7e2ccf158a8e7efa453a3326e86146660f18926f Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530135 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Tested-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gm20b: correct hdr #defineScott Long2015-05-18
| | | | | | | | | | | __REGOPS_GK20A_H_ -> __REGOPS_GM20B_H_ Bug 1634208 Change-Id: Ic623563492c084162bfad10f895896d77b4192ed Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: http://git-master/r/729749 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gm20b: update regops whitelistKevin Huang2015-03-18
Bug 1500195 Change-Id: Ie2253f2650844cbc707a3083cc2f6b5150c4a17b Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/488508 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>