| Commit message (Collapse) | Author | Age |
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ce2 interrupts enabled only on gk20a and gm20b when
interrupts are handled through hal
Change-Id: Ib570db8f5f41e71e768b95e781153ec8a5d20015
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/677447
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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PBDMA HW signature depends on the chip.
Change-Id: If57d721d9bb77a090f967930a1aa2037bf4a16fe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/672922
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Retrieve channel count from gm20b specific header instead of the
gk20a header. This increases channel count from 128 to 512.
Change-Id: I96d4887432852795f7f526e33f0d3d2458f3af0e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/500623
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The nvgpu driver now supports using the Tegra graphics virtualization
interfaces to support gk20a in a virtualized environment.
Bug 1509608
Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/440122
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement gm20b version of fifo recovery.
Bug 1495967
Change-Id: I2792b217178d157427f49e0c450d4ac620399962
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/394138
Reviewed-on: http://git-master/r/401402
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
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Bug 1450792
Change-Id: I09f7c727a773178613fe555eb025ac324da0008e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/381128
Reviewed-on: http://git-master/r/396373
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
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