| Commit message (Collapse) | Author | Age |
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MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations caused by
include guards by renaming them to follow the convention,
'NVGPU_PARENT-DIR_HEADER_H'
JIRA NVGPU-1028
Change-Id: Ic60b2de8bb705f189134483fff1e2dff8ea96a12
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1808186
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Use nvgpu_os_linux_ops to initialize gm20b debugfs
functions.
gm20b_clk_init_debugfs() will be invoked during initialization
from nvgpu_finalize_poweron_linux().
JIRA NVGPU-603
Change-Id: Ie89e427cc589ae14e1e7f5918d918126fb4afd77
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797905
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GM20B GPCPLL registers are accessed via sys address space with the
exception of the last dvfs2 register that can be accessed only through
bcast address. However, in debugfs loop dvfs2 sys address should be
used as loop terminator; otherwise, loop body is never executed, and
GPCPLL registers debugfs node is broken. Fixed it in this commit.
Change-Id: Ifea839757fda7d97b2c9238178227ab198526ab0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1808784
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move gk20a/platform_gk20a.h to linux specific directory as
common/linux/platform_gk20a.h since this file includes all linux specific
stuff
Fix #includes in all the files to include this file with correct path
Remove #include of this file where it is no more needed
Fix gk20a_init_sim_support() to receive struct gk20a as parameter
instead of receiving linux specific struct platform_device
NVGPU-316
Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1589938
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Change license of OS independent source code files to MIT.
JIRA NVGPU-218
Change-Id: I1474065f4b552112786974a16cdf076c5179540e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the clk
and clk_arb sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I553353df836b187b8eac61e16b63080b570c96b8
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1511076
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Move debugfs code from clk_gm20b.c to file in Linux module
common/linux/debug_clk.c
This file will be compiled only if CONFIG_DEBUG_FS is set
Define below new HAL APIs for various clock operations
which can be accessed from debug file
init_debugfs()
get_voltage()
get_gpcclk_clock_counter()
pll_reg_write()
get_pll_debug_data()
Export nvgpu_pl_to_div() and nvgpu_div_to_pl() so
that these can be accessed from debug_clk.c
Add new structure nvgpu_clk_pll_debug_data so that
all required register values for debugging can be
made available in debug_clk.c
Add new API gm20b_get_gpc_pll_parms() so that statically
defined variable can be accessed in debug_clk.c too
Remove global variable dvfs_safe_max_freq and add
it to struct clk_gk20a so that it can accessed
from both clk_gm20b.c and debug_clk.c
Jira NVGPU-62
Change-Id: I3ae70b40235e78141a686686930e1f178ad59453
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1488903
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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We currently register gm20b clock operations gm20b_clk_ops
in function gm20b_register_gpcclk() which is in clk_gm20b.c
Since this is common clock framework and hence linux dependency,
move this clock registration to platform specific file
Note that all the clock operations remain in clk_gm20b.c.
APIs in platform file will eventually call operations
in clk_gm20b.c
Jira NVGPU-49
Change-Id: Ib0b0d9f4719b196d764825a7dddb08f1fbd7a567
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1483091
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Instead of using Linux APIs for mutex and spinlocks
directly, use new APIs defined in <nvgpu/lock.h>
Replace Linux specific mutex/spinlock declaration,
init, lock, unlock APIs with new APIs
e.g
struct mutex is replaced by struct nvgpu_mutex and
mutex_lock() is replaced by nvgpu_mutex_acquire()
And also include <nvgpu/lock.h> instead of including
<linux/mutex.h> and <linux/spinlock.h>
Add explicit nvgpu/lock.h includes to below
files to fix complilation failures.
gk20a/platform_gk20a.h
include/nvgpu/allocator.h
Jira NVGPU-13
Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1293187
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Register gpcclk with Common Clock Framework to expose GPCPLL frequency
control
Bug 200233943
Change-Id: Id6f7bbaca15f22157b91b092c2a035af933fa71e
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1236979
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Do not build clock code if TEGRA_CLK_FRAMEWORK is not defined. Also
make GK20A_DEVFREQ depend on TEGRA_CLK_FRAMEWORK, and build scaling
governor only if GK20A_DEVFREQ is enabled.
Bug 1567274
Change-Id: I6ea1462e7a110fb46c9d66ceda71167cff19699e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/562475
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Made GK20A and GM20B clock operations static, since they are invoked
only via HAL interfaces.
Bug 1450787
Change-Id: Ia30218ad4244bd8790b5ef96d1963678d0ba39e1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/441710
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
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Bug 1450787
Change-Id: Id7fb699d9129a272286d6bc93e0e95844440a628
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/440536
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Split clk_ops for GK20A and GM20B into different files
Bug 1450787
Change-Id: I34d16c54ac40c70854e80588475434c9e50b51a5
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/437771
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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