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* gpu: nvgpu: Use new kmem API functions (gk20a mm)Alex Waterman2017-03-30
| | | | | | | | | | | | | | | | | | | | Use the new kmem API functions in gk20a's mm code. Add a struct gk20a pointer to the dmabuf priv struct so that the cleanup function has access to the gk20a struct. Also add a gk20a pointer to some of the sg table functions so that they can use the nvgpu kmem APIs. Bug 1799159 Bug 1823380 Change-Id: I85a307c6bf862627c5b1af0e077283b48d78fa72 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318321 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (gm20b/*)Alex Waterman2017-03-28
| | | | | | | | | | | | | | | | | | | | | Use the new kmem API functions in gm20b/*. Also add a struct gk20a pointer to lsfm_free_ucode_img_res() lsfm_free_nonpmu_ucode_img_res() so nvgpu_kfree() works. Bug 1799159 Bug 1823380 Change-Id: I3373600455553710adb14e0fb5743bf197095a03 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318320 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: abstract away dma alloc attrsKonsta Holtta2017-03-21
| | | | | | | | | | | | | | | | | | | | | | | | Don't use enum dma_attr in the gk20a_gmmu_alloc_attr* functions, but define nvgpu-internal flags for no kernel mapping, force contiguous, and read only modes. Store the flags in the allocated struct mem_desc and only use gk20a_gmmu_free, remove gk20a_gmmu_free_attr. This helps in OS abstraction. Rename the notion of attr to flags. Add implicit NVGPU_DMA_NO_KERNEL_MAPPING to all vidmem buffers allocated via gk20a_gmmu_alloc_vid for consistency. Fix a bug in gk20a_gmmu_alloc_map_attr that dropped the attr parameter accidentally. Bug 1853519 Change-Id: I1ff67dff9fc425457ae445ce4976a780eb4dcc9f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321101 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move all FB programming to FB HALTerje Bergstrom2017-03-17
| | | | | | | | | | | | | | | | | | | | | Move all programming of FB to fb_*.c files, and remove the inclusion of FB hardware headers from other files. TLB invalidate function took previously a pointer to VM, but the new API takes only a PDB mem_desc, because FB does not need to know about higher level VM. GPC MMU is programmed from the same function as FB MMU, so added dependency to GR hardware header to FB. GP106 ACR was also triggering a VPR fetch, but that's not applicable to dGPU, so removed that call. Change-Id: I4eb69377ac3745da205907626cf60948b7c5392a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321516 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Implement get_rate/set_rate as GPU opTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | | | | | | Move clock APIs from gk20a_platform to gpu_ops. At the same time allow use of internal get_rate/set_rate for querying both GPCCLK and PWRCLK on iGPU. At the same time we can replace calls to clk framework with the new HAL and drop direct dependency to clk framework. gp10b ops were replaced as a whole at HAL initialization. That replaces anything set in platform probe stage, so reduce that to touch only clock gating regs. Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300113 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* nvgpu: gpu: pmu: Use pmu ops to call pmu_reset().Deepak Goyal2017-02-24
| | | | | | | | | | | In this patch hard coded function calls for PMU reset are replaced by PMU ops. Change-Id: I266c43e3540163a133895244dcf91169116812f5 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1303757 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: ACR interface headers reorganizationMahantesh Kumbar2017-02-23
| | | | | | | | | | | | | | | | | | | | | | -Moved ACR interface headers from acr_gm20b.h/acr_gp106.h to Its specific header files under “drivers/gpu/nvgpu/include/nvgpu/acr/” Folder. - nvgpu_acr.h - Top-level header-file which include ACR interfaces headers & defines required to communicate with ACR, including this header file is good to get access into ACR interface & made changes accordingly, -Deleted acr.h & acr_t18x.h as not required anymore & removed its include from dependent files. Jira NVGPU-19 Change-Id: Ie404043cfe1ab32404eb63a43831f470d8436324 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1304748 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use common nvgpu mutex/spinlock APIsDeepak Nibade2017-02-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using Linux APIs for mutex and spinlocks directly, use new APIs defined in <nvgpu/lock.h> Replace Linux specific mutex/spinlock declaration, init, lock, unlock APIs with new APIs e.g struct mutex is replaced by struct nvgpu_mutex and mutex_lock() is replaced by nvgpu_mutex_acquire() And also include <nvgpu/lock.h> instead of including <linux/mutex.h> and <linux/spinlock.h> Add explicit nvgpu/lock.h includes to below files to fix complilation failures. gk20a/platform_gk20a.h include/nvgpu/allocator.h Jira NVGPU-13 Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1293187 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Organize semaphore_gk20a.[ch]Alex Waterman2017-02-13
| | | | | | | | | | | | | | | | | | | | | | | Move semaphore_gk20a.c drivers/gpu/nvgpu/common/ since the semaphore code is common to all chips. Move the semaphore_gk20a.h header file to drivers/gpu/nvgpu/include/nvgpu and rename it to semaphore.h. Also update all places where the header is inluced to use the new path. This revealed an odd location for the enum gk20a_mem_rw_flag. This should be in the mm headers. As a result many places that did not need anything semaphore related had to include the semaphore header file. Fixing this oddity allowed the semaphore include to be removed from many C files that did not need it. Bug 1799159 Change-Id: Ie017219acf34c4c481747323b9f3ac33e76e064c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284627 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Organize nvgpu_common.[ch]Alex Waterman2017-02-13
| | | | | | | | | | | | | | | | Move nvgpu_common.c to drivers/gpu/nvgpu/common since it is a common C file to all drivers. Similarly move nvgpu_common.h to drivers/gpu/nvgpu/include/nvgpu since this follows the new include guidelines. Bug 1799159 Change-Id: I00ebed289973b27704c2cff073526e36505bf699 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284612 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
* gpu: nvgpu: Use timer API in gm20b codeAlex Waterman2017-01-18
| | | | | | | | | | | | | | | Use the timer API instead of Linux specific APIs for handling timeouts. Also, lower the L2 timeout from 1 second (absurdly long) to 5ms. Bug 1799159 Change-Id: I27dbc35b12e9bc22ff2207bb87543f76203e20f1 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1273825 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move gm20b HW headersAlex Waterman2017-01-11
| | | | | | | | | | | | | | | | | | | | Move the gm20b HW headers to a new directory specially for them: include/nvgpu/hw/gm20b And change the code to include like so: #include <nvgpu/hw/gm20b/hw_fb_gm20b.h> This is part of the process to restructure the nvgpu driver. Bug 1799159 Change-Id: I0765e2f6bcd5aa1e803efd250056de3cf9bfa7ed Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1244791 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: return error on pmu_ucode_details() failureDeepak Nibade2017-01-05
| | | | | | | | | | | | | | | | | | | | | | In lsfm_discover_ucode_images(), we currently collect pmu ucode details with API pmu_ucode_details() But if this API fails, we still continue loading other firmwares In case loading of pmu firmware fails due to some reason, we should actually bail out immediately with error Also, remove unnecessary chekc (ucode_img.lsf_desc != NULL) since pmu_ucode_details() ensures that this cannot be NULL Bug 200265373 Change-Id: I68e7f9575e2a07b473ceacc528a5d172b58d6fb6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1276555 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix signed comparison bugsTerje Bergstrom2016-11-17
| | | | | | | | | | | | Fix small problems related to signed versus unsigned comparisons throughout the driver. Bump up the warning level to prevent such problems from occuring in future. Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252068 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: pmu HAL updateseshendra Gadagottu2016-11-01
| | | | | | | | | | | | | | Update pmu HAL to check for pmu support. pmu initialization will check for pmu support in that platform. JIRA GV11B-21 Change-Id: Ib55be58a1540862b7a91a6162544d10be85b5eb4 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1243911 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Suppress error msg from VBIOS overlayTerje Bergstrom2016-10-09
| | | | | | | | | | | | | | | | | | | | Suppress error message when nvgpu tries to load VBIOS overlay, but one is not found. This situation is normal. This is done by moving gk20a_request_firmware() to be nvgpu generic function nvgpu_request_firmware(), and adding a NO_WARN flag to it. Introduce also a NO_SOC flag to suppress attempt to load firmware from SoC specific directory in addition to the chip specific directory. Use it for dGPU firmware files. Bug 200236777 Change-Id: I0294d3308f029a6a6d3c2effa579d5f69a91e418 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1223840 (cherry picked from commit cca44c3f010f15918cdd2259c15170ba1917828a) Reviewed-on: http://git-master/r/1233353 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: use vidmem by default in gmmu_alloc variantsKonsta Holtta2016-07-08
| | | | | | | | | | | | | | | | | | For devices that have vidmem available, use the vidmem allocator in gk20a_gmmu_alloc{,attr,_map,_map_attr}. For others, use sysmem. Because all of the buffers haven't been tested to work in vidmem yet, rename calls to gk20a_gmmu_alloc{,attr,_map,_map_attr} to have _sys at the end to declare explicitly that vidmem is used. Enabling vidmem for each now is a matter of removing "_sys" from the function call. Jira DNVGPU-18 Change-Id: Ibe42f67eff2c2b68c36582e978ace419dc815dc5 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1176805 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: support in-kernel vidmem mappingsKonsta Holtta2016-07-06
| | | | | | | | | | | | | | | Propagate the buffer aperture flag in gk20a_locked_gmmu_map up so that buffers represented as a mem_desc and present in vidmem can be mapped to gpu. JIRA DNVGPU-18 JIRA DNVGPU-76 Change-Id: I46cf87e27229123016727339b9349d5e2c835b3e Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1169308 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix coverity issueVandana Salve2016-07-04
| | | | | | | | | | | | | | | | Fix coverity defects, Resource leak Coverity id 33601 Bug 1781383 Change-Id: I5eef698d9a2dfccd48199c628a7898351cb74445 Signed-off-by: Vandana Salve <vsalve@nvidia.com> Reviewed-on: http://git-master/r/1173660 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: WPR & PMU interface updateMahantesh Kumbar2016-06-04
| | | | | | | | | | | | | Update WPR interface & PMU interface to support latest ACR/PMU ucode versions Change-Id: I4d1bd7a5c43751e96c1db58832cd316006d56954 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1158070 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: update HAL of ACR BLMahantesh Kumbar2016-06-01
| | | | | | | | | | | | | -update HAL of ACR BL which can support gm204/gm206 and DMATRFBASE method to global JIRA DNVGPU-10 Change-Id: I56fc7ce040dadb6473f6f375ee6ce90783a046ad Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1154954 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fixing sparse error/warningMahantesh Kumbar2016-06-01
| | | | | | | | | | | | | | | | | - nvgpu/gm20b/acr_gm20b.c:88:6: warning: symbol 'gm20b_wpr_info' was not declared. Should it be static? - nvgpu/gm20b/acr_gm20b.c:1052:5: warning: symbol 'gm20b_bootstrap_hs_flcn' was not declared. Should it be static? Bug 200067946 Change-Id: I600f06055bd896a88eed5f5549310aa057f86e19 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1156054 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: move & rename acr_gm20b to acr_descMahantesh Kumbar2016-05-26
| | | | | | | | | | | | | acr_gm20b renamed to acr_desc to support multiple gpu chips JIRA DNVGPU-10 Change-Id: Ib3b38d5845043f026ddc365a682b7bb454463326 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1152401 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: secure boot HAL updateMahantesh Kumbar2016-05-26
| | | | | | | | | | | | | Updated/added secure boot HAL with methods required to support multiple GPU chips. JIRA DNVGPU-10 Change-Id: I343b289f2236fd6a6b0ecf9115367ce19990e7d5 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1151784 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmemKonsta Holtta2016-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support vidmem, pass g and mem_desc to the buffer memory accessor functions. This allows the functions to select the memory access method based on the buffer aperture instead of using the cpu pointer directly (like until now). The selection and aperture support will be in another patch; this patch only refactors these accessors, but keeps the underlying functionality as-is. gk20a_mem_{rd,wr}32() work as previously; add also gk20a_mem_{rd,wr}() for byte-indexed accesses, gk20a_mem_{rd,wr}_n() for memcpy()-like functionality, and gk20a_memset() for filling buffers with a constant. The 8 and 16 bit accessor functions are removed. vmap()/vunmap() pairs are abstracted to gk20a_mem_{begin,end}() to support other types of mappings or conditions where mapping the buffer is unnecessary or different. Several function arguments that would access these buffers are also changed to take a mem_desc instead of a plain cpu pointer. Some relevant occasions are changed to use the accessor functions instead of cpu pointers without them (e.g., memcpying to and from), but the majority of direct accesses will be adjusted later, when the buffers are moved to support vidmem. JIRA DNVGPU-23 Change-Id: I3dd22e14290c4ab742d42e2dd327ebeb5cd3f25a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1121143 Reviewed-by: Ken Adams <kadams@nvidia.com> Tested-by: Ken Adams <kadams@nvidia.com>
* gpu: nvgpu: Support GPUs with no physical modeTerje Bergstrom2016-04-13
| | | | | | | | | | | Support GPUs which cannot choose between SMMU and physical addressing. Change-Id: If3256fa1bc795a84d039ad3aa63ebdccf5cc0afb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120469 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: Use device instead of platform_deviceTerje Bergstrom2016-04-08
| | | | | | | | | Use struct device instead of struct platform_device wherever possible. This allows adding other bus types later. Change-Id: I1657287a68d85a542cdbdd8a00d1902c3d6e00ed Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120466
* gpu: nvgpu: use gk20a_free_sgtable to free sgtableYogish Kulkarni2016-03-23
| | | | | | | | | | | | | | | | | Use gk20a_free_sgtable to free sgtable Bug 200130473 Change-Id: I6ddffb848a289ce81804502b7628feb5a4a8d000 Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com> Reviewed-on: http://git-master/r/785884 (cherry picked from commit a4f3b53f2ed3971d9b8945f5bc9c1b2822156a89) Reviewed-on: http://git-master/r/833646 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: LRF, TEX, LTC, DRAM overrideSupriya2016-02-26
| | | | | | | | | | | | - Adding support for FECS mem overrides Bug 1699676 Change-Id: I6c9ddcd98d57b29059513ee508c6f92b194c4fc7 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/921253 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gm20b: use jiffies for wait on PMUVijayakumar2015-12-30
| | | | | | | | | | | bug 200157852 Change-Id: Ib5ab6ed5f3d8356efd527ce5ff6e4134ac60da7d Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/921711 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
* gpu: nvgpu: gm20b: use jiffies for wait on PMUVijayakumar2015-11-25
| | | | | | | | | | bug 200153970 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Change-Id: Ia5f616269bfeb834540bf4da6ecfc6e399682819 Reviewed-on: http://git-master/r/836966 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: load gpccs signatureMahantesh Kumbar2015-09-30
| | | | | | | | | | | | | load gpccs signatture for secure gpccs boot Change-Id: Ia8815a4575c42eab2ce62cbece8bb080e1f35ae6 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/793402 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/795583 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gpccs load using priv loadMahantesh Kumbar2015-09-15
| | | | | | | | | | | - load gppcs with force priv load method. Bug n/a Change-Id: I3566375f51da701c90e0f5f873c71953f0113443 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/798144 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix NS boot transcfgSupriya2015-08-21
| | | | | | | | | | | | | Bug 1667322 Accommodate for transcfg address change Change-Id: I7054202b8ce3be1a3fbfe0465e662be6f9740eb3 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/780326 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement priv pagesTerje Bergstrom2015-07-03
| | | | | | | | Implement support for privileged pages. Use them for kernel allocated buffers. Change-Id: I720fc441008077b8e2ed218a7a685b8aab2258f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/761919
* gpu: nvgpu: load secure gpccs using dmaVijayakumar2015-06-26
| | | | | | | | | | | | | | | | | | bug 200080684 use new cmd defined in ucode for loading GR falcons. flip PRIV load flag in lsb header to indicate using dma. use pmu msg as cmd completion for new cmd instead of polling fecs mailbox. also move check for using dma in non secure boot path to hal. Change-Id: I22582a705bd1ae0603f858e1fe200d72e6794a81 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/761625 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add secure gpccs boot supportVijayakumar2015-05-18
| | | | | | | | | | | | | | | | | bug 200080684 keeping it disabled by default also trimming the code by removing redundant variable to check recovery. pmu quick wait now checks only for irqs which are serviced by kernel. requests pmu to bit bang gpccs ucode. Change-Id: I12ef23d6d59b507e86a129b69eab65b21d0438c6 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/729622 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Do not leak ACR headerTerje Bergstrom2015-05-18
| | | | | | | | | | | | | | | 4b6f83704f054f5b21e05873fa5862c667a9992e tried to fix ACR related leak. It fell short, because the data structures related were local and thus the leak was not really fixed. This patch stores the ACR ucode blob in a global variable, which survives across rail gating. Change-Id: Iec3ac9d41156baa26048e079732568c0a95264f4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/733732 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: Use MC API for SECURITY_CARVEOUT2Alex Waterman2015-05-18
| | | | | | | | | | | | | | | This removes all direct access to the MC registers. This requires that the MC be loaded before the GPU. Bug 1540908 Change-Id: I90bcde62f65a0c0d73a2bbe92cbf4a980c671c7d Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/453653 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Supriya Sharatkumar <ssharatkumar@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fill in ACR header only onceTerje Bergstrom2015-05-18
| | | | | | | | | | | | | | We call prepare_ucode_blob() once each time we un-railgate. We allocate prepare the header for ACR ucode there, but the header never gets freed. Allocate and prepare the ACR header only once. Change-Id: I948da8b47d6bb2fa021868d7038d2cc35eccb460 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/729745 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Use common allocator for ACRTerje Bergstrom2015-05-18
| | | | | | | | | | | | Reduce amount of duplicate code around memory allocation by using common helpers, and common data structure for storing results of allocations. Bug 1605769 Change-Id: Ib70db4dff782176ed7f92b6809c8415b8c35abe1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/721120
* gpu: nvgpu: Use gk20a_mem_phys instead of sg_physTerje Bergstrom2015-04-04
| | | | | | | | | There were still a couple of places using sg_phys directly. Use new gk20a_mem_phys() to make the code shorter. Change-Id: I6eb9b14e0c14a27ec39bacd06ab24e31e99769ca Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/717502
* gpu: nvgpu: Implement common allocator and mem_descTerje Bergstrom2015-04-04
| | | | | | | | | | Introduce mem_desc, which holds all information needed for a buffer. Implement helper functions for allocation and freeing that use this data type. Change-Id: I82c88595d058d4fb8c5c5fbf19d13269e48e422f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/712699
* gpu: nvgpu: gm20b: WPR size 0, on railgate exitSupriya2015-04-04
| | | | | | | | | | | | | | | | | | | Bug 200066741 ACR ucode has mechanism to skip WPR blob copy for second time, in case WPR size is sent as 0 to acr ucode. With above there is a saving of around 0.5 ms, but, in conjunction with acr change to disable LS sig verification, and scrubbing empty spaces in WPR sections to 0. This change can reduce railgate exit latency by 4ms ACR ucodes to be checked in main, as a different CL, and after getting prod signs for ACR Change-Id: I9d662027abf0b2615176d17433ff3ec3ae53d78a Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/681892 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* nvgpu: gm20b: Ensure ACR boot failure is returnedSupriya2015-03-18
| | | | | | | | | | | | | | | | | | Bug 200059877 ACR boot failure is returned in falcon mailbox 0 return EAGAIN in case of ACR boot failure Change-Id: I683984402137bb42dd69f2d667191d5986144c17 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/660529 (cherry picked from commit 404c98b704bec5c707bd0c9b03364c8c6d546cbf) Reviewed-on: http://git-master/r/662476 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Submit coverity fixesTerje Bergstrom2015-03-18
| | | | | | | | | | Clear ioctl buffer and fix double free, and error case memory leak. Bug 200059216 Change-Id: I21cc2b0f6a7e8fca09f72caf4c54d570b13f400b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/655347
* gpu: nvgpu: Use driver-wide timeout for ACR bootTerje Bergstrom2015-03-18
| | | | | | | | | | | In simulation we disable timeouts system-wide. Use the system-wide timeout for ACR boot to enable ACR boot in simulation. Bug 1546850 Change-Id: I58fc0485725195feab24ae5fe4f249116668bbcc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/606273
* gpu: nvgpu: Physical page bits to be per chipTerje Bergstrom2015-03-18
| | | | | | | | | | Retrieve number of physical page bits based on chip. Bug 1567274 Change-Id: I5a0f6a66be37f2cf720d66b5bdb2b704cd992234 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/601700
* gpu: nvgpu: fix sparse warningsDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | Fix below sparse warnings : warning: Using plain integer as NULL pointer warning: symbol <variable/funcion> was not declared. Should it be static? warning: Initializer entry defined twice Also, remove dead functions Bug 1573254 Change-Id: I29d71ecc01c841233cf6b26c9088ca8874773469 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/593363 Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: Changes to support LS sigSupriya2015-03-18
| | | | | | | | | | | | Support added to send PMU and FECS signatures to ACR ucode Bug 200046413 Change-Id: Ie1babb640be20a697ad4d6dd18bd11161edb263c Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Signed-off-by: Supriya <ssharatkumar@nvidia.com> Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-16 15:31:08 -0400