| Commit message (Collapse) | Author | Age |
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Add support for cyclestats snapshots in the virtual case
Bug 1700143
JIRA EVLR-278
Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1211547
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Allocting blob space for pmu might need fixed address
allocation in vidmem and during boot up
But if some page tables are allocated before blob space,
blob space allocation could fail
Fix this by allocating blob space early during boot up
Jira DNVGPU-20
Change-Id: I30eca1023c8f8f8be101bb7e160ba57a7040911a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1206402
(cherry picked from commit fad4309ce345ed3879f497bda27f2eceb1084dbb)
Reviewed-on: http://git-master/r/1210956
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move dbg_session_ops to gops for better code consistency
JIRA VFND-1905
Change-Id: I04a11d77dd8c26d9922e80e556822f80dd2bc36d
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1192641
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Unset get_phys_addr_bits as PCIe devices do not need
to care if SMMU is enabled or not.
Jira VFND-1965
Change-Id: I358834863fb365092904da219be80d764f6af8ec
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1183089
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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For devices that have vidmem available, use the vidmem allocator in
gk20a_gmmu_alloc{,attr,_map,_map_attr}. For others, use sysmem.
Because all of the buffers haven't been tested to work in vidmem yet,
rename calls to gk20a_gmmu_alloc{,attr,_map,_map_attr} to have _sys at
the end to declare explicitly that vidmem is used. Enabling vidmem for
each now is a matter of removing "_sys" from the function call.
Jira DNVGPU-18
Change-Id: Ibe42f67eff2c2b68c36582e978ace419dc815dc5
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1176805
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 200214046
Change-Id: I483e6c5ae484ccae61712884f7b4368291791fcd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1172598
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm206/acr_gm206.c:207:5:
warning: symbol 'gm206_bootstrap_hs_flcn' was not declared.
Should it be static?
Bug 200067946
Change-Id: Idc8c464b03eb9a382f54095cd3e04786be19308c
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1172969
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Use the general video memory allocator for reserving wpr space for acr
ucode blob instead of crafting a mem_desc manually.
Jira DNVGPU-16
Change-Id: Ie1b1e4b76b9678a33f4ef10ddcbf85259bfab5fd
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1165643
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Fixed the following sparse warnings:
- warning: symbol 'gm206_ce_isr' was not declared.
Should it be static?
- warning: symbol ''gm206_ce_nonstall_isr' was not declared.
Should it be static?
Bug 200088648
Change-Id: I30f66ba4225d5544d6110bc4a70235234ad4001d
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1161604
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Include mm_gm106.h in mm_gm106.c to bring function declarations visible
and to fix a Sparse warning.
Bug 200088648
Change-Id: Ifbedafdd75ce0ee019b39d507b8b113cccdc8918
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1161608
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Read video memory size from hardware during initialization for devices
that support it.
JIRA DNVGPU-14
Change-Id: If190f2d89f7148520ee274ca674f972987c8056d
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1157215
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
for gm206 GPU family
5) Added generic mechanism to identify the
CE engine pri_base address for gm206
(CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
made generic way
7) Code cleanup for readability
JIRA DNVGPU-26
Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Fix calculation of timeout in multiple places. The #defines
GR_IDLE_CHECK_DEFAULT and GR_IDLE_CHECK_MAX are meant to be used
only for defining the frequency of checking for timeout. Using them
for actual timeouts makes the timeout really short.
Change-Id: I3d0f8cbc91d619be8e5a9168ee1ab1d6298f129b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1158269
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enable gm204/gm206 GPMU secure boot & build.
JIRA DNVGPU-11
Change-Id: I3502d227d0baad9e3a27f46d1d6b0d2a83503b6c
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1156331
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Adding PMU modules to boot & comunicate
with PMU F/W
JIRA DNVGPU-11
Change-Id: I5afc9209f70fc13376268f9c94daef6b75527c71
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1156028
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Update ACR BL desc & support for ACR boot.
JIRA DNVGPU-10
Change-Id: Iced2e10695439b2e1b47835f5c3c8a5d274e4b1e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1155027
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Added device_info_data parsing
support for maxwell GPU series.
JIRA DNVGPU-26
Change-Id: I06dbec6056d4c26501e607c2c3d67ef468d206f4
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1151602
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add support for chips gm204 and gm206. Adds also support for reading
VBIOS and booting devinit and pre-os images on PMU.
Change-Id: I4824b44245611e5379ace62793cc37158048f432
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120467
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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