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* gpu: nvgpu: backward support for HW2.5 Rev.AThomas Fleury2017-06-21
| | | | | | | | | | | | | | | | | | | | Add backward support for HW2.5 Rev.A board: - no INA3221 for voltage, current, and power - use PG418 MCLK switching sequences Allow VBIOS from .53 for PG419 Bug 1929155 Change-Id: Ifacfc8cff6d00f66af92305119d0f0d3b9a1e438 Reviewed-on: http://git-master/r/1497001 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> (cherry picked from commit 952778f814916b0b3d5043c43755bfccb467c3d4) Reviewed-on: http://git-master/r/1497295 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Scrub gk20a_platform dependenciesTerje Bergstrom2017-05-18
| | | | | | | | | | | | | | Remove gk20a_platform dependencies from gk20a.h. This makes gk20a_platform a Linux platform specific data structure. Add #include for platform_gk20a.h in the source files that still depend on Linux. JIRA NVGPU-16 Change-Id: Ib098accd34a1f5066eb8680c387f9b178169f3f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463547 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Put debugfs dependencies inside #ifdefTerje Bergstrom2017-04-24
| | | | | | | | | | | | | | | | | | | Put all debugfs dependencies inside #ifdef CONFIG_DEBUG_FS. This includes some functions in allocators that were used only for debugging. Remove include of linux/debugfs.h on files that do not deal with debugfs. linux/debugfs.h implicitly included linux/fs.h, which we relied on. Add explicit include of linux/fs.h for all files where this is the case. Change-Id: I16feffae6b0e3a2edf366075cdc01ade86be06f9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1467897 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Use retry timer for short delaysTerje Bergstrom2017-04-21
| | | | | | | | | | | | | CPU timer is inaccurate for short delays, and can produce false timeouts. Bug 1903521 Change-Id: I688b5a59489b62cbd59e418d641fd188ecd3b7e0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1467002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add abstraction for firmware loadingTerje Bergstrom2017-04-19
| | | | | | | | | | | | | | Add nvgpu_firmware data structure, and return it instead of Linux struct firmare from nvgpu_request_firmware. Also add abstraction for releasing firmware: nvgpu_release_firmware. JIRA NVGPU-16 Change-Id: I6dae8262957c0d4506f710289e3a43a6c1729fc7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463538 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: missing power sensor detectionThomas Fleury2017-04-18
| | | | | | | | | | | | | | | | | Monitoring INA3221 is currently missing on some customer designs. Use PCI vendor/device ids and VBIOS version to identify such device, and set power_sensor_missing flag. This flag is subsequently used to skip power device and power policy programming in PMU. Bug 1903258 Change-Id: Ia6b5ce563b5cc3593e138635639025b830e4535e Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1460936 (cherry picked from commit 42f236c210931d28d2699858bb0663b91cf11046) Reviewed-on: http://git-master/r/1463104 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gm206: Use new delay APIsTerje Bergstrom2017-04-13
| | | | | | | | | | | | | | | Use platform agnostic delay functions instead of Linux kernel APIs. This allows removing dependency to Linux header linux/delay.h. At the same time remove #include lines for other unused Linux headers. JIRA NVGPU-16 Change-Id: I4099070fecde3f55ee1c99ee1b991e67742e2629 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1460115 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: gm206: Use new error macrosTerje Bergstrom2017-04-07
| | | | | | | | | | | | | | | gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: Ie5b3b7bd25327e8ed595cfc60ede7a013025fdaf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457348 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: Use nvgpu_timeout for all loopsTerje Bergstrom2017-03-27
| | | | | | | | | | | | | | | | | | | | There were still a few remaining loops where we did not use nvgpu_timeout and required Tegra specific functions for detecting if timeout should be skipped. Replace all of them with nvgpu_timeout and remove including chip-id.h where possible. FE power mode timeout loop also used wrong delay value. It always waited for the whole max timeout instead of looping with smaller increments. If SEC2 ACR boot fails to halt, we should not try to check ACR result from mailbox. Add an early return for that case. JIRA NVGPU-16 Change-Id: I9f0984250d7d01785755338e39822e6631dcaa5a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323227
* gpu: nvgpu: Use new kmem API functions (gm206/*)Alex Waterman2017-03-22
| | | | | | | | | | | | | | Use the new kmem API functions in gm206/*. Bug 1799159 Bug 1823380 Change-Id: I7117c3153d266f0ac72978e2b54f6d4921d919e5 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318310 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove almost all gm204/gm206 supportTerje Bergstrom2017-02-17
| | | | | | | | | | | | Remove gm204/gm206 support. It was used only in the interim until Pascal cards were available, and we don't maintain that code anymore. This patch leaves only BIOS code. Change-Id: I215988603d4588ef710bdda6e47449e9235e78ac Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1302224 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Generalize BIOS codeTerje Bergstrom2017-02-17
| | | | | | | | | | | | | | | | | | Most of BIOS parsing code is not specific to any particular GPU. Move most of the code to generic files, and leave only chip specific parts dealing with microcontroller boot into chip specific files. As most of the parsing is generic, they do not need to be called via HALs so remove the HALs and change the calls into direct function calls. All definitions meant to be used outside BIOS code itself are now in <nvgpu/bios.h> Change-Id: Id48e94c74511d6e95645e90e5bba5c12ef8da45d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1302222 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Remove ACR gm204/gm206 supportMahantesh Kumbar2017-02-15
| | | | | | | | | | | | | | | | - Remove ACR gm204/gm206 support as no more support required Maxwell dGPU. -Moved required ACR interface to gp106 from gm206 -Deleted acr_gm206.c/h files & removed its involvement from dependent files. Change-Id: I9cb7ce8f7ef8bb6fcc7515e644ffb11b774389f4 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1304556 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove PMU gm204/gm206 supportMahantesh Kumbar2017-02-15
| | | | | | | | | | | | | | -Created new methods for PMU gp106 whichever dependent on gm206. -Deleted pmu_gm206.c/h files & removed its involvement from dependent files. Change-Id: Ic578da53bff362efb3e142962275227787206233 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1304492 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Organize semaphore_gk20a.[ch]Alex Waterman2017-02-13
| | | | | | | | | | | | | | | | | | | | | | | Move semaphore_gk20a.c drivers/gpu/nvgpu/common/ since the semaphore code is common to all chips. Move the semaphore_gk20a.h header file to drivers/gpu/nvgpu/include/nvgpu and rename it to semaphore.h. Also update all places where the header is inluced to use the new path. This revealed an odd location for the enum gk20a_mem_rw_flag. This should be in the mm headers. As a result many places that did not need anything semaphore related had to include the semaphore header file. Fixing this oddity allowed the semaphore include to be removed from many C files that did not need it. Bug 1799159 Change-Id: Ie017219acf34c4c481747323b9f3ac33e76e064c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284627 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Organize nvgpu_common.[ch]Alex Waterman2017-02-13
| | | | | | | | | | | | | | | | Move nvgpu_common.c to drivers/gpu/nvgpu/common since it is a common C file to all drivers. Similarly move nvgpu_common.h to drivers/gpu/nvgpu/include/nvgpu since this follows the new include guidelines. Bug 1799159 Change-Id: I00ebed289973b27704c2cff073526e36505bf699 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284612 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
* gpu: nvgpu: Add enable/disable shadow ROM HALTerje Bergstrom2017-02-13
| | | | | | | | | Add HAL for enabling and disabling shadow ROM. This removes XVE dependency from bios code. Change-Id: Icafec72dae71669376bbfb97077661b7165badb8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1302223
* drivers: gpu: nvgpu: Use soc/tegra/fuse.h for fuse headerLaxman Dewangan2017-01-19
| | | | | | | | | | | | | | | | The fuse headers are unified and moved all the content of linux/tegra-fuse.h to the soc/tegra/fuse.h to have the single fuse header for Tegra. Use unified fuse header soc/tegra/fuse.h. bug 200260692 Change-Id: Icab3ba5c3dbcd3fa831455c2f336942d356ff5ac Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1287498 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* nvgpu: pmu: Use ops to get PMU queue HEAD/TAIL.Deepak Goyal2017-01-18
| | | | | | | | | | | | | | pmu_queue_head() & pmu_queue_tail() are updated to use gops to include chip specific PMU queue head/tail registers. JIRA GV11B-30 Change-Id: I9c3d6a4601ba2767f9ada95642052044e2b79747 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1283266 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: HAL to query LPWR feature supportMahantesh Kumbar2017-01-16
| | | | | | | | | | | | | | | HAL to query LPWR feautre's RPPG/MSCG support based on current pstate configured. JIRA DNVGPU-71 Change-Id: I58a34c6dca68e3eb76e222bd781578bf682eac34 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1283916 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Move gm206 HW headersAlex Waterman2017-01-11
| | | | | | | | | | | | | | | | | | | | Move the gm206 HW headers to a new directory specially for them: include/nvgpu/hw/gm206 And change the code to include like so: #include <nvgpu/hw/gm206/hw_fb_gm206.h> This is part of the process to restructure the nvgpu driver. Bug 1799159 Change-Id: I90dc39e64e1b58ee9e87fbc26ad0d18c361e239c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1244792 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Release VBIOS firmware if alloc failsTerje Bergstrom2017-01-04
| | | | | | | | | | | | | | We first load VBIOS firmware from file, and then attempt to allocate space into which we copy the data. If allocation fails, we do not release the firmware. Add a release_firmware() in the error path. Change-Id: Iaa995e93bf8d5a23e08c5e332f70b203ac2e09db Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1275740 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
* gpu: nvgpu: MSCG supportMahantesh Kumbar2016-12-26
| | | | | | | | | | | | | | | | | | | | | | | | | - Added enable_mscg, mscg_enabled & mscg_stat flags, mscg_enabled flag can be used to controll mscg enable/disable at runtime along with mscg_stat flag. - Added defines & interface to support ms/mclk-change/post-init-param - Added defines for lpwr tables read from vbios. - HAL to support post init param which is require to setup clockgating interface in PMU & interfaces used during mscg state machine. - gk20a_pmu_pg_global_enable() can be called when pg support required to enable/disable, this also checks & wait if pstate switch is in progress till it complets - pg_mutex to protect PG-RPPG/MSCG enable/disable JIRA DNVGPU-71 Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1247554 (cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a) Reviewed-on: http://git-master/r/1270971 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: PG engines init/allow/disallow updateMahantesh Kumbar2016-12-20
| | | | | | | | | | | | | | | | | | | | | | | - pmu_init_powergating loops & init multiple PG engines based on PG engines supported - generalize pg init param HAL to support multiple PG-engine init based on PG engine parameter - HAL's to return supported PG engines on chip & its sub features of engine. - Send Allow/Disallow for PG engines which are enabled & supported. - Added defines for pg engines JIRA DNVGPU-71 Change-Id: I236601e092e519a269fcb17c7d1c523a4b51405f Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1247409 (cherry-picked from commit 1c138cc475bac7d3c3fbbd5fb18cfcb2e7fdf67a) Reviewed-on: http://git-master/r/1269319 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Wait for full UDE completionTerje Bergstrom2016-12-05
| | | | | | | | | | | | | | | | | devinit signals completion even before the full UDE script has been executed. Wait for both devinit complete & PMU halt to make sure UDE is fully completed. Bug 200244445 Change-Id: Iaec27d9fc312f282a778aabbbe8b75d85e7a0a87 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1242253 (cherry picked from commit a013029e48fcc83f670bfd0e82da035fa41d6030) (cherry picked from commit e742842eb4fbcefdc5bb88b2f7b3055a1a60652b) Reviewed-on: http://git-master/r/1263293 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: FBPA broadcast supporttk2016-11-17
| | | | | | | | | | | | | | | | Add FBPA broadcast support to hwpm regops Bug 200249125 Change-Id: Iaf413a162a8985bcce94ff96ec6318e129609c4c Signed-off-by: Tejaswi K <tk@nvidia.com> Reviewed-on: http://git-master/r/1247408 (cherry picked from commit 4e0a805f5a8762d1a90f3b5dd76902a04941d9ef) Reviewed-on: http://git-master/r/1252160 Tested-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: use define macros for litter valuesseshendra Gadagottu2016-11-17
| | | | | | | | | | | | | | | | Instead of using enum type for litter values, use define macros. This will fix: 1. Resolve ambiguity associated with enum type size. 2. Litter values can be extended easily in future chips. JIRA GV11B-21 Change-Id: Idca5144ea3754820c67831a716bb0aaf2e375eb2 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1254854 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix signed comparison bugsTerje Bergstrom2016-11-17
| | | | | | | | | | | | Fix small problems related to signed versus unsigned comparisons throughout the driver. Bump up the warning level to prevent such problems from occuring in future. Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252068 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add thermal module supportLakshmanan M2016-11-03
| | | | | | | | | | | | | | | | | The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: I3c1baca3fec2727b6d20aa6c007096372a6a3efe Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240631 (cherry picked from commit 1d6fa9ab49b1c84e7f845de206821d879cbda356) Reviewed-on: http://git-master/r/1246204 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: pmu HAL updateseshendra Gadagottu2016-11-01
| | | | | | | | | | | | | | Update pmu HAL to check for pmu support. pmu initialization will check for pmu support in that platform. JIRA GV11B-21 Change-Id: Ib55be58a1540862b7a91a6162544d10be85b5eb4 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1243911 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: voltage changesMahantesh Kumbar2016-10-30
| | | | | | | | | | | | | | | | - added voltage interface & ctrl defines. JIRA DNVGPU-122 Change-Id: Ia1a4c655c3c5faa638cafcdc75bdfb0e3c3be54f Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1222775 (cherry picked from commit 46ff4d54d3cc02d9f039091f09eea09a5d6c22ce) Reviewed-on: http://git-master/r/1244654 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add pmgr supportLakshmanan M2016-10-27
| | | | | | | | | | | | | | | | | | | | | This CL covers the following implementation, 1) Power Sensor Table parsing. 2) Power Topology Table parsing. 3) Add debugfs interface to get the current power(mW), current(mA) and voltage(uV) information from PMU. 4) Power Policy Table Parsing 5) Implement PMU boardobj interface for pmgr module. 6) Over current protection. JIRA DNVGPU-47 Change-Id: I620f4470aa704f1cc920e03947831440fbb0eb05 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1217176 (cherry picked from commit ed56743c2ac8dc325c75f85a82271d2d5ed8d96a) Reviewed-on: http://git-master/r/1241952 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gm206: fix out of boundary memory accessRichard Zhao2016-10-21
| | | | | | | | | | | | Avoid out of bounds when searching bit header. JIRA VFND-2826 Change-Id: Icbde7c7e04c35c29f316d8a0ad93c76fcb8fae7a Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1240185 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add flag for running preos ucodeTerje Bergstrom2016-10-20
| | | | | | | | | | | | | | | Add per-platform flag run_preos, which indicates whether to run preos ucode or not. Leave it to false for all known boards. Bug 1799537 Bug 1815139 Change-Id: I1818970b0f70f636277443d6de199d3683fc565a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1233410 (cherry picked from commit 8bea05dbfa64af88587edb8927a8ec71c6b0d807) Reviewed-on: http://git-master/r/1239956 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: VBIOS version checkTerje Bergstrom2016-10-20
| | | | | | | | | | | | | | | | | | Add a minimum VBIOS version field for each SKU. This requires the gk20a_platform structure to be per SKU. Also sets power_on back to false if there was any error in booting GPU. Bug 1811880 Change-Id: I23ef312f0db7061b31a3d503ded7e41ef45ad6b3 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1227229 (cherry picked from commit 69c9ab4349ec7526a7f8a2fcad01f9128ed4769c) Reviewed-on: http://git-master/r/1239428 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add support for devinit scripts execDavid Nieto2016-10-20
| | | | | | | | | | | | JIRA DNVGPU-117 Change-Id: I8c79e5b2fcad25588c950e786289443ed64fd48d Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1223221 (cherry-picked from commit f3185ad9f141ab32a224046185d0a409a8a513ff) Reviewed-on: http://git-master/r/1227254 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check engine ctx_status in wait_idleDeepak Nibade2016-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have following bug where GPU Host reports non-idle when it should report engine idle - if a context is preempted off the GPU, and there is no other context to load, NV_PGRAPH_ENGINE_STATUS will not be idle until new context is loaded - this could cause gr_gk20a_wait_idle() to fail since here we rely only on NV_PGRAPH_ENGINE_STATUS to decide if engine is busy or not To fix this, first check if context is valid or not from NV_PFIFO_ENGINE_STATUS_CTX_STATUS If context is invalid, return immediately Otherwise, continue as before Also, add accessors for invalid ctx_status Bug 1826768 Change-Id: Id627be3f02e79f4beac59a8b5195d08eabf651f2 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1237521 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: implement PCIe Gen2 frequency swapAlex Waterman2016-10-18
| | | | | | | | | | | | | | | | Implement the ability to swap between different PCIe bus speeds. This code is called during init in case the GPU is not running at the max supported PCIe bus speed. JIRA DNVGPU-89 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1218178 (cherry picked from commit 8dcd3e10f46f524c9bac9fd5dae0f0a899123c23) Change-Id: I21f96110578a68d5c5e30ae21776cff69aefba5d Reviewed-on: http://git-master/r/1227922 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Retrieve VBIOS version from dGPUTerje Bergstrom2016-10-12
| | | | | | | | | | | | | | Retrieve VBIOS version from biosdata VBIOS structure. Bug 1811880 Change-Id: I24f4114ce7c8925bde4b195888da62454707b8e6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1218062 (cherry picked from commit fb23e9522bc268fcf0d71cc7f2ae9a0bc6cfda23) Reviewed-on: http://git-master/r/1234089 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Suppress error msg from VBIOS overlayTerje Bergstrom2016-10-09
| | | | | | | | | | | | | | | | | | | | Suppress error message when nvgpu tries to load VBIOS overlay, but one is not found. This situation is normal. This is done by moving gk20a_request_firmware() to be nvgpu generic function nvgpu_request_firmware(), and adding a NO_WARN flag to it. Introduce also a NO_SOC flag to suppress attempt to load firmware from SoC specific directory in addition to the chip specific directory. Use it for dGPU firmware files. Bug 200236777 Change-Id: I0294d3308f029a6a6d3c2effa579d5f69a91e418 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1223840 (cherry picked from commit cca44c3f010f15918cdd2259c15170ba1917828a) Reviewed-on: http://git-master/r/1233353 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: VBIOS overlay supportTerje Bergstrom2016-10-07
| | | | | | | | | | | | | | Support loading VBIOS from file system instead of EEPROM. JIRA DNVGPU-134 Change-Id: I4c68dc4ab7c1138e8cf2fa9146de5473274491b4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1211614 (cherry picked from commit d4e35e60ba513e471fe5a85ed570e7ec06c88f06) Reviewed-on: http://git-master/r/1229492 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: update PMU version & paramsMahantesh Kumbar2016-09-30
| | | | | | | | | | | | | | | | | | | - Update PMU version to support r370 - flcn_bl_dmem_desc_v1 params update to support PMU bootloader - PMU_UNIT_CLK value update JIRA DNVGPU-116 Change-Id: Ic4096e4a5ea55ca6b7c72670061e55b4719e0895 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1212834 (cherry picked from commit 32257231733303b0859230719f3857ad2d9d8820) Reviewed-on: http://git-master/r/1227289 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Add dGPU clocks supportVijayakumar Subbu2016-09-29
| | | | | | | | | | | | | JIRA DNVGPU-45 Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1205849 (cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126) Reviewed-on: http://git-master/r/1227256 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add error checks on VBIOS readTerje Bergstrom2016-09-21
| | | | | | | | | | | | | Add error checks to prevent loading a random image as VBIOS. JIRA DNVGPU-134 Change-Id: Ia3efd0ed743b6a7661707612828a795802e96cd9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1211613 (cherry picked from commit ffa2b6df3f11d6c63b1e4337bd7d989932bdfce8) Reviewed-on: http://git-master/r/1223844 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: select target based on apertureDeepak Nibade2016-09-15
| | | | | | | | | | | | | | | | | | | | While programming ucode's inst block in API gr_gk20a_load_falcon_bind_instblk(), use gk20a_aperture_mask() to select target address (i.e. if address is in sysmem or vidmem) based on aperture Also add target accessors for gr_fecs_new_ctx and gr_fecs_arb_ctx_ptr Jira DNVGPU-22 Change-Id: I88198080f188b349a4448a229dff8416a6a18073 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1216139 (cherry picked from commit 42bc14110df17400dd655bc994dc9e61c73048b1) Reviewed-on: http://git-master/r/1219703 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: get bios perf and clk table ptrMahantesh Kumbar2016-09-08
| | | | | | | | | | | | | | Implement support for reading perf and clk tables from VBIOS. JIRA DNVGPU-83 Change-Id: I095fea08479161362e4c2ffa7500ee6a57d6d447 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1202602 (cherry picked from commit fb7c7356f131a198bd655a25fc6ff17067477e1b) Reviewed-on: http://git-master/r/1217299 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: cyclestat snapshot supportPeter Daifuku2016-09-08
| | | | | | | | | | | | | Add support for cyclestats snapshots in the virtual case Bug 1700143 JIRA EVLR-278 Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1211547 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: allocate blob space earlyDeepak Nibade2016-09-01
| | | | | | | | | | | | | | | | | | | | Allocting blob space for pmu might need fixed address allocation in vidmem and during boot up But if some page tables are allocated before blob space, blob space allocation could fail Fix this by allocating blob space early during boot up Jira DNVGPU-20 Change-Id: I30eca1023c8f8f8be101bb7e160ba57a7040911a Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1206402 (cherry picked from commit fad4309ce345ed3879f497bda27f2eceb1084dbb) Reviewed-on: http://git-master/r/1210956 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move dbg_session_ops to gopsPeter Daifuku2016-07-30
| | | | | | | | | | | | | | Move dbg_session_ops to gops for better code consistency JIRA VFND-1905 Change-Id: I04a11d77dd8c26d9922e80e556822f80dd2bc36d Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1192641 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: unset get_phys_addr_bits for dGPUThomas Fleury2016-07-20
| | | | | | | | | | | | | | | Unset get_phys_addr_bits as PCIe devices do not need to care if SMMU is enabled or not. Jira VFND-1965 Change-Id: I358834863fb365092904da219be80d764f6af8ec Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1183089 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 19:22:06 -0400