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path: root/drivers/gpu/nvgpu/gk20a
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* gpu: nvgpu: move linux clk calls to tegra specific fileDeepak Nibade2017-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | clk_gm20b.c has number of calls specific to linux and tegra-soc environment In order to unify the driver, move all of those calls to tegra/linux specific file tegra/linux/clk.c All the clk_*() and tegra_dvfs_*() calls are now abstracted behind GPU's clock operations and shoule be accessed using g->ops.clk.<API> format Remove <linux/clk.h> and <soc/tegra/tegra-dvfs.h> from clk_gm20b.c Remove <linux/version.h> from clk_gm20b.c too since we only support k4.4 and higher version only Jira NVGPU-49 Change-Id: Ib26811e0423bbd3868b9a46e662b80a8ca088dc5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483092 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove TEGRA_CLK_FRAMEWORK supportDeepak Nibade2017-05-24
| | | | | | | | | | | | | | CONFIG_TEGRA_CLK_FRAMEWORK is no longer supported hence remove this config and all the code that is protected with this config Jira NVGPU-49 Change-Id: Ica28019e0c99e95743216e005ba2fba20357b2d5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1483090 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: per-chip GPCCS exception supportDavid Nieto2017-05-24
| | | | | | | | | | | | Adding support for ISR handling of GPCCS exceptions JIRA: GPUT19X-83 Change-Id: Ia5550aac8f368d8915f6c94aa22478cacbb2bddc Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1480992 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_thread in FECS traceTerje Bergstrom2017-05-24
| | | | | | | | | | | | | | | | Use nvgpu_thread for launching the FECS trace periodic poller thread. JIRA NVGPU-14 Change-Id: Idc53d85b96ae72a367dd1447bf18a8207b9886d6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469649 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: add ioctls to get current timesliceThomas Fleury2017-05-24
| | | | | | | | | | | | | | | | | | Add the following ioctls - NVGPU_CHANNEL_IOCTL_GET_TIMESLICE for channel timeslice in us - NVGPU_TSG_IOCTL_GET_TIMESLICE for TSG timeslice in us If timeslice has not been set explicitly, ioctl returns the default timeslice that will be used when programming the runlist entry. Bug 1883271 Change-Id: Ib18fdd836323b1a2d4efceb1e27d07713bd6fca5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1469040 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split vm_area management into vm codeAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | The vm_reserve_va_node struct is essentially a special VM area that can be used for sparse mappings and fixed mappings. The name of this struct is somewhat confusing (as node is typically used for list items). Though this struct is a part of a list it doesn't really make sense to call this a list item since it's much more. Based on that the struct has been renamed to nvgpu_vm_area to capture the actual use of the struct more accurately. This also moves all of the management code of vm areas to a new file devoted solely to vm_area management. Also add a brief overview of the VM architecture. This should help other people follow along the hierachy of ownership and lifetimes in the rather complex MM code. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: If85e1cf868031d0dc265e7bed50b58a2aed2602e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477744 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split VM implementation outAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | This patch begins splitting out the VM implementation from mm_gk20a.c and moves it to common/linux/vm.c and common/mm/vm.c. This split is necessary because the VM code has two portions: first, an interface for the OS specific code to use (i.e userspace mappings), and second, a set of APIs for the driver to use (init, cleanup, etc) which are not OS specific. This is only the beginning of the split - there's still a lot of things that need to be carefully moved around. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I3b57cba245d7daf9e4326a143b9c6217e0f28c96 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477743 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Split VM interface outAlex Waterman2017-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch begins the major rework of the GPU's virtual memory manager (VMM). The VMM is the piece of code that handles the userspace interface to buffers and their mappings into the GMMU. The core data structure is the VM - for now still known as 'struct vm_gk20a'. Each one of these structs represents one addres space to which channels or TSGs may bind themselves to. The VMM splits the interface up into two broad categories. First there's the common, OS independent interfaces; and second there's the OS specific interfaces. OS independent -------------- This is the code that manages the lifetime of VMs, the buffers inside VMs (search, batch mapping) creation, destruction, etc. OS Specific ----------- This handles mapping of buffers represented as they are represented by the OS (dma_buf's for example on Linux). This patch is by no means complete. There's still Linux specific functions scattered in ostensibly OS independent code. This is the first step. A patch that rewrites everything in one go would simply be too big to effectively review. Instead the goal of this change is to simply separate out the basic OS specific and OS agnostic interfaces into their own header files. The next series of patches will start to pull the relevant implementations into OS specific C files and common C files. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I242c7206047b6c769296226d855b7e44d5c4bfa8 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464939 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add GCC exception handling supportLakshmanan M2017-05-19
| | | | | | | | | | | | Add support for per-chip handling of GCC exception. JIRA GPUT19X-86 Change-Id: I76ea588dc76b5c821ae5b53529db6dd64b3a856a Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1485836 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: check commit_inst err codesKonsta Holtta2017-05-19
| | | | | | | | | | | gr_gk20a_init_golden_ctx_image() didn't check for error codes from gr.commit_inst(). Add the missing checks. Change-Id: I9f8449b2741c5a69cf65ad8191e9bc74c6ad1393 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1483867 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Scrub gk20a_platform dependenciesTerje Bergstrom2017-05-18
| | | | | | | | | | | | | | Remove gk20a_platform dependencies from gk20a.h. This makes gk20a_platform a Linux platform specific data structure. Add #include for platform_gk20a.h in the source files that still depend on Linux. JIRA NVGPU-16 Change-Id: Ib098accd34a1f5066eb8680c387f9b178169f3f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463547 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add gr_t19x support for gv11b ECCLakshmanan M2017-05-18
| | | | | | | | | | | | | | | | | | | | | | This CL covers the following modification, 1) Added gr_t19x support for gv11b ECC 2) Modified the gp10b platform config for gv11b sysfs support JIRA GPUT19X-85 JIRA GPUT19X-104 JIRA GPUT19X-100 JIRA GPUT19X-103 Bug 1825948 Bug 1825962 Bug 1775457 Change-Id: I0bf13f80a73cc2184147230d098e89a517554c01 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1478952 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add poweron voltage to clock structureAlex Frid2017-05-17
| | | | | | | | | | | | | | | | Added GPCPLL poweron voltage field to GPU clock structure. Initialized it differently for GPCPLL revisions B1 and C1. Bug 1924194 Change-Id: Ide7a08445afd3ab9aea21f75871b750f45c02c99 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/1481263 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Remove uses of platform->can_elpgTerje Bergstrom2017-05-17
| | | | | | | | | | | Remove newly introduced uses of gk20a_platform->can_elpg. Rename the field to can_elpg_init and replace all uses with gk20a->can_elpg. Change-Id: Id6e84d4c16159b5da80c583a8a94a9c5cc2423ec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1480955 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add czf_bypass sysfs node for gp10bPeter Boonstoppel2017-05-17
| | | | | | | | | | | | | | | | | | | | | | | | | This change adds a new sysfs node to allow configuring CZF_BYPASS, to enable platforms with low context-switching latency requirements. /sys/devices/17000000.gp10b/czf_bypass Values: 0 - always 1 - lateZ (default) 2 - single pass 3 - never The specified value will apply only to newly allocated contexts. Bug 1914014 Change-Id: Ibb9a8e86089acaadaa7260b00eedec5c80762d6f Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/1478567 (cherry picked from commit 3bc022cb385b53f698b04f218db535e8162e8c94) Reviewed-on: http://git-master/r/1473820 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gk20a: fix sparse warningsSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | Make functions as static to fix sparse warnings: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:93:32: warning: symbol 'gk20a_fecs_trace_get_record' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:478:29: warning: symbol 'gk20a_fecs_trace_debugfs_ring_seq_ops' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c:511:30: warning: symbol 'gk20a_fecs_trace_debugfs_ring_fops' was not declared. Should it be static? Bug 200299572 Change-Id: I62695f9711bcee1bf7d5831e42989ea4da169e42 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482942 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: mm_gk20a: fix sparse warningSachin Nikam2017-05-17
| | | | | | | | | | | | | | | Make function as static to fix below sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/mm_gk20a.c:3351:22: warning: symbol '__get_pte_size_split_addr' was not declared. Should it be static? Bug 200299572 Change-Id: I46b8608e3a520748e33b00fede2ce28d842899af Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482918 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove dead function gk20a_gmmu_unmapSachin Nikam2017-05-17
| | | | | | | | | | | | | | | | | | | | While fixing sparse warning: - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/mm_gk20a.c:2586:6: warning: symbol 'gk20a_gmmu_unmap' was not declared. Should it be static? when gk20a_gmmu_unmap() is made static compiler complained that it is not used. Hence removing the unused function. Bug 200299572 Change-Id: I9dcfb504d7f0f9b4d53eba59ecf53d05d5da0dbd Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1482907 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Use nvgpu_cond in semaphore wqTerje Bergstrom2017-05-16
| | | | | | | | | | | | | Change semaphore wait queue to use nvgpu_cond instead of Linux wait queue. JIRA NVGPU-14 Change-Id: I3be5097ded168300b4480e986218d9f4fd6104b1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469852 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Don't reject unusual ZBC colorsLauri Peltonen2017-05-16
| | | | | | | | | | | | | | For some use cases, we need to program two ZBC slots with the same DS color value but different FB color value. Remove the check that would reject such unorthodox ZBC entries. Bug 1847208 Change-Id: Ibed2c8195516832789470f7f1a8c865568694c28 Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Reviewed-on: http://git-master/r/1477611 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_cond in channel workerTerje Bergstrom2017-05-16
| | | | | | | | | | | | | Change the channel worker to use nvgpu_cond instead of Linux wait queue. JIRA NVGPU-14 Change-Id: Iac856dca2acfa80065f5d2fd542cd2a6278333a4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469850 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Lakshmanan M <lm@nvidia.com>
* nvgpu: fix static sparse warningsSachin Nikam2017-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed below static sparse warnings by making either function as static or including right header. - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/common/linux/module.c:816:5: warning: symbol 'gk20a_pm_init' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:28:6: warning: symbol 'gk20a_bus_init_hw' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:54:6: warning: symbol 'gk20a_bus_isr' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:90:5: warning: symbol 'gk20a_read_ptimer' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:147:6: warning: symbol 'gk20a_init_bus' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c:232:6: warning: symbol 'gk20a_init_ltc' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fb_gk20a.c:75:6: warning: symbol 'gk20a_fb_debug_mode_enabled' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/hal_gm20b.c:184:5: warning: symbol 'gm20b_init_hal' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/fb_gm20b.c:165:5: warning: symbol 'gm20b_fb_vpr_info_fetch' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:103:5: warning: symbol 'gm20b_ltc_cbc_ctrl' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:168:6: warning: symbol 'gm20b_ltc_init_fs_state' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:195:6: warning: symbol 'gm20b_ltc_isr' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:221:5: warning: symbol 'gm20b_ltc_cbc_fix_config' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:236:6: warning: symbol 'gm20b_flush_ltc' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:350:6: warning: symbol 'gm20b_init_ltc' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/tegra/linux/clk.c:72:6: warning: symbol 'nvgpu_linux_init_clk_support' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c:206:6: warning: symbol 'gp10b_init_ltc' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/fb_gp10b.c:98:6: warning: symbol 'gp10b_init_fb' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/hal_gp10b.c:190:5: warning: symbol 'gp10b_init_hal' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c:79:6: warning: symbol 'gp10b_init_priv_ring' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp106/hal_gp106.c:222:5: warning: symbol 'gp106_init_hal' was not declared. Should it be static? - $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp106/fb_gp106.c:42:6: warning: symbol 'gp106_init_fb' was not declared. Should it be static? Bug 200299572 Change-Id: I32f9a3cb65314bd1eb1a6d93cda5796cfa64d738 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/1481804 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move can_railgate & railgate_delay to gk20aTerje Bergstrom2017-05-14
| | | | | | | | | | | | | Copy can_railgate and railgate_delay to struct gk20a at probe time, and access them from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: I63d4f4aff7eb17a167775fd7982a1b548bbca3a5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463543 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_cond for channel refcountTerje Bergstrom2017-05-12
| | | | | | | | | | | | | | | Use nvgpu_cond for waiting for all channel accesses to finalize before closing a channel, and for signalling for the same event. JIRA NVGPU-14 Change-Id: Ifac14ad9afe5c44d4443b4a4a94a4d0ad2ea7053 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1469764 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Remove TCF & gk20a clock supportTerje Bergstrom2017-05-12
| | | | | | | | | | | | Remove support for legacy Tegra Clock Framework. gk20a clocks were implemented only for TCF, so delete that at the same time, too. Change-Id: Ia46254f5113aa3ec392bf38b33d288a55b2fb475 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1480213 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Introduce priv ring HAL and define ISRTerje Bergstrom2017-05-12
| | | | | | | | | | | | | | | Introduce a priv ring HAL and define ISR as the only function in it. Introduce a gp10b version of the ISR that writes error message to UART for every priv ring error, and leave the old chips with silent error handling. Bug 1846641 Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473696 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: pmu: add check before enabling elpg.Deepak Goyal2017-05-12
| | | | | | | | | | | | Do not enable/disable elpg if platform->can_elpg is false. Bug 1870556 Change-Id: I82d1fc4efdccc518827a6150fd3c17f6112e2f4a Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1465816 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: change debugfs to use g->ch_wdt_timeout_msRichard Zhao2017-05-11
| | | | | | | | | | | | Since ch_wdt_timeout_ms was moved to gk20a, set debugfs accordingly. Jira VFND-3796 Change-Id: Id0c69bf5c15fc4efe672348273b24f23fb52aa29 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1478679 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move secure_alloc to struct gk20aTerje Bergstrom2017-05-11
| | | | | | | | | | | | | | | | | | Move the function pointer for VPR page allocation to struct gk20a and use it from there. At the same time remove secure_page_alloc pointer and add a direct call to it in probe. Move platform_tegra.h as tegra/linux/platform_gk20a_tegra.h, as it's only declaring functions defined in platform_gk20a_tegra.c to other files in the same directory. JIRA NVGPU-16 Change-Id: I19ac9ee0b2f6734203ae32a1f51d67fd51aced9f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473706 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Separate GMMU out of mm_gk20a.cAlex Waterman2017-05-11
| | | | | | | | | | | | | | | Begin moving (and renaming) the GMMU code into common/mm/gmmu.c. This block of code will be responsible for handling the platform/OS independent GMMU operations. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: Ide761bab75e5d84be3dcb977c4842ae4b3a7c1b3 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464083 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: changes related to preemptionseshendra Gadagottu2017-05-10
| | | | | | | | | | | | | | Added function pointers to check chip specific valid gfx class and compute class. Also added function pointer to update ctx header with preemption buffer pointers. Bug 200292090 Change-Id: I8119ee082e2abb67186a8ac07088f8db7f410ba1 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1293502 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gp10b: create t18x debugfs nodesseshendra Gadagottu2017-05-10
| | | | | | | | | | | | | | | | Modifed code to create debugfs nodes correctly by moving relevant code from gp10b_tegra_probe() to gk20a_debug_init(). Bug 200292090 Change-Id: Ib5d0a57d8b600cd30dc2a37794d8208b5c57ccfa Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1476484 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix error for static code analysisVijayakumar2017-05-05
| | | | | | | | | | | | | | | | mark functions local to the file as static fixing errors in volt and flcn modules. Bug 200299572 Change-Id: Ibacbd83649fee3066a90694a3df90bb909b24aa5 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1475357 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: expose deterministic submit supportKonsta Holtta2017-05-05
| | | | | | | | | | | | | | | | | | | | | | | | | Add these bits in the gpu characteristics flags: NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING - fast submits with no in-kernel job tracking are supported. NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_FULL - deterministic submits also with job tracking and num_inflight_jobs set are supported. Either of these may get disabled if the particular channel or submit still requires features that block these. Make gk20a_channel_sync_needs_sync_framework() take a gk20a pointer instead of a channel pointer so that it can be called without a channel. It does not need any per-channel data. Bug 200291300 Change-Id: I5f82510b6d39b53bcf6f1006dd83bdd9053963a0 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1456845 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add flag gk20a->is_virtualTerje Bergstrom2017-05-04
| | | | | | | | | | | | | Instead of calling gk20a_gpu_is_virtual() which requires struct device pointer fill in flag gk20a->is_virtual and use that. JIRA NVGPU-16 Change-Id: I24382c041ee69940c703ca1ea7f5c667c5731cd1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473707 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_thread for channel workerTerje Bergstrom2017-05-04
| | | | | | | | | | | | Use nvgpu_thread for channel worker. JIRA NVGPU-14 Change-Id: Idcb93d3096de06a1569dc3ea69890745b5805d67 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1472870 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
* gpu: nvgpu: zcull settings during golden ctx loadseshendra Gadagottu2017-05-03
| | | | | | | | | | | | Don't configure zcull setting during golden context loading. Zcull setting will be configured through explicit API. Change-Id: I648aea8a8db9132fc81d61dbbff46edf7bfca6d7 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1474021 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Access ptimer_src_freq from struct gk20aTerje Bergstrom2017-05-03
| | | | | | | | | | | | | Fix the last place where ptimer_src_freq is accessed directly from platform structure. JIRA NVGPU-16 Change-Id: I41b924779e1e639bf585cd96cb8c11de6eeb18bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473704 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Program CE clock gating list after resetTerje Bergstrom2017-05-03
| | | | | | | | | | | | | | | Clock gating list for CE was programmed at GR init, but at that time CE has not yet been brought out of reset. This causes a priv ring error and the clock gating setting does not take place. Move programming of CE clock gating list to CE initialization. Bug 1846641 Change-Id: Ibc9fe2487408358304f80cd679d3b1ecac7cebe8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473301 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move ch_wdt_timeout to gk20aTerje Bergstrom2017-05-03
| | | | | | | | | | | | | Copy watchdog timeout from platform structure to gk20a and use it from gk20a. JIRA NVGPU-16 Change-Id: Iab70253a7f0e1d28f2e3209285b3f4c476ce9279 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473705 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix KASAN slab-out-of-bounds errorDavid Pu2017-05-03
| | | | | | | | | | | | | | | | | | | | | | | KASAN reports below slab-out-of-bounds error when accessing gr->map_tiles since gr->map_tiles is allocated with wrong(small) size. fixing it by passing correct size to nvgpu_kzalloc. BUG: KASAN: slab-out-of-bounds in gr_gk20a_init_map_tiles+0x6f0/0x7b0 ... .... BUG: KASAN: slab-out-of-bounds in gr_gk20a_zcull_init_hw+0x184/0x848 ... ... BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ... ... BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ... Bug 1918671 Change-Id: I667ac80b20a3d8539ed3eaae6e0f98e91f917819 Signed-off-by: David Pu <dpu@nvidia.com> Reviewed-on: http://git-master/r/1472491 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: init interface layer support for PMU falconMahantesh Kumbar2017-05-03
| | | | | | | | | Change-Id: I210267265fa38777115d5b49cc8f78f2599e3f9e Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1469458 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: falcon controller HAL initMahantesh Kumbar2017-05-03
| | | | | | | | | | | | | - Assign base address for falcon based on falcon id. - Init mutex for falcon - Init ops with NULL Change-Id: I9efee5c2b15106c7dfc6e55c996f62c7f7b85fc2 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1468452 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: interface layer for falconMahantesh Kumbar2017-05-03
| | | | | | | | | | | | | | | | - struct nvgpu_falcon to hold properties of falcon controller - falcon controller interface layer which establish access to required falcon controller HAL based on struct nvgpu_falcon member flcn_id & flcn_base parameter. - each falcon nvgpu_falcon struct initialized during init with id, base-address along with other properties at HAL. - Added defines related to flacon controller. Change-Id: Ia7777c01ecc542150ddd72f8603b7b4475522b58 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1467523 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove gk20a_reset_priv_ringSeema Khowala2017-05-02
| | | | | | | | | | | | | gk20a_reset_priv_ring does not help resetting priv ring. Chip reset is the only way to recover. Bug 200300756 Change-Id: Ia913d46b0e71cd42e9ce242b2393c50f4d12e002 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1471445 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: include hal.h from hal.cKonsta Holtta2017-05-02
| | | | | | | | | | | | | | | Bring the declarations visible to where they're defined. Bug 200299572 Change-Id: I6261433a754ae20fed4dd7fcde15a4bbaacc2249 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1471353 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: Add new flag support_pmu to gk20aTerje Bergstrom2017-05-02
| | | | | | | | | | | | | | Add new flag support_pmu to struct gk20a at probe time, and access it from gk20a instead of support_gk20a_pmu() which depends on struct device *. JIRA NVGPU-16 Change-Id: I721f1a532e949c98346086abdc2630a8df6eba7b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463546 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "gpu: nvgpu: Dump error on priv ring intr"Terje Bergstrom2017-05-01
| | | | | | | | | | | | This reverts commit 69d7652aaa9cf94873cccae13c7b6f6a4eb224af. Bug 1918711 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Change-Id: Ie28c668729c4956f18e6fa3c820f476d2e4424a4 Reviewed-on: http://git-master/r/1473044 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
* gpu: nvgpu: fix K4.9 sparse messagesDavid Nieto2017-04-28
| | | | | | | | | | | | | | | | | Fix issues related with wrong storage type for 64 bit variables. (1) Fixed width of HZ_TO_MHZ constant (2) changed fence_wait timeout to store unsigned long bug 200299572 Change-Id: Ie8f2386b738f3aafce75fc2440947e36befac273 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1471611 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Dump error on priv ring intrTerje Bergstrom2017-04-28
| | | | | | | | | | | | | Write an error to UART on priv ring error. This uncovers any accesses to missing registers or illegal accesses to registers. Bug 1846641 Change-Id: Ic1e5ecadcd95777f2b3f7bd77accf98ddce97282 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1294683 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-16 19:54:33 -0400