summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a
Commit message (Collapse)AuthorAge
* gpu: nvgpu: Move programming of host registers to fifoTerje Bergstrom2017-03-28
| | | | | | | | | | | | | | | | | | | Move code that touches host registers and instance block to fifo HAL. This involves adding HAL ops for the fifo HAL functions that get called from outside fifo. This clears responsibility of channel by leaving it only managing channels in software and push buffers. channel had member ramfc defined, but it was not used, to remove it. pbdma_acquire_val consisted both of channel logic and hardware programming. The channel logic was moved to the caller and only hardware programming was moved. Change-Id: Id005787f6cc91276b767e8e86325caf966913de9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1322423 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove unnecessary use of dev_name()Terje Bergstrom2017-03-28
| | | | | | | | | | | | | | | Move the name field from struct gpu_ops up to struct gk20a. The field is not a function op, so it doesn't belong in gpu_ops. Replace all uses of dev_name() with use of g->name when possible. JIRA NVGPU-16 Change-Id: Ic6e99e39258cbf3bb7c806962cbbd7de5126688f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1328534 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: avoid false job timeout messageKonsta Holtta2017-03-28
| | | | | | | | | | | | | | | | | | The nvgpu timer API prints a message when the timer expires, but expiration of that does not necessarily mean here that the job has actually timed out, which is tested by comparing gp_get. Change the expiration check to just peek instead of the default which prints to log on expiration. Bug 1887569 Jira NVGPU-21 Change-Id: Ifde34cff701eaed2f3ea727dba3ec8affeef26b9 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1329731 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add and reorg reset_enable_hw fifo opsSeema Khowala2017-03-28
| | | | | | | | | | | | | | | | fifo reset_enable_hw is reorged to clear and enable pbdma/fifo interrupts after all the required configuration such as configuring timeouts, enabling timeout detections are taken care of. JIRA GPUT19X-74 JIRA GPUT19X-47 Change-Id: Id780cc11d858db18f8d748c037954ede73298506 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1325351 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add NO_KERNEL_MAPPING for alloc_map_vidKonsta Holtta2017-03-27
| | | | | | | | | | | | | | | | | | Commit 8f3875393e7a6bd0fc03afdb1fa99b7e33b71576 ("abstract away dma alloc attrs") added an implicit NVGPU_DMA_NO_KERNEL_MAPPING for the function that allocates vidmem buffers, but the functions gk20a_gmmu_alloc_map_vid and gk20a_gmmu_alloc_map got overlooked and use no flags which now triggers a warning. Make those cases alloc the vidmem buffer with the no kernel mapping flag as it should have been, because kernel mappings of vidmem are not supported. Bug 1853519 Change-Id: I9f29c9d310f97c9bd5f279674decf61efb3e75ea Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1328953 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use nvgpu_timeout for all loopsTerje Bergstrom2017-03-27
| | | | | | | | | | | | | | | | | | | | There were still a few remaining loops where we did not use nvgpu_timeout and required Tegra specific functions for detecting if timeout should be skipped. Replace all of them with nvgpu_timeout and remove including chip-id.h where possible. FE power mode timeout loop also used wrong delay value. It always waited for the whole max timeout instead of looping with smaller increments. If SEC2 ACR boot fails to halt, we should not try to check ACR result from mailbox. Add an early return for that case. JIRA NVGPU-16 Change-Id: I9f0984250d7d01785755338e39822e6631dcaa5a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323227
* gpu: nvgpu: delete unused #includes missing in 4.9Konsta Holtta2017-03-27
| | | | | | | | | | | | | Drop old unnecessary references to clock and edp. These headers are not in kernel-4.9 (yet?). Add proper #ifdefs for #including soctherm. Bug 1853519 Change-Id: I28e829f78df356e5efcffd9bd985fd736e76d2c0 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1327659 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add INA3221 I2C info in platform dataThomas Fleury2017-03-27
| | | | | | | | | | | | Add I2C device index and address for INA3221 in platform data. Jira EVLR-1048 Change-Id: I3791f24bd6d8ab99483ea0103313b2b671dfb445 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1327047 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove MC accesses from gk20a.cTerje Bergstrom2017-03-26
| | | | | | | | | | | | | | | Clean up gk20a.c by removing direct accesses to MC and moving the accesses to happen via MC HAL. The chip detection logic has to violate the HAL and call gk20a version directly, because HAL ops cannot be set up before chip has been identified. Change-Id: I4cdd0ef3fcf7d3b561a3fca4247a8356fe8d18e1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321576 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: refactor teardown to support unbindDavid Nieto2017-03-25
| | | | | | | | | | | | | | | | | | | | | | | | This change refactors the teardown in remove to ensure that it is possible to unload the driver while leaving fds open. This is achieved by making sure that the SW state is kept alive till all fds are closed and by checking that subsequent calls to ioctls after the teardown fail. Normally, this would be achieved ny calls into gk20a_busy(), but in kickoff we dont call into that to reduce latency, so we need to check the driver status directly, and also in some of the functions as we need to make sure the ioctl does not dereference the device or platform struct bug 200277762 JIRA: EVLR-1023 Change-Id: I163e47a08c29d4d5b3ab79f0eb531ef234f40bde Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1320219 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: Enable CE alwaysTerje Bergstrom2017-03-24
| | | | | | | | | | | | | All GPUs have a copy engine. So delete the flag has_ce, because it's always true. JIRA NVGPU-16 Change-Id: I89db74c7cf66b24db84301b79832862ef28100b9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1325355 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: profiler reservation supportPeter Daifuku2017-03-24
| | | | | | | | | | | | | | | | | | | | | | | Support for hwpm reservations in the virtual case: - Add session ops for checking and setting global and context reservations, and releasing reservations - in the native case, these just update reservation counts and flags - in the vgpu case, when the reservation count is 0, check with the RM server that a reservation is possible: for global reservations, no other guest can have a reservation; for context reservations, no other guest can have a global reservation - in the vgpu case, when the reservation count is decremented to 0, notify the RM server that the guest no longer has any reservations Bug 1775465 JIRA VFND-3428 Change-Id: Idf115b730e465e35d0745c96a8f8ab6b645c7cae Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1323375 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Update PMU version.Deepak Goyal2017-03-24
| | | | | | | | | | | JIRA GPUT19X-30 Change-Id: I1153cea6389fbf18a3cd43ab13a2d5de4083cc42 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1302672 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: pass gk20a struct to gk20a_busyDavid Nieto2017-03-24
| | | | | | | | | | | | | | | | | After driver remove, the device structure passed in gk20a_busy can be invalid. To solve this the prototype of the function is modified to pass the gk20a struct instead of the device pointer. bug 200277762 JIRA: EVLR-1023 Change-Id: I08eb74bd3578834d45115098ed9936ebbb436fdf Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1320194 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: remove duplicated busy in debuggerDavid Nieto2017-03-24
| | | | | | | | | | | | | | | | | | | On the past, we had separate calls for platform and channel busy, but those got removed. The result is that in the debugger code we have essentially a double busy call int the powergating enable/disable. This change removes it bug 200277762 JIRA: EVLR-1023 Change-Id: Iba70b81700f27b847e1d0222fb69ed1a7a883342 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1323220 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: fix running condition on fifo isrDavid Nieto2017-03-23
| | | | | | | | | | | | | | | | The fifo interrupt path was reading the PBDMA interrupt status after clearing interrupts and this could lead to a situation in which the host may have advanced to another channel, leading to the recovery code resetting the wrong channel. Bug 200278729 JIRA: EVLR-1036 Change-Id: I392423d1eaa8d23acf88454bf113c015e649e13d Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1326461 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: *ERROR_MMU_ERR_FLT* not set for fake mmu faultsSeema Khowala2017-03-23
| | | | | | | | | | | | | For fake faults, errror notifiers are expected to be set before triggering fake mmu fault. JIRA GPUT19X-7 Change-Id: I458af8d95c5960f20693b6923e1990fe3aa59857 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1323413 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add function to enable/disable runlists schedSeema Khowala2017-03-23
| | | | | | | | | | | | | | | -gk20a_fifo_set_runlist_state() can be used to enable/disable runlists scheduler. This change would be needed for t19x fifo recovery too -Also delete gk20a_fifo_disable_all_engine_activity function as it is not used anywhere. JIRA GPUT19X-7 Change-Id: I6bb9a7574a473327f0e47060f32d52cd90551c6d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1315180 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gr faults: do not depend on fake mmu fault notifierSeema Khowala2017-03-23
| | | | | | | | | | | | | | | | | | | | Currently NVGPU_CHANNEL_FIFO_ERROR_MMU_ERR_FLT is being set in error notifier for non mmu fault too. For fake mmu faults i.e. trigger mmu fault cases, make sure proper notifiers are set and driver is not depending on sending mmu error fault notifier. This change is needed for t19x fifo recovery too. NVGPU_CHANNEL_GR_ERROR_SW_METHOD (12), NVGPU_CHANNEL_GR_EXCEPTION(13) and NVGPU_CHANNEL_FECS_ERR_UNIMP_FIRMWARE_METHOD (37) are new error notifiers. JIRA GPUT19X-7 Change-Id: Idee83e842c835bdba9eb18578aad0c372ea74c5d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1310563 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add init_pbdma_intr_desc fifo opsSeema Khowala2017-03-23
| | | | | | | | | | | | | | | | | | | | | | Init device_fatal, channel_fatal and restartable fifo intr pbdma s/w variables for pbdma_intr_0 interrupt masks for each GPU version separately pbdma_intr_0 field differences for each GPU version:- -gk20a : bit 28 does not exists in hw -gm20b : bit 8(lbreq), 20(xbarconnect) and 28 do not exist in hw -gp10b : bit 8(lbreq), 20(xbarconnect) do not exist in hw. bit 28, (syncpoint_illegal) added in hw but is not being handled. -gk20a/gm20b/gp10b bit 24 eng_reset and bit 25 semaphore always existed in hw but never handled JIRA GPUT19X-47 Change-Id: I209191f57c5ea5b15081b7dc2411801d3537017c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1325402 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add bus HALTerje Bergstrom2017-03-23
| | | | | | | | | | | Add bus HAL and move all bus related hardware sequencing to that file: BAR1 binding, timer access, and interrupt handling. Change-Id: Ibc5f5797dc338de10749b446a7bdbcae600fecb4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323353 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: split nvhost dependency on plat interfaceKonsta Holtta2017-03-23
| | | | | | | | | | | | | | | | | | Add CONFIG_TEGRA_GK20A_NVHOST and remove the TEGRA_GRHOST || TEGRA_HOST1X dependency in CONFIG_TEGRA_GK20A to allow using the iGPU without the nvhost driver. Use the new config to guard syncpt-related code. Also make TEGRA_ACR depend on GK20A too so that it aligns properly under gk20a in menuconfig. Bug 1853519 Change-Id: I9e9b0a7915d000aae7930821627b7a01d08d3f5c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321303 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: take power refcount in gk20a_cde_convert()Deepak Nibade2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a gk20a_busy() call in gk20a_buffer_convert_gpu_to_cde() and we again call gk20a_busy() in gk20a_submit_channel_gpfifo() If gk20a_do_idle() is triggered in between these two calls, then this leads to a deadlock and results in idle failure Hence to avoid this take power refcount in a more fine-grained way i.e. in gk20a_cde_convert() instead of taking in gk20a_buffer_convert_gpu_to_cde() Keep gk20a_cde_execute_buffer() out of the gk20a_busy()/ gk20a_idle() pair since we take power refcount in submit path anyways Add correct error handling path in gk20a_cde_convert() Bug 200287073 Change-Id: Iffea2d4c03f42b47dbf05e7fe8fe2994f9c6b37c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1324329 (cherry picked from commit ce057d784d40a6ce57e892d58e211ed2fd9826f8) Reviewed-on: http://git-master/r/1320408 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: hold mutex to get cde context onlyDeepak Nibade2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | In gk20a_cde_convert(), we hold cde_app.mutex almost for everything which is unnecessary Also, this causes a deadlock scenario when gk20a_do_idle() is called In some cases it is possible that Thread 1 holds the lock and is trying to power on GPU, and Thread 2 is trying to power off GPU and then grab cde_app.mutex to cleanup GPU state To fix this, grab the mutex only for gk20a_cde_get_context() and then release it Bug 200287073 Change-Id: Ic4856604652d0d4024abdeb5c2f8f03910c601a5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1324328 (cherry picked from commit 3c8eef0d0e9ef3307e2792e3e127c10f3ff118a7) Reviewed-on: http://git-master/r/1322030 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: profiler create/free, hwpm reservePeter Daifuku2017-03-22
| | | | | | | | | | | | | | Add support for creating/freeing profiler objects, hwpm reservations Bug 1775465 JIRA EVLR-680 JIRA EVLR-682 Change-Id: I4db83d00e4b0b552b05b9aae96dc553dd1257d88 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1294401 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use new kmem API functions (channel)Alex Waterman2017-03-22
| | | | | | | | | | | | | | | | | | | Use the new kmem API functions in the channel and channel related code. Also delete the usage of kasprintf() since that must be paired with a kfree(). Since the kasprintf() doesn't use the nvgpu kmem machinery (and is Linux specific) instead use a small buffer statically allocated on the stack. Bug 1799159 Bug 1823380 Change-Id: Ied0183f57372632264e55608f56539861cc0f24f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1318312 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add mm ops for mmu_fault_pendingSeema Khowala2017-03-22
| | | | | | | | | | This change is needed for t19x mmu fault handling. Change-Id: I7f9190ab305f699401f6b0033b6a93dd8b4fc3cd Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1315201 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use dma-attr wrappers for K4.9 compatibilityKonsta Holtta2017-03-21
| | | | | | | | | | | | | | | | On kernel 4.9, the DMA API has changed, so use the NVIDIA compatibility wrappers from dma-attrs.h to allow the code to build for both 4.4 and 4.9. Bug 1853519 Change-Id: I0196936e81c7f72b41b38a67f42af0dc0b5518df Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321102 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: abstract away dma alloc attrsKonsta Holtta2017-03-21
| | | | | | | | | | | | | | | | | | | | | | | | Don't use enum dma_attr in the gk20a_gmmu_alloc_attr* functions, but define nvgpu-internal flags for no kernel mapping, force contiguous, and read only modes. Store the flags in the allocated struct mem_desc and only use gk20a_gmmu_free, remove gk20a_gmmu_free_attr. This helps in OS abstraction. Rename the notion of attr to flags. Add implicit NVGPU_DMA_NO_KERNEL_MAPPING to all vidmem buffers allocated via gk20a_gmmu_alloc_vid for consistency. Fix a bug in gk20a_gmmu_alloc_map_attr that dropped the attr parameter accidentally. Bug 1853519 Change-Id: I1ff67dff9fc425457ae445ce4976a780eb4dcc9f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321101 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: only report SUPPORT_SYNC_FENCE_FDS if enabledKonsta Holtta2017-03-21
| | | | | | | | | | | | | | Don't always report in gpu characteristics that NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS is supported, but only if CONFIG_SYNC is enabled. Bug 1853519 Change-Id: Ie7d021aefe97b7a2b04a25957ae678272ad446f7 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1323130 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Don't query engine id for inval engineTerje Bergstrom2017-03-21
| | | | | | | | | | | | | | | | When we get a PBDMA MMU fault, we won't be able to map the MMU id into an engine id for reset. We still pass FIFO_INVAL_ENGINE_ID to gk20a_fifo_should_defer_engine_reset() which causes an unnecessary debug spew. Check for FIFO_INVAL_ENGINE before calling gk20a_fifo_should_defer_engine_reset(). Change-Id: I6f4a49be194cbc6070c1a1c667059de2ea79790f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321492 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add is_preempt_pending fifo opsSeema Khowala2017-03-21
| | | | | | | | | | | | | is_preempt_pending fifo ops is added as t19x preempt done sequence is differnt than legacy chips. Change-Id: I6b46be1f5b911ae11bbe806968cb8fabb21848e0 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1309678 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: check return value of mutex_init in CE2 codeDeepak Nibade2017-03-21
| | | | | | | | | | | | | | | - check return value of nvgpu_mutex_init in ce2_gk20a.c - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: Iedaa4e182f23ecacf7c2c4e073317d48416ebc8f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1321288 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: check return value of mutex_init in CDE codeDeepak Nibade2017-03-21
| | | | | | | | | | | | | | | - check return value of nvgpu_mutex_init in cde_gk20a.c - add corresponding nvgpu_mutex_destroy calls Jira NVGPU-13 Change-Id: I99f59d191cc81eff4a330557b864925d36fc4b3d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1321287 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move sim support to its own fileTerje Bergstrom2017-03-21
| | | | | | | | | | | Simulator support is intermixed with the rest of code in gk20a.c. Move that code away from gk20a.c to an own file. Change-Id: Idd3c8795cec5eadc6e49811b5b8ff0592c49a7d2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323230 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Remove ELPG_FLUSHTerje Bergstrom2017-03-20
| | | | | | | | | | | | ELPG_FLUSH is not accessible in later GPUs, so we stopped using it and instead do explicit CBC and L2 flushes. Delete the unused function op and backing code. Change-Id: Ic3eb97f2d32ea8fdbe5ec57bd9254268caaf9935 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323236 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add refcounting to driver fdsDavid Nieto2017-03-20
| | | | | | | | | | | | | | | | | The main driver structure is not refcounted properly, so when the driver unload, file desciptors associated to the driver are kept open with dangling references to the main object. This change adds referencing to the gk20a structure. bug 200277762 JIRA: EVLR-1023 Change-Id: Id892e9e1677a344789e99bf649088c076f0bf8de Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1317420 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix arbiter teardown on PCIDavid Nieto2017-03-20
| | | | | | | | | | | | | | | | The driver is not properly tearing down the arbiter on the PCI driver unload. This change makes sure that the workqueues are drained before tearing down the driver bug 200277762 JIRA: EVLR-1023 Change-Id: If98fd00e27949ba1569dd26e2af02b75897231a7 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1320147 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add fifo ops for intr_0_error_maskSeema Khowala2017-03-20
| | | | | | | | | | This change is required to support t19x mmu fault Change-Id: I3953dcf02c71ace606ba81896e56ea98683eb2ca Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1313482 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: del channel job before fence is closedPeter Daifuku2017-03-17
| | | | | | | | | | | | | | | | | | | In gk20a_channel_clean_up_jobs, move removal of job from channel's job list to before fences are cleaned up; this will prevent gk20a_channel_abort from asynchronously trying to dereference an already freed job. Bug 1844305 JIRA EVLR-849 Change-Id: I1ba05237aa74be1350007630bfa5eba9988f859a Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> (cherry picked from commit 2a9ce58b1b318b95ecfcdf78462f918d090eab99) Reviewed-on: http://git-master/r/1319026 (cherry picked from commit 990f070b0a363159ce1b21f936b7512f469018ca) Reviewed-on: http://git-master/r/1321624 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move all FB programming to FB HALTerje Bergstrom2017-03-17
| | | | | | | | | | | | | | | | | | | | | Move all programming of FB to fb_*.c files, and remove the inclusion of FB hardware headers from other files. TLB invalidate function took previously a pointer to VM, but the new API takes only a PDB mem_desc, because FB does not need to know about higher level VM. GPC MMU is programmed from the same function as FB MMU, so added dependency to GR hardware header to FB. GP106 ACR was also triggering a VPR fetch, but that's not applicable to dGPU, so removed that call. Change-Id: I4eb69377ac3745da205907626cf60948b7c5392a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1321516 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Implement get_rate/set_rate as GPU opTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | | | | | | Move clock APIs from gk20a_platform to gpu_ops. At the same time allow use of internal get_rate/set_rate for querying both GPCCLK and PWRCLK on iGPU. At the same time we can replace calls to clk framework with the new HAL and drop direct dependency to clk framework. gp10b ops were replaced as a whole at HAL initialization. That replaces anything set in platform probe stage, so reduce that to touch only clock gating regs. Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300113 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move platform files to Tegra LinuxTerje Bergstrom2017-03-16
| | | | | | | | | | | | Platform files are used for adding code to probe for Tegra Linux platform. Move the files to Tegra Linux directory to make this clear. Change-Id: Ida66af835688325f095260c618dad90395851267 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300112 Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Rename clk->get_rate to measure_freqTerje Bergstrom2017-03-16
| | | | | | | | | | | | | | get_rate is already used for call-back that queries the last set clock rate. This instance of get_rate actually measures the frequency so renaming it to measure_freq. At the same time modify to use hertz instead of megahertz. We use fractional megahertz already in GPU. Change-Id: I387473d6a6cbf3bb9b9e5a909677a1a725403c32 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1300111 Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: cancel vidmem worker only if supportedKonsta Holtta2017-03-16
| | | | | | | | | | | | | | | | Cancel the vidmem.clear_mem_worker during suspend only if vidmem is enabled via kernel config. Otherwise it's not initialized. Bug 1853519 Change-Id: If88c756ae14f348eddda01218fa218480217388c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321118 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: avoid double-free of incr cmdKonsta Holtta2017-03-16
| | | | | | | | | | | | | | | | The call site (gk20a_submit_prepare_syncs) owns the incr_cmd buffer passed to __gk20a_channel_semaphore_incr. Delete the free in the error path of the latter case to avoid freeing the same buffer twice. Bug 1853519 Change-Id: I9b90ce7ebb17ac63992938c7f9fe90bbd139f85f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1321117 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: channel_from_inst_ptr renamed and made non staticSeema Khowala2017-03-14
| | | | | | | | | | required to support t19x mmu fault Change-Id: Ibe621d924717696a359d7e2065beb6501a9f9b5e Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1315928 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove unused function gk20a_get_phys_from_iovaTerje Bergstrom2017-03-14
| | | | | | | | | | | | Remove unused function gk20a_get_phys_from_iova. At the same time remove the #include for iommu.h, which was only needed by this function. Change-Id: Ia858b0ad5fe7e423d650aa9f82e430f419f2a492 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1319070 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Do not use pm_runtime calls directlyTerje Bergstrom2017-03-14
| | | | | | | | | | | | mm_gk20a.c had direct calls to pm_runtime_put_noidle(). Replace them with calls to wrapper gk20a_idle_nosuspend() to prevent unnecessary dependencies to Linux. Change-Id: Iaf8b9255750be2f3e1aa39587c1a4a3cbeacc67f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1319069 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "gpu: nvgpu: change stall intr handling order"Rajkumar Kasirajan2017-03-14
| | | | | | | | | | | | | This reverts commit 35f0cf0efefe4a64ee25a5b118338b15e552dcb0 as it caused lp0 suspend/resume failure. Bug 1886110 Change-Id: Ib62207650344180361b6529f716f77b84528cd56 Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-on: http://git-master/r/1317986 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-26 19:56:21 -0400