summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a
Commit message (Collapse)AuthorAge
* gpu: nvgpu: zcull settings during golden ctx loadseshendra Gadagottu2017-05-03
| | | | | | | | | | | | Don't configure zcull setting during golden context loading. Zcull setting will be configured through explicit API. Change-Id: I648aea8a8db9132fc81d61dbbff46edf7bfca6d7 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1474021 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Access ptimer_src_freq from struct gk20aTerje Bergstrom2017-05-03
| | | | | | | | | | | | | Fix the last place where ptimer_src_freq is accessed directly from platform structure. JIRA NVGPU-16 Change-Id: I41b924779e1e639bf585cd96cb8c11de6eeb18bb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473704 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Program CE clock gating list after resetTerje Bergstrom2017-05-03
| | | | | | | | | | | | | | | Clock gating list for CE was programmed at GR init, but at that time CE has not yet been brought out of reset. This causes a priv ring error and the clock gating setting does not take place. Move programming of CE clock gating list to CE initialization. Bug 1846641 Change-Id: Ibc9fe2487408358304f80cd679d3b1ecac7cebe8 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473301 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move ch_wdt_timeout to gk20aTerje Bergstrom2017-05-03
| | | | | | | | | | | | | Copy watchdog timeout from platform structure to gk20a and use it from gk20a. JIRA NVGPU-16 Change-Id: Iab70253a7f0e1d28f2e3209285b3f4c476ce9279 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1473705 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix KASAN slab-out-of-bounds errorDavid Pu2017-05-03
| | | | | | | | | | | | | | | | | | | | | | | KASAN reports below slab-out-of-bounds error when accessing gr->map_tiles since gr->map_tiles is allocated with wrong(small) size. fixing it by passing correct size to nvgpu_kzalloc. BUG: KASAN: slab-out-of-bounds in gr_gk20a_init_map_tiles+0x6f0/0x7b0 ... .... BUG: KASAN: slab-out-of-bounds in gr_gk20a_zcull_init_hw+0x184/0x848 ... ... BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ... ... BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ... Bug 1918671 Change-Id: I667ac80b20a3d8539ed3eaae6e0f98e91f917819 Signed-off-by: David Pu <dpu@nvidia.com> Reviewed-on: http://git-master/r/1472491 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: init interface layer support for PMU falconMahantesh Kumbar2017-05-03
| | | | | | | | | Change-Id: I210267265fa38777115d5b49cc8f78f2599e3f9e Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1469458 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: falcon controller HAL initMahantesh Kumbar2017-05-03
| | | | | | | | | | | | | - Assign base address for falcon based on falcon id. - Init mutex for falcon - Init ops with NULL Change-Id: I9efee5c2b15106c7dfc6e55c996f62c7f7b85fc2 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1468452 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: interface layer for falconMahantesh Kumbar2017-05-03
| | | | | | | | | | | | | | | | - struct nvgpu_falcon to hold properties of falcon controller - falcon controller interface layer which establish access to required falcon controller HAL based on struct nvgpu_falcon member flcn_id & flcn_base parameter. - each falcon nvgpu_falcon struct initialized during init with id, base-address along with other properties at HAL. - Added defines related to flacon controller. Change-Id: Ia7777c01ecc542150ddd72f8603b7b4475522b58 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1467523 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove gk20a_reset_priv_ringSeema Khowala2017-05-02
| | | | | | | | | | | | | gk20a_reset_priv_ring does not help resetting priv ring. Chip reset is the only way to recover. Bug 200300756 Change-Id: Ia913d46b0e71cd42e9ce242b2393c50f4d12e002 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1471445 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: include hal.h from hal.cKonsta Holtta2017-05-02
| | | | | | | | | | | | | | | Bring the declarations visible to where they're defined. Bug 200299572 Change-Id: I6261433a754ae20fed4dd7fcde15a4bbaacc2249 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1471353 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: Add new flag support_pmu to gk20aTerje Bergstrom2017-05-02
| | | | | | | | | | | | | | Add new flag support_pmu to struct gk20a at probe time, and access it from gk20a instead of support_gk20a_pmu() which depends on struct device *. JIRA NVGPU-16 Change-Id: I721f1a532e949c98346086abdc2630a8df6eba7b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463546 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Revert "gpu: nvgpu: Dump error on priv ring intr"Terje Bergstrom2017-05-01
| | | | | | | | | | | | This reverts commit 69d7652aaa9cf94873cccae13c7b6f6a4eb224af. Bug 1918711 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Change-Id: Ie28c668729c4956f18e6fa3c820f476d2e4424a4 Reviewed-on: http://git-master/r/1473044 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
* gpu: nvgpu: fix K4.9 sparse messagesDavid Nieto2017-04-28
| | | | | | | | | | | | | | | | | Fix issues related with wrong storage type for 64 bit variables. (1) Fixed width of HZ_TO_MHZ constant (2) changed fence_wait timeout to store unsigned long bug 200299572 Change-Id: Ie8f2386b738f3aafce75fc2440947e36befac273 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1471611 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Dump error on priv ring intrTerje Bergstrom2017-04-28
| | | | | | | | | | | | | Write an error to UART on priv ring error. This uncovers any accesses to missing registers or illegal accesses to registers. Bug 1846641 Change-Id: Ic1e5ecadcd95777f2b3f7bd77accf98ddce97282 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1294683 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
* gpu: nvgpu: Move ptimer_src_freq to gk20aTerje Bergstrom2017-04-28
| | | | | | | | | | | | | Copy ptimer_src_freq to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: I92c1b83d6e2305a19eb2cd267b7dd8d97c1fdc44 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463544 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move has_syncpts to gk20aTerje Bergstrom2017-04-26
| | | | | | | | | | | | | Copy has_syncpts to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: I50329e3a5141a62e6e9828e97ea0747abc1ce1ee Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463545 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: replace __alloc_fd with tegra_fd_allocSri Krishna chowdary2017-04-26
| | | | | | | | | | | | | | nvgpu is being modularized for kernel-4.4 and newer kernels. __alloc_fd() can't be used on modules as it is not exported. So, use a wrapper tegra_fd_alloc() instead of __alloc_fd() bug 200290850 Change-Id: I0e63307d429774440753698643ba7620c1e1f9f6 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/1469313 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move semaphore impl to nvgpu_memAlex Waterman2017-04-25
| | | | | | | | | | | | | | | | | | | Use struct nvgpu_mem for DMA allocations (and the corresponding nvgpu_dma_alloc_sys()) instead of custom rolled code. This migrates away from using linux scatter gather tables directly. Instead this is hidden in the nvgpu_mem struct. With this change the semaphore.c code no longer has any direct Linux dependencies. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I92167c98aac9b413ae87496744dcee051cd60207 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464081 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
* gpu: nvgpu: Remove bools from nvgpu_memAlex Waterman2017-04-25
| | | | | | | | | | | | | | | | Replace a couple of boolean fields in nvgpu_mem with bits in a bitmap introduced in an earlier patch. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: Iffc31bd629cab9a37e5a4fd13377eb9090353410 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464079 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
* gpu: nvgpu: Move and rename gk20a_sgtable*Alex Waterman2017-04-25
| | | | | | | | | | | | | | | | | Move and rename the functions that build sgtables for nvgpu_mems into the Linux specific DMA code. One place outside of the Linux code do include the Linux DMA header. That will be fixed in a subsequent patch. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: Ie43c752b8f998f122af70f7c7eb727af0b0d98df Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464078 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move aggressive_sync_destroy to gk20aTerje Bergstrom2017-04-24
| | | | | | | | | | | | | Copy aggressive_sync_destroy* to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: I6a1c04d85580cb62ab9a52bae08a0f99fe7cfef9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463542 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Put debugfs dependencies inside #ifdefTerje Bergstrom2017-04-24
| | | | | | | | | | | | | | | | | | | Put all debugfs dependencies inside #ifdef CONFIG_DEBUG_FS. This includes some functions in allocators that were used only for debugging. Remove include of linux/debugfs.h on files that do not deal with debugfs. linux/debugfs.h implicitly included linux/fs.h, which we relied on. Add explicit include of linux/fs.h for all files where this is the case. Change-Id: I16feffae6b0e3a2edf366075cdc01ade86be06f9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1467897 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Add wrapper nvgpu/circ_buf.hDeepak Nibade2017-04-24
| | | | | | | | | | | | | | | Add wrapper header file nvgpu/circ_buf.h. It #includes <linux/circ_buf.h> in Linux. JIRA NVGPU-13 Change-Id: I58da6340a6f558cf5678ac6ce91f7fd7fd2dae7e Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1466657 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Move default_pri_timeout to gk20aTerje Bergstrom2017-04-24
| | | | | | | | | | | | | Copy default_pri_timeout to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: Ic361e6be59df73d9b627c97fdcff190b00dfe179 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463541 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use retry timer for short delaysTerje Bergstrom2017-04-21
| | | | | | | | | | | | | CPU timer is inaccurate for short delays, and can produce false timeouts. Bug 1903521 Change-Id: I688b5a59489b62cbd59e418d641fd188ecd3b7e0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1467002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move Linux nvgpu_mem fieldsAlex Waterman2017-04-20
| | | | | | | | | | | | | | | | | | | | Hide the Linux specific nvgpu_mem fields so that in subsequent patches core code can instead of using struct sg_table it can use mem_desc. Routines for accessing system specific fields will be added as needed. This is the first step in a fairly major overhaul of the GMMU mapping routines. There are numerous issues with the current design (or lack there of): massively coupled code, system dependencies, disorganization, etc. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I2e7d3ae3a07468cfc17c1c642d28ed1b0952474d Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464076 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Set GPC PLL id in platform probeAlex Frid2017-04-20
| | | | | | | | | | | | | | Set GPC PLL id in Tegra platform probe, to match Tegra SoC. Bug 1851797 Bug 1867980 Change-Id: Ie6d2625a0009bcb96511aeda8c5af4734cf04929 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/1461698 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/hashtable.hDeepak Nibade2017-04-20
| | | | | | | | | | | | | Add wrapper header file nvgpu/hashtable.h. It #includes <linux/hashtable.h> in Linux. JIRA NVGPU-13 Change-Id: I88e02ab783ac414990a33d4d64c910644ff38fe6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1465615 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/log2.hDeepak Nibade2017-04-20
| | | | | | | | | | | | | Add wrapper header file nvgpu/log2.h. It #includes <linux/log2.h> in Linux. JIRA NVGPU-13 Change-Id: Ie434e62f7ef2dce7692b1c2c12b4ad6453f1534a Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1464719 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use usleep_range() instead of hrtimerTerje Bergstrom2017-04-20
| | | | | | | | | | | | | | | | | FECS trace used hrtimer for sleeping between frames. The resolution does not need to be that high, and hrtimers are not portable, so replace the delay with nvpgu_usleep_range(). Bug 200290850 Change-Id: I10fc56fcf6f6d407413384d557ae4bfdfa4239ef Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1465761 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: ModeE perfbuffer feature developmentPeter Daifuku2017-04-19
| | | | | | | | | | | | | | | | | | perfbuf mapping fixes: - Allocate VM specifically for perfbuf use: using the PMU's results in mmu faults for larger buffers where 64k pages are used. - Make 4GB boundary check work for large address spaces - remove requirement to have allow_all flag set - track perfbuf ownership and clean up appropriately Bug 1880196 JIRA EVLR-1074 Change-Id: Ieee4eb17b64acf9b6ede37bf8e6a91892cda4a7e Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1460809 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move is_fmodel to struct gk20aTerje Bergstrom2017-04-19
| | | | | | | | | | | | | Copy is_fmodel to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: Ib8d793ea2b02b62da3bfdbb6372d9927658b7ec6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463540 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Move can_elpg to struct gk20aTerje Bergstrom2017-04-19
| | | | | | | | | | | | | Copy can_elpg to struct gk20a at probe time, and access it from gk20a instead of platform_gk20a. JIRA NVGPU-16 Change-Id: I497f58c17e0be44e3622e49dad2ba44ed78cffbf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463539 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add abstraction for firmware loadingTerje Bergstrom2017-04-19
| | | | | | | | | | | | | | Add nvgpu_firmware data structure, and return it instead of Linux struct firmare from nvgpu_request_firmware. Also add abstraction for releasing firmware: nvgpu_release_firmware. JIRA NVGPU-16 Change-Id: I6dae8262957c0d4506f710289e3a43a6c1729fc7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1463538 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove unused list in priv_cmd_entryDeepak Nibade2017-04-19
| | | | | | | | | | | | | | | list_head list in struct priv_cmd_entry is unused and hence remove it Jira NVGPU-13 Change-Id: I268998d84a43d2e22fdfae53a9c7795b20fcf93f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1462081 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: clean up linux list includesDeepak Nibade2017-04-19
| | | | | | | | | | | | | | | | Remove linux list includes <linux/list.h> and include <nvgpu/list.h> since we now use nvgpu list APIs instead of linux APIs Jira NVGPU-13 Change-Id: I59bd433a9bc5c15d4c40e6fe4b18cf44246ba3b2 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1462080 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Move Linux kernel driver code to module.cTerje Bergstrom2017-04-18
| | | | | | | | | | | | | | | | Move Linux driver specific code to common/linux/module.c. This includes module initialization, power management, and interrupt functions. Move pci.c, pci.h and nvgpu_common.c under common/linux as they're Linux only files. JIRA NVGPU-16 Change-Id: If92b4dd78ebc0c2bbfa9fbca258e9552e4979b4b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1456162 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: missing power sensor detectionThomas Fleury2017-04-18
| | | | | | | | | | | | | | | | | Monitoring INA3221 is currently missing on some customer designs. Use PCI vendor/device ids and VBIOS version to identify such device, and set power_sensor_missing flag. This flag is subsequently used to skip power device and power policy programming in PMU. Bug 1903258 Change-Id: Ia6b5ce563b5cc3593e138635639025b830e4535e Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1460936 (cherry picked from commit 42f236c210931d28d2699858bb0663b91cf11046) Reviewed-on: http://git-master/r/1463104 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/kref.hDeepak Nibade2017-04-17
| | | | | | | | | | | | | Add wrapper header file nvgpu/kref.h. It #includes <linux/kref.h> in Linux. JIRA NVGPU-13 Change-Id: Ib8b002268b1960646986551ecb9f286e1e21e7f6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1463770 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Fix submit profiling stat reportingPeter Boonstoppel2017-04-17
| | | | | | | | | | | | | | | | | | | The debugfs submit profiling stats report the distribution of submit times at different percentiles. The original code reports the lowest entry in every percentile-bin as being representative for that bin. This means that where debugfs reports the 50th percentile, it actually reports the ~45.001th percentile. This is especially inconveniant when looking at the 100th percentile, which does not in fact reflect the maximum. This patch changes the code to instead report the highest entry in every percentile-bin. Change-Id: Ibde3aaf6445e08af09a4a96156f8421cbeb8bae5 Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/1461658 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Use PMU ver to check ZBC support.Deepak Goyal2017-04-17
| | | | | | | | | | | | | | | | From Volta onwards, new DSS ZBC registers are added for ZBC feature and save/restore of new ZBC reglist is taken care by ctxsw firmware. Therefore, PMU should save ZBC reglist only for PRE-volta chips. JIRA GPUT19X-20 Change-Id: I7d92274208ca42cc77bf57ea3cc416b5ecf32842 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1460244 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove *channel_poll_timeouts* debug printSeema Khowala2017-04-16
| | | | | | | | | | | | uart is littered with gk20a_channel_poll_timeouts prints if nvgpu_dbg_mask has gpu_dbg_fn bit set. This function is looping every living kernel so removing this print in order to not keep uart busy printing it. Change-Id: I0a02f32140573ee088e46bf6869bff7ffcb1a429 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1455081 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix sparse errorsSeema Khowala2017-04-16
| | | | | | | | | | | | | | add static keyword for functions/arrays not being used outside fifo_gk20a.c Bug 200067946 Change-Id: I016f60fa7925c1bc07620fa1e851a904b2403923 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1463155 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fpga: set gr_idle_timeout_defaultSeema Khowala2017-04-16
| | | | | | | | | | | | set gr_idle_timeout_default to 100000 ms instead of MAX_SCHEDULE_TIMEOUT, and enable timeouts_enabled Change-Id: I0b4d014dc6f3fc3c365214f7ffad7af054f771b9 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1458178 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix pid mapping for dGPU FECS tracesThomas Fleury2017-04-14
| | | | | | | | | | | | | | | | | | For dGPU, instance block is in vidmem, and context_ptr was not properly computed, leading to reporting pid=0 in FECS traces. Use gk20a_mm_inst_block_addr, which handles all cases to determine instance block physical address. Bug 1899195 Change-Id: If003d9f00aff66d808e66c06baf6ded38699981a Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1461646 (cherry picked from commit 0a58c5ace036cdf53e3555afe33f694b801f2629) Reviewed-on: http://git-master/r/1462396 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: early return in gk20a_pm_shutdown for vgpuRichard Zhao2017-04-14
| | | | | | | | | | | | vgpu currently has nothing to clean up for shutdown. Jira VFND-3987 Change-Id: I94b55b37c39642d4b0478b8a4018d2a35fe65c2d Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1460800 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gk20a: Use new delay APIsTerje Bergstrom2017-04-13
| | | | | | | | | | | | | | | Use platform agnostic delay functions instead of Linux kernel APIs. This allows removing dependency to Linux header linux/delay.h. At the same time remove #include lines for other unused Linux headers. JIRA NVGPU-16 Change-Id: I46b9ccb80e0b67efb86ec85676e5a55ff835c0ec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1460113 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/bug.hTerje Bergstrom2017-04-13
| | | | | | | | | | | | | Add wrapper header file nvgpu/bug.h. It #includes <linux/bug.h> in Linux. JIRA NVGPU-13 Change-Id: I7bf02ba554333f7cbd79d72bd1cb423c81ebcb49 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1461545 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/sort.hTerje Bergstrom2017-04-13
| | | | | | | | | | | | | Add wrapper header file nvgpu/sort.h. It #includes <linux/sort.h> on Linux. JIRA NVGPU-13 Change-Id: I2393db830a15d5fbf0aa1fb9d55721a06061c09d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1461544 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add wrapper nvgpu/bsearch.hTerje Bergstrom2017-04-13
| | | | | | | | | | | | | | Add wrapper header file nvgpu/bsearch.h. It #includes <linux/bsearch.h> on Linux. JIRA NVGPU-13 Change-Id: I5893f91f2e1bcda99c68f94d9298d87ad4591c8f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1461543 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-17 04:06:17 -0400