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* gpu: nvgpu: do channel resume after hw initseshendra Gadagottu2017-12-26
| | | | | | | | | | | | | | | | | | | | During finalize power on, resume channels only after complete hw initialization is done. Otherwise it will cause issues with unexpected usage of hw. During first boot will not see these issues because there will no channels. But after rail gate/ungate or suspend/resume these issues can be seen if channels are present before rail-gate/suspend. Bug 2039195 Change-Id: Ie96e2f2b91902ba18b37e9a167344eeae07ba8c2 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1625506 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: remove cde supportSeema Khowala2017-12-26
| | | | | | | | | | | Change-Id: I04df795b20413a2d07a252d77b3eba853890fcae Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1624087 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: implement ecc scrubberDeepak Goyal2017-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | Check the availability of ecc units by checking relevant ecc fuse and fuse overrides. During gpu boot, initialize ecc units by scrubbing individual ecc units available. ECC initialization should be done before gr initialization. Following ecc units are scrubbed: SM LRF SM L1 DATA SM L1 TAG SM CBU SM ICACHE Bug 200339497 Change-Id: I54bf8cc1fce639a9993bf80984dafc28dca0dba3 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612734 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Disallow use of bare channelsTerje Bergstrom2017-12-12
| | | | | | | | | | | | | All channels need to now be wrapped in TSGs. Disallow use of bare channels by preventing creation of GPFIFO for them. Bug 1842197 Change-Id: Id0ebee4c590804b96c09f8951e35ba2680b596e7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612697 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: PMU parity HWW ECC supportDavid Nieto2017-12-11
| | | | | | | | | | | | | | | Adding support for ISR handling of ECC parity errors for PMU unit and setting the initial IRQDST mask to deliver ECC interrupts to host in the non-stall PMU irq path JIRA: GPUT19X-83 Change-Id: I8efae6777811893ecce79d0e32ba81b62c27b1ef Signed-off-by: David Nieto <dmartineznie@nvidia.com> Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1611625 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: add tsg release commandRichard Zhao2017-12-10
| | | | | | | | | | | | | | | | gv11b needs tsg release callback to release CE method buffer. Bug 2022929 Change-Id: I32e27a5fa49eb61b9c2fc72ea32034191a9be48e Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1611631 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Aparna Das <aparnad@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix int declarationDeepak Nibade2017-12-08
| | | | | | | | | | | | | | | | | | | | variable g->gr.ctx_vars.regs_base_index is declared as "int", but it is assigned value from unsigned int pointer Since we expect it to be unsigned at all the places, declare it as "u32" instead of "int" Jira NVGPU-449 Change-Id: I2a5b35698c655fa0caa3e38e37ed4d84569c996a Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612446 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use nvgpu API to check for allocated memoryDeepak Nibade2017-12-08
| | | | | | | | | | | | | | | | | | | In __gr_gk20a_exec_ctx_ops(), we directly access linux specific pages to check if memory is allocated or not Since we need to remove this linux specific dependency from common code, use common API nvgpu_mem_is_valid() to check if memory is allocated or not Jira NVGPU-448 Change-Id: Iad62482ad1c0dfad3b96c6c125c2641bbe6ea596 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612445 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix unsigned int declarationDeepak Nibade2017-12-08
| | | | | | | | | | | | | | | | | | | | | | | | In gr_gk20a_init_access_map(), we declare num_entries as "unsigned int" But this variable is implicitly type casted into "int" while calling subsequent functions Hence explicitly declare it as type "int" Also declare variable "w" as "int" too since we use it to compare against num_entries Jira NVGPU-446 Change-Id: I289da6951db0a9ed6b8d6bcb3ee4f6071a4ddaf0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612444 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use nvgpu list APIs instead of linux APIsDeepak Nibade2017-12-08
| | | | | | | | | | | | | | | | | Use nvgpu specific list APIs nvgpu_list_for_each_entry() instead of calling Linux specific list APIs list_for_each_entry() Jira NVGPU-444 Change-Id: I3c1fd495ed9e8bebab1f23b6769944373b46059b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612442 Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove inline keyword from css_hw_set_handled_snapshotsSourab Gupta2017-12-06
| | | | | | | | | | | | | The patch removes the inline qualifier from the 'css_hw_set_handled_snapshots' function, otherwise it leads to QNX compilation failure. Change-Id: I5c3462b61fbfb2b549e711dd2b45032b3a87089c Signed-off-by: Sourab Gupta <sourabg@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1610984 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix indexing in locate pte functionDavid Nieto2017-12-05
| | | | | | | | | | | | | | | | | | | The current code does not properly calculate the indexes within the PDE to access the proper entry, and it has a bug in assignement of the big page entries. This change fixes the issue by: (1) Passing a pointer to the level structure and dereferencing the index offset to the next level. (2) Changing the format of the address. (3) Ensuring big pages are only selected if their address is set. Bug 200364599 Change-Id: I46e32560ee341d8cfc08c077282dcb5549d2a140 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1610562 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Bhosale <dbhosale@nvidia.com>
* gpu: nvgpu: Introduce include/nvpgu/sizes.hTerje Bergstrom2017-12-01
| | | | | | | | | | | | We use SZ_* #defines in some parts of nvgpu, but we don't explicitly include a header that defines it. Add include/nvgpu/sizes.h that in Linux #includes linux/sizes.h. Change-Id: I8f506d85c7eaa12e649f5874a87533e2f0fe9438 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1607575 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove linux dependent from pmu_gk20a.cMahantesh Kumbar2017-12-01
| | | | | | | | | | | | | | | | | | | | | - Removed Linux dependent header - Moved thermal alarm post from pmu_gk20a.c to clk_arb.c - Implemented nvgpu_clk_arb_send_thermal_alaram() method to post NVGPU_GPU_EVENT_ALARM_THERMAL_ABOVE_THRESHOLD JIRA NVGPU-403 Change-Id: Ibf85c2f3a6e704fdcc0502745fab820f7ea428f4 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1608313 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Alignment check for compressible fixed-address mappingsSami Kiminki2017-11-30
| | | | | | | | | | | | | | | | | Add an alignment check for compressible-kind fixed-address mappings. If we're using page size smaller than the comptag line coverage window, the GPU VA and the physical buffer offset must be aligned in respect to that window. Bug 1995897 Bug 2011640 Bug 2011668 Change-Id: If68043ee2828d54b9398d77553d10d35cc319236 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1606439 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove linux specific include from gr_*.c filesDeepak Nibade2017-11-30
| | | | | | | | | | | | | | | Remove linux specific #include "common/linux/os_linux.h" from common source files gr_gk20a.c/gr_gm20b.c/gr_gp10b.c Remove use of ZERO_OR_NULL_PTR() and simply check if pointer is NULL or not Jira NVGPU-405 Change-Id: I663fe298cc720f0b0e22beaa05697b18b375a204 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1607233 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: gv11b: gfxp wfi timeoutseshendra Gadagottu2017-11-29
| | | | | | | | | | | | | | | | | | | | | | For gv11b, configured gfx preemption wfi timeout in usec. Set timeout unit as usec in gr_gv11b_init_preemption_state. Used default timeout as 1msec and this timeout value can be modified through sysfs node: /sys/devices/gpu.0/gfxp_wfi_timeout_count For gp10b: gfxp_wfi_timeout_count is in syclk cycles For gv11b: gfxp_wfi_timeout_count is in usec Bug 2003668 Change-Id: I68d52ce996a83df90b8b3a8164debb07e5cb370f Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599658 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix cleanup path in css_gr_create_client_data()Deepak Nibade2017-11-29
| | | | | | | | | | | | | | | | | | | | | | | | In css_gr_create_client_data(), we call css_gr_free_client_data() in case cur->perfmon_start is zero css_gr_free_client_data() deletes the node from list, and performs some cleanup if cur->perfmon_start is non-zero Hence it is incorrect to call css_gr_free_client_data() in clean up path since node is not added to the list, and cur->perfmon_start is zero anyways Fix the cleanup path, and remove call to css_gr_free_client_data() Jira NVGPU-397 Change-Id: I9cb1abf4d6a02716156c9ea2d4a7963e1c92a531 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1606977 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove dependency on linux header for sim_gk20a*Debarshi Dutta2017-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes linux dependencies from sim_gk20a.h under gk20a/sim_gk20a.h. The following changes are made in this patch. 1) Created a linux based structure sim_gk20a_linux that contains a common sim_gk20a struct inside it. The common struct sim_gk20a doesn't contain any linux specific structs. 2) The common struct sim_gk20a contains an added function pointer which is used to invoke gk20a_sim_esc_readl() method. 3) sim_gk20a.c is moved to nvgpu/common/linux along with a new header sim_gk20a.h that contains the definition of struct sim_gk20a_linux. 4) struct gk20a now contains a pointer of sim_gk20a instead of the entire object. The memory for this struct is allocated and initialized during gk20a_init_support() and freed during invocation of gk20_remove_support(). 5) We first obtain the pointer for struct sim_gk20a_linux from the pointer of sim_gk20a using the container_of method in order to work on the struct. JIRA NVGPU-386 Change-Id: Ic82b8702642377f82694577a53c3ca0b9c1bb2ab Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1603073 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: cleanup uapi header includesDeepak Nibade2017-11-28
| | | | | | | | | | | | | | | | | | | | | With recent rework in nvgpu most of the <uapi/linux/nvgpu.h> includes are not needed so remove them Remove use of NVGPU_DBG_GPU_REG_OP_* in gk20a/gr_gk20a.c and use common definition instead Remove use of NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE in gp10b/fifo_gp10b.c by defining new common flag NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE and then parsing it in API nvgpu_gpfifo_user_flags_to_common_flags() Jira NVGPU-363 Change-Id: I8e653275ea3f443f24be7284d54f2115636aba3f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1606108 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move cycle state buffer handler to linuxDeepak Nibade2017-11-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | We use dma_buf pointer cyclestate_buffer_handler in common code But since this is linux specific, we need to move this out of common code and into linux specific code Move dma_buf pointer cyclestate_buffer_handler from common channel code to struct nvgpu_channel_linux Fix all pointer accesses to this handle Move gk20a_channel_free_cycle_stats_buffer() to ioctl_channel.c since it is mostly linux specific And since gk20a_channel_free_cycle_stats_buffer() needs to be called while closing the channel, call it from nvgpu_channel_close_linux() Jira NVGPU-397 Jira NVGPU-415 Change-Id: Ifb429e49b8f7a1c9e2bc757f3efdd50b28ceca1f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1603909 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move snapshot_client memory handling to linuxDeepak Nibade2017-11-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We right now store dmabuf fd and dma_buf pointer for gk20a_cs_snapshot_client But since dma_buf and all related APIs are linux specific, we need to remove them from common code and move them to linux specific code Add new linux specific structure gk20a_cs_snapshot_client_linux which includes struct gk20a_cs_snapshot_client and linux specific dma_buf pointer In gk20a_attach_cycle_stats_snapshot(), we first handle all dma_buf related operations and then call gr_gk20a_css_attach() Move gk20a_channel_free_cycle_stats_snapshot() to ioctl_channel.c In gk20a_channel_free_cycle_stats_snapshot(), we call gr_gk20a_css_detach() and then free up dma_buf in linux specific code We also need to call gk20a_channel_free_cycle_stats_snapshot() while closing the channel, so call it from linux specific nvgpu_channel_close_linux() Jira NVGPU-397 Jira NVGPU-415 Change-Id: Ida27240541f6adf31f28d7d7ee4f51651c6d3de2 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1603908 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: initialize gr->max_comptag_mem in linuxDeepak Nibade2017-11-28
| | | | | | | | | | | | | | | | | | | We initialize gr->max_comptag_mem in common code and with a global variable declared in <linux/mm.h> Move this linux specific dependency to linux specific files i.e. initialize gr->max_comptag_mem during linux specific probe functions Jira NVGPU-414 Change-Id: I9415938bf1288b24950ba7ecc71abee3162dae64 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1606195 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: fix fence_from_* retvalsKonsta Holtta2017-11-27
| | | | | | | | | | | | The functions gk20a_fence_from_semaphore and gk20a_fence_from_syncpt return errno-like codes, so replace two conditions with better-fitting errors than -1. Change-Id: Ic9a43cd0365c1eb187e7dc19da14acdd2fbc3f1c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1605563 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: define error_notifiers in common codeDeepak Nibade2017-11-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the linux specific error_notifier codes are defined in linux specific header file <uapi/linux/nvgpu.h> and used in all the common driver But since they are defined in linux specific file, we need to move all the uses of those error_notifiers in linux specific code only Hence define new error_notifiers in include/nvgpu/error_notifier.h and use them in the common code Add new API nvgpu_error_notifier_to_channel_notifier() to convert common error_notifier of the form NVGPU_ERR_NOTIFIER_* to linux specific error notifier of the form NVGPU_CHANNEL_* Any future additions to error notifiers requires update to both the form of error notifiers Move all error notifier related metadata from channel_gk20a (common code) to linux specific structure nvgpu_channel_linux Update all accesses to this data from new structure instead of channel_gk20a Move and rename below APIs to linux specific file and declare them in error_notifier.h nvgpu_set_error_notifier_locked() nvgpu_set_error_notifier() nvgpu_is_error_notifier_set() Add below new API and use it in fifo_vgpu.c nvgpu_set_error_notifier_if_empty() Include <nvgpu/error_notifier.h> wherever new error_notifier codes are used NVGPU-426 Change-Id: Iaa5bfc150e6e9ec17d797d445c2d6407afe9f4bd Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593361 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgu: use API to check for valid memoryDeepak Nibade2017-11-27
| | | | | | | | | | | | | | | | | Use API nvgpu_mem_is_valid() to check if buffers are allocated or not instead of directly accessing linux specific sg_table Jira NVGPU-416 Change-Id: I83da79f4a57ec5a765f32c69bf76e708753e11fb Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1604587 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: drop num_pts argument in nvgpu_nvhost_sync_create_fenceKonsta Holtta2017-11-27
| | | | | | | | | | | | | | | | | For nvhost_sync_create_fence, num_pts corresponds to the number of syncpoints in the array given to it, and the wrapper nvgpu_nvhost_sync_create_fence only supports one syncpoint at a time. Use 1 explicitly and make it impossible for the caller of this wrapper to use something else by mistake. Change-Id: I2497c1dd4fed0906e3bb07e8f5ddd3a9346cb381 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1604339 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: split init_falcon_setup_hwSupriya2017-11-27
| | | | | | | | | | | | | | | | | | | This CL is as part of phased changes to support NO LSPMU Changes done are to add new pmu ops : - setup_apertures - update_lspmu_cmdline_args These would be called from pmu op init_falcon_setup_hw JIRA NVGPU-296 Change-Id: Idbcec5c93ca3150df5c9fb81d65b9fce778cecb8 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589004 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove dependency on linux header for regops_gk20a*Debarshi Dutta2017-11-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the dependency on the header file "uapi/linux/nvgpu.h" for regops_gk20a.c. The original structure and definitions in the uapi/linux/nvgpu.h is maintained for userspace libnvrm_gpu.h. The following changes are made in this patch. 1) Defined common versions of the NVGPU_DBG_GPU_REG_OP* definitions inside regops_gk20a.h. 2) Defined common version of struct nvgpu_dbg_gpu_reg_op inside regops_gk20a.h naming it struct nvgpu_dbg_reg_op. 3) Constructed APIs to convert the NVGPU_DBG_GPU_REG_OP* definitions from linux versions to common and vice versa. 4) Constructed APIs to convert from struct nvgpu_dbg_gpu_reg_op to struct nvgpu_dbg_reg_op and vice versa. 5) The ioctl handler nvgpu_ioctl_channel_reg_ops first copies from userspace into a local storage based on struct nvgpu_dbg_gpu_reg_op which is copied into the struct nvgpu_dbg_reg_op using the APIs above and after executing the regops handler passes the data back into userspace by copying back data from struct nvgpu_dbg_reg_op to struct nvgpu_dbg_gpu_reg_opi. JIRA NVGPU-417 Change-Id: I23bad48d2967a629a6308c7484f3741a89db6537 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1596972 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: use submit callback only in linux codeKonsta Holtta2017-11-22
| | | | | | | | | | | | | | | | | Move the implementation for channel job update callbacks that is based on Linux specific work_struct usage to Linux-specific code. This requires a bit of extra work for allocating OS-specific priv data for channels which is also done in this patch. The priv data will be used more when more OS-specific features are moved. Jira NVGPU-259 Change-Id: I24bc0148a827f375b56a1c96044685affc2d1e8c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589321 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add check_priv_security fuse opsSeema Khowala2017-11-22
| | | | | | | | | | | | | | | | | | | | | | | -New fuse ops is added to set NVGPU_SEC_PRIVSECURITY and NVGPU_SEC_SECUREGPCCS bits in g->enabled_flags during hal initialization -For igpu non simulation platforms, fuses are read to decide if gpu should be allowed to boot or not. --Do not boot gpu if priv_sec_en is set but wpr_enabled is not set to 1 or vpr_auto_fetch_disable is not set to 0 --With priv_sec_en set, all falcons have to boot in LS mode and this needs wpr_enabled set to 1 AND vpr_auto_fetch_disable set to 0. In this case gmmu tries to pull wpr and vpr settings from tegra mc Bug 2018223 Change-Id: Iceaa1b0b3214e9a3d6cef5d77a82e034302f748b Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1595454 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove separation of t18x codeTerje Bergstrom2017-11-17
| | | | | | | | | | | Remove separation of t18x specific code and fields and the associated ifdefs. We can build T18x code in always. Change-Id: I4e8eae9c30335632a2da48b418c6138193831b4f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1595431 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Add translation for NVGPU MM flagsAlex Waterman2017-11-17
| | | | | | | | | | | | | | | | | | | | | | | Add a translation layer to convert from the NVGPU_AS_* flags to to new set of NVGPU_VM_MAP_* and NVGPU_VM_AREA_ALLOC_* flags. This allows the common MM code to not depend on the UAPI header defined for Linux. In addition to this change a couple of other small changes were made: 1. Deprecate, print a warning, and ignore usage of the NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS flag. 2. Move the t19x IO coherence flag from the t19x UAPI header to the regular UAPI header. JIRA NVGPU-293 Change-Id: I146402b0e8617294374e63e78f8826c57cd3b291 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599802 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: move vgpu code to linuxDeepak Nibade2017-11-17
| | | | | | | | | | | | | | | | | | | | Most of VGPU code is linux specific but lies in common code So until VGPU code is properly abstracted and made os-independent, move all of VGPU code to linux specific directory Handle corresponding Makefile changes Update all #includes to reflect new paths Add GPL license to newly added linux files Jira NVGPU-387 Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1599472 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Do not include UAPI in gr_gk20a.hTerje Bergstrom2017-11-16
| | | | | | | | | | | | | | | | Remove #include of <uapi/linux/nvgpu.h> from gr_gk20a.h. vgpu_mm_gp10b.c uses UAPI definitions, so add an explicit #include there. JIRA NVGPU-363 Change-Id: Ieabd7240d62495d2719d7fdbc25cc238de13c75e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598981 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Forward declare nvgpu_ctxsw_trace_filterTerje Bergstrom2017-11-16
| | | | | | | | | | | | | | gk20a.h refers to nvgpu_ctxsw_trace_filter, which is defined in another header. Add a forward declare to remove the dependency. JIRA NVGPU-363 Change-Id: I537b6005eb65c4d44799d0f72deced5ec54bc99b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598980 GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Change reg_op_is_* into normal funcsTerje Bergstrom2017-11-16
| | | | | | | | | | | | | | | | reg_op_is_* static inline force a dependency to UAPI in regops_gk20a.h. Change the implementation to be functions in .c file. JIRA NVGPU-388 Change-Id: If5cae1ad011a26ee5ff23e1e39aac3d88fd5bb98 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598979 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove GPU characteristics from gk20aTerje Bergstrom2017-11-15
| | | | | | | | | | | | | Remove a global copy of GPU characteristics in struct gk20a. Instead fill it at the Linux implementation of GPU characteristics IOCTL. JIRA NVGPU-388 Change-Id: Idc4ad58301d44a554777f5b969f3191a342e73fd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1597330 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: deprecate TSG/CHANNEL_SET_PRIORITY IOCTLsDeepak Nibade2017-11-15
| | | | | | | | | | | | | | | TSG/CHANNEL_SET_PRIORITY IOCTLs are deprecated and user space should be using combination of timeslice and interleave levels to decide the priority Hence remove the IOCTLs and all corresponding APIs Jira NVGPU-393 Change-Id: I7cf0785689269536eca0c278c774b0e9e74f8c2f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598581 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: add rc input param to gk20a_fifo_handle_pbdma_intrSeema Khowala2017-11-15
| | | | | | | | | | | | | | | | | | | Add a new parameter rc to gk20a_fifo_handle_pbdma_intr so that it can be called to handle pbdma intr without doing teardown. This is needed for t19x during polling of pbdma preempt Bug 200277163 Bug 1945121 Change-Id: Ide0d3b6ed8c0862cb5332d112926b6933abd0815 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1584734 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: get intr mask for an active_engine_idSeema Khowala2017-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | This is needed for t19x during eng preempt done polling. E.g. copy engine (CE) stall interrupt should not prevent GR from finishing preemption. In order to check if current stall interrupt is valid for the engine being polled for preemption completion, function to provide engine intr mask is needed. With this, polling code can make sure there are no stall interrupts pending for the engine being polled for preemption done. If stall interrupts are pending for an engine, preemption will never finish. Bug 200277163 Bug 1945121 Change-Id: Ie1ccac52c3e8d453a49084e195f2e7eaafb8f057 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1584065 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: vgpu: Implement clk.get_maxfreqTerje Bergstrom2017-11-14
| | | | | | | | | | | | | | | | | Modify HAL clk->get_maxfreq() signature to match the one in clk->set_rate() and clk->get_rate(). It allows support of multiple clocks. Implement clk.get_maxfreq operation for vgpu and use it to fill max_freq field in GPU characteristics query. JIRA NVGPU-388 Change-Id: I93bfc2aa76e38b8a5e0ac55d87c4e26df6fea77f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1597329 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: define preemption modes in common codeDeepak Nibade2017-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We use linux specific graphics/compute preemption modes defined in uapi header (and of below form) in all over common code NVGPU_GRAPHICS_PREEMPTION_MODE_* NVGPU_COMPUTE_PREEMPTION_MODE_* Since common code should be independent of linux specific code, define new modes of the form in common code and used them everywhere NVGPU_PREEMPTION_MODE_GRAPHICS_* NVGPU_PREEMPTION_MODE_COMPUTE_* Add required parser functions to convert both the modes into each other For linux IOCTL NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE, we need to convert linux specific modes into common modes first before passing them to common code And to pass gpu characteristics to user space we need to first convert common modes into linux specific modes and then pass them to user space Jira NVGPU-392 Change-Id: I8c62c6859bdc1baa5b44eb31c7020e42d2462c8c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1596930 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Include UAPI explicitlyTerje Bergstrom2017-11-13
| | | | | | | | | | | | | Add explicit #includes for <uapi/linux/nvgpu.h> for source code files that depend on it. JIRA NVGPU-259 Change-Id: I717d5f1493423fd3a7a34b6dd3380d33a9307a09 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1596254 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: ctx_patch_write fixesPeter Daifuku2017-11-13
| | | | | | | | | | | | | | | | | | - Add update_patch_count parameter to ctx_patch_write_begin/end functions If True, the main_image_patch_count register will be updated. Previously, the patch count would be updated if the cpu_va for the graphics context was non-NULL, but this only works for sysmem (cpu_va is always 0 for vidmem) - Remove unused patch parameter for the commit_global_timeslice functions JIRA ESRM-74 Bug 2012077 Change-Id: I35d0a9eb48669a227833bba1d2e63e9fe8fd8aa9 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1594790 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Hard code map_buffer_batch_limitTerje Bergstrom2017-11-13
| | | | | | | | | | | | | | | Add a hard coded #define for map_buffer_batch_limit and use that insted of querying from GPU characteristics. Also add an nvgpu_is_enabled() flag for disabling batch mapping, and set map_buffer_batch_limit to zero if batch mapping is disabled. JIRA NVGPU-388 Change-Id: Ic91feea638d0f47c5c22321886cfc75e97259dc3 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593690 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Move max_css_buffer_size to gr_gk20aTerje Bergstrom2017-11-12
| | | | | | | | | | | | | | | | | | max_css_buffer_size was accessed directly from GPU characteristics, which added a dependency to Linux. Move the field to gr_gk20a and copy it to GPU characteristics at query time. JIRA NVGPU-259 Change-Id: Ied19e33bf1a79a9ce45e33df57fe5bbe3a3c4f9d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593689 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove NVGPU_ALLOC_OBJ_FLAGS_* from common codeDeepak Nibade2017-11-10
| | | | | | | | | | | | | | | | | | | | In gr_gp10b_alloc_gr_ctx(), we use linux specific flags NVGPU_ALLOC_OBJ_FLAGS_* Since common code should be independent of linux specific code, define new flags NVGPU_OBJ_CTX_FLAGS_SUPPORT_* in common code and use them wherever needed Linux code will parse the user flags and send appropriate flags to g->ops.gr.alloc_obj_ctx() Also remove use of NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO since this seems to be deadcode anyways Jira NVGPU-382 Change-Id: Id82efe0d46ddc3e2c063610025ea57f283bc3510 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1594452 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: remove NVGPU_ALLOC_GPFIFO_EX_FLAGS_* from common codeDeepak Nibade2017-11-10
| | | | | | | | | | | | | | | | | | | | | In gk20a_channel_alloc_gpfifo(), we use linux specific flags NVGPU_ALLOC_GPFIFO_EX_FLAGS_* Since common code should be independent of linux specific code, define new flags NVGPU_GPFIFO_FLAGS_SUPPORT_* in common code and use them in gk20a_channel_alloc_gpfifo() Linux code will parse the user flags and send appropriate flags to gk20a_channel_alloc_gpfifo() Jira NVGPU-381 Change-Id: Ibec51903b3407175fbba727208483b0dc36a5772 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1594422 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: Remove PTE kind logicSami Kiminki2017-11-10
| | | | | | | | | | | | | | | | Since NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL was made mandatory, kernel does not need to know the details about the PTE kinds anymore. Thus, we can remove the kind_gk20a.h header and the code related to kind table setup, as well as simplify buffer mapping code a bit. Bug 1902982 Change-Id: Iaf798023c219a64fb0a84da09431c5ce4bc046eb Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1560933 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-22 13:35:40 -0400