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path: root/drivers/gpu/nvgpu/gk20a
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* host/gpu: Upgrade to new fence-based sync implementationDan Willemsen2015-03-18
| | | | Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
* gpu: remove devm_request_and_ioremapDan Willemsen2015-03-18
| | | | Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
* gpu: nvgpu: add error prints for do_idle() failureDeepak Nibade2015-03-18
| | | | | | | | | | | | | | Add error prints in gk20a_do_idle() to narrow down the failure point Bug 200064302 Change-Id: Iffe1151bdc200a79b88e273b3b01523f8e46d130 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/664446 (cherry picked from commit bf1cd9b5551d27cb5cc468795cd147376f48e482) Reviewed-on: http://git-master/r/666218 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: update regops whitelistMatt Craighead2015-03-18
| | | | | | | | | | | | | | Remove an undesired register from the regops whitelist on both gk20a and gm20b. Bug 1589732 Change-Id: I7747fafd3c2c32a9c5ce6388be73c7f61e509f0a Signed-off-by: Matt Craighead <mcraighead@nvidia.com> Reviewed-on: http://git-master/r/663373 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Send aligned addresses to allocatorSupriya2015-03-18
| | | | | | | | | | | | | | | | | | Bug 1587090 Bug 200050711 PMU dmem start address is unaligned. Allocator allocates aligned length amount of memory But address alloced is nto checked to be aligned, but free checks for alignment of addresses before free. For dmem case, frees never actually happened. This fix ensures addresses are aligned. Change-Id: I8b95f89940aa4d23355c3788dc95afb5c8867373 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/663140 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove gk20a sparse texture & PTE freeingTerje Bergstrom2015-03-18
| | | | | | | | | | | | Remove support for gk20a sparse textures. We're using implementation from user space, so gk20a code is never invoked. Also removes ref_cnt for PTEs, so we never free PTEs when unmapping pages, but only at VM delete time. Change-Id: I04d7d43d9bff23ee46fd0570ad189faece35dd14 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/663294
* gpu: nvgpu: Added GPMU app version for T18xMahantesh Kumbar2015-03-18
| | | | | | | | | | | | Added app version which allows to load & boot T18x GPMU. Bug 200064127 Change-Id: Iebcfcb984bfbdcd3fb55cf2155c5e75831d5ad95 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/663141 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Allow enabling/disabling MC interruptMahantesh Kumbar2015-03-18
| | | | | | | | | | | | Added method to enable/disable MC interrupt by unit Bug 200064127 Change-Id: I89e794d5b69a2a93642e2df437d6744bf595f021 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/661211 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: allow duplicate finish signalsKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | Channel update callback for a channel that has no more cde jobs signals that a cde context is free. Spurious channel updates may still happen from at least nonstalling semaphore wait interrupts. Instead of scary WARNs, use only gk20a_dbg_info() for info prints in these harmless situations, and double check that only the first update starts a deleter work for temporary contexts. Change-Id: I68de8f35e2c366206c6efac3ee97025239e8bba2 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> (cherry-picked from commit f56a941b4962c5479291cae48e2abca6067e3f13) Reviewed-on: http://git-master/r/660849 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: update regops whitelistMatt Craighead2015-03-18
| | | | | | | | | | | | | | Remove an undesired register from the regops whitelist on both gk20a and gm20b. Bug 1589712 Change-Id: I76e8ff1f4b68d6d5ce2c11adc08d984df7883e5e Signed-off-by: Matt Craighead <mcraighead@nvidia.com> Reviewed-on: http://git-master/r/663371 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Per-chip context creationTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Add HAL for context creation, and expose functions that T18x context creation needs. Bug 1517461 Bug 1521790 Bug 200063473 Change-Id: I63d1c52594e851570b677184a4585d402125a86d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/660237
* gpu: nvgpu: Generic mem_desc & allocationTerje Bergstrom2015-03-18
| | | | | | | | | | | | Make mem_desc a generic container for buffers. Add functions for allocating and mapping buffers to an address space which store their data in mem_desc. Change-Id: I031643442c6fd41f5e7222fe9b7bfcaf9b784db5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/660908 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
* gpu: nvgpu: Simplify pagepool size queryTerje Bergstrom2015-03-18
| | | | | | | | | | | Make pagepool size query into a function instead of storing the value during boot time in a structure. This simplifies the structure and users of pagepool size do not need to worry about whether it has already been set. Change-Id: Iba16e840cdf9b6c39449730237aa7d8fdff47848 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/660907
* Revert "gpu: nvgpu: Enable syncpt reclaim only on gm20b"Timo Alho2015-03-18
| | | | | | | | | | This reverts commit 8eefb93c21934b101d7f423c38d9ea384a45fad6. Bug 1585422 Change-Id: I217e0ffe6c230ee3c63d9aec1c48ce9c41770468 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: http://git-master/r/659426
* gpu: nvgpu: Submit coverity fixesTerje Bergstrom2015-03-18
| | | | | | | | | | Clear ioctl buffer and fix double free, and error case memory leak. Bug 200059216 Change-Id: I21cc2b0f6a7e8fca09f72caf4c54d570b13f400b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/655347
* gpu: nvgpu: fix coverity issue in pmu loggingVijayakumar2015-03-18
| | | | | | | | | | | | | | | bug 200059216 use boolean to return status of hex search in the string Change-Id: Ifa53edccf54b9741b369f3a1ab5c79b6aad6cf86 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/656749 Reviewed-by: Supriya Sharatkumar <ssharatkumar@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: debugger interface fixesAingara Paramakuru2015-03-18
| | | | | | | | | | | | | | | | | To run CUDA apps, the following minimal changes have been made: - power-gating is disabled for vgpu - regop rd/wr returns -ENOSYS Tools (debugger/profiler) support is known to not work and not needed at this time. Bug 200043227 Change-Id: I923caad78450e72d310fb9290cf2849ed5460ad5 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/592878 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Enable syncpt reclaim only on gm20bTerje Bergstrom2015-03-18
| | | | | | | | | | | | | gm20b has more channels than sync points. We use aggressive reclaim of sync points to offset that. Disable aggressive reclaim for gk20a because it is not needed there. Bug 1583849 Change-Id: I2a74b0504150a54cb8a97016effe20c5d905ac95 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/657095 Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: cde: remove unused obj_idsKonsta Holtta2015-03-18
| | | | | | | | | | | | | obj_id from gk20a_alloc_obj_ctx is not used and calling free_obj_ctx is effectively a no-op, since the corresponding channel is also freed. Bug 200059216 Change-Id: Icbe2cf5dc21d50cb007bf73829705451ada106ac Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/655368 Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add gk20a_scale_exit()Konsta Holtta2015-03-18
| | | | | | | | | | | | When removing the module, remove the device from devfreq and free resources allocated when scaling is initialized. Bug 1476801 Change-Id: I7bb0f8112a5bf7e5ce2fc56cf8af7059d910002c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/594444 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: remove platform device on exitKonsta Holtta2015-03-18
| | | | | | | | | | | | | Add ->remove() for undoing the ->probe() and ->late_probe() in gk20a_platform devices, and call it when gk20a is removed. Bug 1476801 Change-Id: Ic9b29c0a7ea4a4cae7b5a0f66774bd799eb28434 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/594443 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: fix off-by-1 in buf allocationKonsta Holtta2015-03-18
| | | | | | | | | | Bug 200046882 Change-Id: I515e972f84cb7e1b17eef42ade6a4eaf0f8d71f8 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/559332 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: detect iommu'ability dynamicallyHiroshi Doyu2015-03-18
| | | | | | | | | | | | A device can be iommu'able whenever it's registered so that this patch detects its iommu'ability dynamically. Bug 1577389 Change-Id: I8ea20e5dd997fc1a399f517c17783323f238ecc3 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/606019 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement per-chip pagepool sizeTerje Bergstrom2015-03-18
| | | | | | | | | | Bug 1567274 Change-Id: Ib366f56c109f60be98435124e9e73697d161c4d0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/606935 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Physical page bits to be per chipTerje Bergstrom2015-03-18
| | | | | | | | | | Retrieve number of physical page bits based on chip. Bug 1567274 Change-Id: I5a0f6a66be37f2cf720d66b5bdb2b704cd992234 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/601700
* gpu: nvgpu: clean up module deinitializationKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix gk20a module removal so that the driver can be correctly removed when built as a module (CONFIG_GK20A=m). Reinsertion correctly will need more missing deinit calls, which are not yet implemented. This change has no effect yet on any builds since the module is built in by the defconfig. - don't free threaded irqs that are bound to the device - destroy cde if it is enabled - remove all debugfs entries recursively generated directly and by cde, pmu, clk etc. - free secure buffer if it exists - remove pm_runtime_put, since it doesn't have a pairing get - pm_runtime defines proper function stubs if it is not enabled, so remove ifdefs and query pm_runtime_enabled() - null and free gk20a only after all deinit has been done Bug 1476801 Change-Id: I73ad72832bdb501fd7071d6ac68d461ee63a760d Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/594442 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add HAL for add ZBC color & depthTerje Bergstrom2015-03-18
| | | | | | | | | | | Turn add ZBC functions into HALs that can be filled per chip. Bug 1567274 Change-Id: Ic6ef29d3353d4a0079ea0c80f513ffd579fe554f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/601109 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: l2 invalidate/flush for off devicesKonsta Holtta2015-03-18
| | | | | | | | | | | | | When doing l2 invalidate or l2 flush, first check if the hw is powered on. If it is not, nothing is done, as there are no hardware registers available. As a side-effect, this may race so that the hardware stays unrailgated. Change-Id: I8bdbfcee3545355435d4ae01476188eb1b8b8817 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/594441 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: wait for ctx deletion before getKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | | | | | Wait for possible temp context deletion to finish properly before passing contexts around later, to prevent situations where the context deleter scheduling would have been completed, but running it would not, and a new one could have been scheduled again. When finished, schedule the deleter before freeing the context back to use to prevent races. Warn in impossible situations when these double deletions would happen. Bug 200054186 Bug 200052943 Change-Id: I23ca0d1081eea77d0e453b9038adc914909b5f48 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/603439 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: combine init and convert passesKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | CDE context needs to be initialized in the first run using a separate initialization gpfifo before the actual conversion. To prevent a race condition, include both of them in a single gpfifo whenever the initialization is performed. Bug 200052943 Change-Id: I7eb09a906c0374825df71eba969e4596b94e5ff2 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/602888 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: add trace events for ctx allocsKonsta Holtta2015-03-18
| | | | | | | | | | | | Trace cde context allocation and deallocation with ftrace. Bug 200052943 Change-Id: Ieeb625166662971fb3eb3fb29c986fdb6809c10b Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/602886 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: warn on double finish and releaseKonsta Holtta2015-03-18
| | | | | | | | | | | | | | Add WARN to conditions that should never happen, to help debugging any context issues. Bug 200052943 Change-Id: Ibe2a9507f3a62bb7b2e263ff3ff21a24a092a971 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/602885 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: restrict context countKonsta Holtta2015-03-18
| | | | | | | | | | | | | Add an upper limit for cde contexts, and wait for a while if a new context is queried and the limit has been exceeded. This happens only under very high load. If the timeout is exceeded, report -EAGAIN. Change-Id: I1fa47ad6cddf620eae00cea16ecea36cf4151cab Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/601719 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Per-alloc alignmentTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I8b7e86afb68adf6dd33b05995d0978f42d57e7b7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/554185 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Retrieve intr & reset id from HWTerje Bergstrom2015-03-18
| | | | | | | | | | | | Query interrupt number and reset id from HW. Use the number from HW when enabling and detecting interrupts. Bug 200036089 Bug 1567274 Change-Id: If9cb4db79a19dcb193ba7ad9db7081f4fe1ab433 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/600988
* gpu: nvgpu: add trace event for channel updateKonsta Holtta2015-03-18
| | | | | | | | | | Bug 200052943 Change-Id: Ied6454bbfb5df9ab29497ecbf2aac495f6d89362 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/602887 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: report use counts to debugfsKonsta Holtta2015-03-18
| | | | | | | | | | | Create debugfs nodes for ctx_count, ctx_usecount and ctx_cont_top. Change-Id: I1360853b2650d37a96c8adf76368d48d9b457909 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/602860 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: do not rearm deleter on failureKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | | | | | Rescheduling the temp context deleter when it is not immediately possible is not necessary, and complicates things. Don't do it. The context would anyway be used later when its time comes in the free list, and the deletion would then be retried. This simplifies canceling the works when shutting down or going into suspend, since re-canceling the possibly rescheduled work is not needed. Releasing the app mutex is still necessary when deleting the whole cde. Bug 200052943 Change-Id: I06afe1766097a78d7bcb93f3140855799ac903ca Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/601035 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: cancel ctx deleter when using itKonsta Holtta2015-03-18
| | | | | | | | | | | | Cancel the temporary context deleter work when acquiring a channel for use, to prevent re-scheduling when the same context would be quickly re-used and finished twice or more in a row before deletion. Change-Id: Iadd8230d9462adc451e506152a24c50a920a59e3 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/600273 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: flush update notifiers on suspendKonsta Holtta2015-03-18
| | | | | | | | | | | | | | If any gk20a update callback work is pending, wait for them to finish before going to suspend. Bug 200052943 Change-Id: Ib469db6e29d13ae26aaca5fceb1ccd20f18bfc3c Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/601034 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: allocator: release semaphore on errorKonsta Holtta2015-03-18
| | | | | | | | | | | | Release rw_sema properly when block allocator runs out of memory and returns error. Change-Id: I6b7cf9564ae25ad1ba30edfcb1ae8a20cf7dc9db Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/601792 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use long for timeout in semaphoresTerje Bergstrom2015-03-18
| | | | | | | | | | | | Semaphore fences use int for timeout. It should be long instead. Bug 1567274 Change-Id: Ia2b2c5ceeb03b4d09c1d8933ce33310356dd7e01 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/595980 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* nvgpu: gm20b: set rail gating delay to 500msecSeshendra Gadagottu2015-03-18
| | | | | | | | | | | | | | Enable gpu rail gating by setting rail-gating delay to 500msec instead of INT_MAX. Bug 1552464 Bug 200040882 Change-Id: I64e779fc5b3a0c04997d8874025c71812948602a Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/552700 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: Add NULL pointer check to debug codeArto Merilainen2015-03-18
| | | | | | | | | | | | | | | nvgpu exposes debug dump functionality. Currently this function misses NULL pointer checks and therefore in cases where the driver is compiled but the device is disabled, the driver crashes kernel. This patch adds the missing NULL pointer check. Change-Id: I32acb5cad62b2a29603d6439a5c7e45e016235dd Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/599370 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Mohan Nimaje <mnimaje@nvidia.com>
* gpu: nvgpu: support config of TPC FUSE dynamicallyDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow steps below to config active TPC number: echo 1 > /sys/devices/platform/host1x/gpu.0/force_idle echo 0x1/0x2/0x3 > /sys/devices/platform/host1x/gpu.0/tpc_fs_mask echo 0 > /sys/devices/platform/host1x/gpu.0/force_idle where, 0x1 : disable TPC1 0x2 : disable TPC0 0x3 : both TPCs active Also, add API set_gpc_tpc_mask to update the TPCs and call this API after update to sysfs "tpc_fs_mask" Once fuses are updated for new TPC settings, we need to reconfigure GR and golden_image. Hence disable gr->sw_ready and golden_image_initialized flags. Also, initialize gr->tpc_count = 0 each time in gr_gk20a_init_gr_config(), otherwise it goes on adding tpc count Bug 1513685 Change-Id: Ib50bafef08664262f8426ac0d6cbad74b32c5909 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/552606 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: Replace allocator with bitmap allocTerje Bergstrom2015-03-18
| | | | | | | | Replace gk20a allocator with Linux bitmap allocator. Change-Id: Iba5e28f68ab5cf19e2c033005efd7f9da6e4a5b6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/554184
* gpu: nvgpu: Implement NVGPU_AS_IOCTL_GET_VA_REGIONSSami Kiminki2015-03-18
| | | | | | | | | | | | | Implement NVGPU_AS_IOCTL_GET_VA_REGIONS which returns a list of GPU VA regions for different page sizes. This is required for the userspace for safe fixed-address address space allocation. Bug 1551752 Change-Id: I63ddde30935db2471bec498dae0caa870e89c1a5 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/590814 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: sanitize gk20a_vm_alloc_share()Sami Kiminki2015-03-18
| | | | | | | | | | | | | | Add sanity check for big_page_size parameter to avoid invoking gk20a_init_vm() with a bogus big page size, potentially hitting a BUG_ON there. Also, reorganize the code a bit to avoid memory leak in case of bogus big page size, and properly forward the return value from gk20a_init_vm(). Change-Id: I4eeada75415d2e9539b5e8859099cce35cd86db3 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/594469 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: ALLOC_AS: don't fail on default big page sizeSami Kiminki2015-03-18
| | | | | | | | | | | | | gk20a_vm_alloc_share() fails when the default big page size is requested but ops.mm.set_big_page_size is unset. Rework the logic a bit to allow userspace to explicitly request the default big page size, too. Change-Id: I2a28c6d979fbf1dde5559ce9eb5f1310d232e27f Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/590456 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: GPU characteristics additionsSami Kiminki2015-03-18
| | | | | | | | | | | | | | | | | Add the following info into GPU characteristics: available big page sizes, support indicators for sync fence fds and cycle stats, gpc mask, SM version, SM SPA version and warp count, and IOCTL interface levels. Also, add new IOCTL to fetch TPC masks. Bug 1551769 Bug 1558186 Change-Id: I8a47d882645f29c7bf0c8f74334ebf47240e41de Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/562904 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-17 17:31:34 -0400