| Commit message (Collapse) | Author | Age |
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Copy can_railgate and railgate_delay to struct gk20a at probe time,
and access them from gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: I63d4f4aff7eb17a167775fd7982a1b548bbca3a5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463543
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Use nvgpu_cond for waiting for all channel accesses to finalize
before closing a channel, and for signalling for the same event.
JIRA NVGPU-14
Change-Id: Ifac14ad9afe5c44d4443b4a4a94a4d0ad2ea7053
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1469764
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Remove support for legacy Tegra Clock Framework. gk20a
clocks were implemented only for TCF, so delete that
at the same time, too.
Change-Id: Ia46254f5113aa3ec392bf38b33d288a55b2fb475
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1480213
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Introduce a priv ring HAL and define ISR as the only function in it.
Introduce a gp10b version of the ISR that writes error message to
UART for every priv ring error, and leave the old chips with silent
error handling.
Bug 1846641
Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473696
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Do not enable/disable elpg if platform->can_elpg is false.
Bug 1870556
Change-Id: I82d1fc4efdccc518827a6150fd3c17f6112e2f4a
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1465816
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Since ch_wdt_timeout_ms was moved to gk20a, set debugfs accordingly.
Jira VFND-3796
Change-Id: Id0c69bf5c15fc4efe672348273b24f23fb52aa29
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1478679
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move the function pointer for VPR page allocation to struct gk20a
and use it from there. At the same time remove secure_page_alloc
pointer and add a direct call to it in probe.
Move platform_tegra.h as tegra/linux/platform_gk20a_tegra.h, as it's
only declaring functions defined in platform_gk20a_tegra.c to other
files in the same directory.
JIRA NVGPU-16
Change-Id: I19ac9ee0b2f6734203ae32a1f51d67fd51aced9f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473706
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Begin moving (and renaming) the GMMU code into common/mm/gmmu.c. This
block of code will be responsible for handling the platform/OS
independent GMMU operations.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: Ide761bab75e5d84be3dcb977c4842ae4b3a7c1b3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464083
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Added function pointers to check chip specific valid
gfx class and compute class. Also added function pointer
to update ctx header with preemption buffer pointers.
Bug 200292090
Change-Id: I8119ee082e2abb67186a8ac07088f8db7f410ba1
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1293502
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Modifed code to create debugfs nodes correctly by
moving relevant code from gp10b_tegra_probe() to
gk20a_debug_init().
Bug 200292090
Change-Id: Ib5d0a57d8b600cd30dc2a37794d8208b5c57ccfa
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1476484
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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mark functions local to the file as static
fixing errors in volt and flcn modules.
Bug 200299572
Change-Id: Ibacbd83649fee3066a90694a3df90bb909b24aa5
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1475357
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add these bits in the gpu characteristics flags:
NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING - fast
submits with no in-kernel job tracking are supported.
NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_FULL - deterministic
submits also with job tracking and num_inflight_jobs set are supported.
Either of these may get disabled if the particular channel or submit
still requires features that block these.
Make gk20a_channel_sync_needs_sync_framework() take a gk20a pointer
instead of a channel pointer so that it can be called without a channel.
It does not need any per-channel data.
Bug 200291300
Change-Id: I5f82510b6d39b53bcf6f1006dd83bdd9053963a0
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1456845
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Instead of calling gk20a_gpu_is_virtual() which requires struct
device pointer fill in flag gk20a->is_virtual and use that.
JIRA NVGPU-16
Change-Id: I24382c041ee69940c703ca1ea7f5c667c5731cd1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Use nvgpu_thread for channel worker.
JIRA NVGPU-14
Change-Id: Idcb93d3096de06a1569dc3ea69890745b5805d67
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1472870
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Don't configure zcull setting during golden context
loading. Zcull setting will be configured through
explicit API.
Change-Id: I648aea8a8db9132fc81d61dbbff46edf7bfca6d7
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1474021
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Fix the last place where ptimer_src_freq is accessed directly
from platform structure.
JIRA NVGPU-16
Change-Id: I41b924779e1e639bf585cd96cb8c11de6eeb18bb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473704
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Clock gating list for CE was programmed at GR init, but at that time
CE has not yet been brought out of reset. This causes a priv ring
error and the clock gating setting does not take place. Move
programming of CE clock gating list to CE initialization.
Bug 1846641
Change-Id: Ibc9fe2487408358304f80cd679d3b1ecac7cebe8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473301
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Copy watchdog timeout from platform structure to gk20a and use it
from gk20a.
JIRA NVGPU-16
Change-Id: Iab70253a7f0e1d28f2e3209285b3f4c476ce9279
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473705
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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KASAN reports below slab-out-of-bounds error when accessing
gr->map_tiles since gr->map_tiles is allocated with wrong(small) size.
fixing it by passing correct size to nvgpu_kzalloc.
BUG: KASAN: slab-out-of-bounds in gr_gk20a_init_map_tiles+0x6f0/0x7b0 ...
....
BUG: KASAN: slab-out-of-bounds in gr_gk20a_zcull_init_hw+0x184/0x848 ...
...
BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ...
...
BUG: KASAN: slab-out-of-bounds in gr_gk20a_setup_rop_mapping+0x108/0x1740 ...
Bug 1918671
Change-Id: I667ac80b20a3d8539ed3eaae6e0f98e91f917819
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/1472491
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Change-Id: I210267265fa38777115d5b49cc8f78f2599e3f9e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469458
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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- Assign base address for falcon based on falcon id.
- Init mutex for falcon
- Init ops with NULL
Change-Id: I9efee5c2b15106c7dfc6e55c996f62c7f7b85fc2
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1468452
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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- struct nvgpu_falcon to hold properties of falcon controller
- falcon controller interface layer which establish access
to required falcon controller HAL based on struct nvgpu_falcon member
flcn_id & flcn_base parameter.
- each falcon nvgpu_falcon struct initialized during init
with id, base-address along with other properties at HAL.
- Added defines related to flacon controller.
Change-Id: Ia7777c01ecc542150ddd72f8603b7b4475522b58
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1467523
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gk20a_reset_priv_ring does not help resetting priv ring.
Chip reset is the only way to recover.
Bug 200300756
Change-Id: Ia913d46b0e71cd42e9ce242b2393c50f4d12e002
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1471445
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Bring the declarations visible to where they're defined.
Bug 200299572
Change-Id: I6261433a754ae20fed4dd7fcde15a4bbaacc2249
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1471353
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
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Add new flag support_pmu to struct gk20a at probe time, and access it
from gk20a instead of support_gk20a_pmu() which depends on struct
device *.
JIRA NVGPU-16
Change-Id: I721f1a532e949c98346086abdc2630a8df6eba7b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463546
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This reverts commit 69d7652aaa9cf94873cccae13c7b6f6a4eb224af.
Bug 1918711
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ie28c668729c4956f18e6fa3c820f476d2e4424a4
Reviewed-on: http://git-master/r/1473044
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
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Fix issues related with wrong storage type for
64 bit variables.
(1) Fixed width of HZ_TO_MHZ constant
(2) changed fence_wait timeout to store unsigned
long
bug 200299572
Change-Id: Ie8f2386b738f3aafce75fc2440947e36befac273
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1471611
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Write an error to UART on priv ring error. This uncovers any
accesses to missing registers or illegal accesses to registers.
Bug 1846641
Change-Id: Ic1e5ecadcd95777f2b3f7bd77accf98ddce97282
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294683
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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Copy ptimer_src_freq to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: I92c1b83d6e2305a19eb2cd267b7dd8d97c1fdc44
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463544
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Copy has_syncpts to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: I50329e3a5141a62e6e9828e97ea0747abc1ce1ee
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463545
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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nvgpu is being modularized for kernel-4.4 and newer kernels.
__alloc_fd() can't be used on modules as it is not exported.
So, use a wrapper tegra_fd_alloc() instead of __alloc_fd()
bug 200290850
Change-Id: I0e63307d429774440753698643ba7620c1e1f9f6
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/1469313
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Use struct nvgpu_mem for DMA allocations (and the corresponding
nvgpu_dma_alloc_sys()) instead of custom rolled code. This migrates
away from using linux scatter gather tables directly. Instead this
is hidden in the nvgpu_mem struct. With this change the semaphore.c
code no longer has any direct Linux dependencies.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: I92167c98aac9b413ae87496744dcee051cd60207
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464081
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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Replace a couple of boolean fields in nvgpu_mem with bits in a
bitmap introduced in an earlier patch.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: Iffc31bd629cab9a37e5a4fd13377eb9090353410
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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Move and rename the functions that build sgtables for nvgpu_mems into
the Linux specific DMA code.
One place outside of the Linux code do include the Linux DMA header.
That will be fixed in a subsequent patch.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: Ie43c752b8f998f122af70f7c7eb727af0b0d98df
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464078
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Copy aggressive_sync_destroy* to struct gk20a at probe time, and
access it from gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: I6a1c04d85580cb62ab9a52bae08a0f99fe7cfef9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463542
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Put all debugfs dependencies inside #ifdef CONFIG_DEBUG_FS. This
includes some functions in allocators that were used only for
debugging.
Remove include of linux/debugfs.h on files that do not deal with
debugfs.
linux/debugfs.h implicitly included linux/fs.h, which we relied on.
Add explicit include of linux/fs.h for all files where this is the
case.
Change-Id: I16feffae6b0e3a2edf366075cdc01ade86be06f9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1467897
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Add wrapper header file nvgpu/circ_buf.h.
It #includes <linux/circ_buf.h> in Linux.
JIRA NVGPU-13
Change-Id: I58da6340a6f558cf5678ac6ce91f7fd7fd2dae7e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1466657
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Copy default_pri_timeout to struct gk20a at probe time, and access it
from gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: Ic361e6be59df73d9b627c97fdcff190b00dfe179
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463541
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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CPU timer is inaccurate for short delays, and can produce false
timeouts.
Bug 1903521
Change-Id: I688b5a59489b62cbd59e418d641fd188ecd3b7e0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1467002
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Hide the Linux specific nvgpu_mem fields so that in subsequent patches
core code can instead of using struct sg_table it can use mem_desc.
Routines for accessing system specific fields will be added as needed.
This is the first step in a fairly major overhaul of the GMMU mapping
routines. There are numerous issues with the current design (or lack
there of): massively coupled code, system dependencies, disorganization,
etc.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: I2e7d3ae3a07468cfc17c1c642d28ed1b0952474d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464076
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Set GPC PLL id in Tegra platform probe, to match Tegra SoC.
Bug 1851797
Bug 1867980
Change-Id: Ie6d2625a0009bcb96511aeda8c5af4734cf04929
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1461698
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add wrapper header file nvgpu/hashtable.h.
It #includes <linux/hashtable.h> in Linux.
JIRA NVGPU-13
Change-Id: I88e02ab783ac414990a33d4d64c910644ff38fe6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1465615
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add wrapper header file nvgpu/log2.h.
It #includes <linux/log2.h> in Linux.
JIRA NVGPU-13
Change-Id: Ie434e62f7ef2dce7692b1c2c12b4ad6453f1534a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1464719
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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FECS trace used hrtimer for sleeping between frames. The resolution
does not need to be that high, and hrtimers are not portable, so
replace the delay with nvpgu_usleep_range().
Bug 200290850
Change-Id: I10fc56fcf6f6d407413384d557ae4bfdfa4239ef
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1465761
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
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perfbuf mapping fixes:
- Allocate VM specifically for perfbuf use: using the PMU's
results in mmu faults for larger buffers where 64k pages are used.
- Make 4GB boundary check work for large address spaces
- remove requirement to have allow_all flag set
- track perfbuf ownership and clean up appropriately
Bug 1880196
JIRA EVLR-1074
Change-Id: Ieee4eb17b64acf9b6ede37bf8e6a91892cda4a7e
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1460809
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Copy is_fmodel to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: Ib8d793ea2b02b62da3bfdbb6372d9927658b7ec6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463540
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Copy can_elpg to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: I497f58c17e0be44e3622e49dad2ba44ed78cffbf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463539
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add nvgpu_firmware data structure, and return it instead of Linux
struct firmare from nvgpu_request_firmware. Also add abstraction
for releasing firmware: nvgpu_release_firmware.
JIRA NVGPU-16
Change-Id: I6dae8262957c0d4506f710289e3a43a6c1729fc7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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list_head list in struct priv_cmd_entry is unused
and hence remove it
Jira NVGPU-13
Change-Id: I268998d84a43d2e22fdfae53a9c7795b20fcf93f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1462081
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove linux list includes <linux/list.h>
and include <nvgpu/list.h> since we now use
nvgpu list APIs instead of linux APIs
Jira NVGPU-13
Change-Id: I59bd433a9bc5c15d4c40e6fe4b18cf44246ba3b2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1462080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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