| Commit message (Collapse) | Author | Age |
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Interrupt mask init state is correct, so do not touch it.
Bug 1567274
Change-Id: I70673e406944823bd1cbfeee93ec75ce1e1af5da
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/558292
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Userspace access to gr_pri_bes_crop_hww_esr removed
on Tegra platform.
Remove gr_pri_bes_crop_hww_esr register from gk20a whitelist.
bug 1456562
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: Id9c3f85e39c970182283a0cdbb87ac5b6b83a534
Reviewed-on: http://git-master/r/553636
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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When gk20a_gmmu_map runs out of memory, set the error code before
returning early, so that caller knows about that cde load didn't succeed
and wouldn't use the bad context.
Change-Id: I1e166c78e39f07df941a29fc4e392a853d97a5c6
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/557273
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement support for 64kB large page size. Add an API to create an
address space via IOCTL so that we can accept flags, and assign one
flag for enabling 64kB large page size.
Also adds APIs to set per-context large page size. This is possible
only on Maxwell, so return error if caller tries to set large page
size on Kepler.
Default large page size is still 128kB.
Change-Id: I20b51c8f6d4a984acae8411ace3de9000c78e82f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Merge initialization code from gk20a_init_system_vm(),
gk20a_init_bar1_vm() and gk20a_vm_alloc_share() into gk20a_init_vm().
Remove redundant page size data, and move the page size fields to be
VM specific.
Bug 1558739
Bug 1560370
Change-Id: I4557d9e04d65ccb48fe1f2b116dd1bfa74cae98e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Remove unused symbols in platform file and gk20a.c.
Bug 1558739
Change-Id: If160a75061ecb4ad9cbc4abfb9bc409457299738
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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-Moved bind fecs from work queue to init_gr_support.
-It makes all CPU->FECS communication to happen before
booting PMU, and after we boot PMU, only PMU talks to
FECS. So it removes possibility to race between CPU
and PMU talking to FECS.
Bug 200032923
Change-Id: I01d6d7f61f5e3c0e788d9d77fcabe5a91fe86c84
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/559733
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Fixed sparse non static symbol warning by making the following symbol 'static':
- to_gk20a_sync_pt
- to_gk20a_timeline
Bug 200032218
Change-Id: Ie0310116aa1500ae8e4838b8a9ad4943a61cfc24
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/552052
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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gk20a_vm_map_buffer() used to ignore silently map requests for
non-dmabuf fd:s. Fix this by returning the error code from
dma_buf_get().
Bug 1566862
Change-Id: If01b03f43b67b17d9fb997d914db871520f50c6e
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
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gpu rail gating reference count is going wrong because
"can_railgate" is set to false during probe(). For rail-gating
to work no gpu re-work is needed and by default rail-gating
is enabled with INT_MAX delay.
Bug 200044987
Change-Id: I9367275cd18c34cb19a51193353585789ba44c03
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/556568
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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bug 200040021
bug 200032923
Change-Id: I5aa7f4efb1b675e9a3faaf73a80452e55cded89e
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Change-Id: Ic162902bd2f05abab9ebd37392ed56dc4c164ba8
Reviewed-on: http://git-master/r/539995
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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When validating buffers to be mapped, check that the buffer end does not
overflow over the virtual address node space.
Bug 1562361
Change-Id: I3c78ec7380584ae55f1e6bf576f524abee846ddd
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
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-Change cde_buf to use writecombined cpu mapping.
-Since reading writecombined cpu data is still slow, avoid reads in
gk20a_replace_data by checking whether a patch overwrites a whole
word.
-Remove unused distinction between src and dst buffers in cde_convert.
-Remove cde debug dump code as it causes a perf hit.
Bug 1546619
Change-Id: Ibd45d9c3a3dd3936184c2a2a0ba29e919569b328
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/553233
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>
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Using KEPLER_C for doing sync point increment has side effects.
It adds a SetObject method, which changes channel state that not all
user space accounts for.
Bug 1462255
Bug 1497928
Bug 1559462
Change-Id: I5c422ad8ca94fba15cad9bd232f7a10d94aa0973
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/554478
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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GK20A PMU is not supported in GPU client for virtualization. However,
to make native case and virtualization case can share same defconfig and
kernel image, we need to enable CONFIG_GK20A_PMU and
CONFIG_GK20A_DEVFREQ in defconfig. This commit changes to detect if we
should disable GK20A PMU support in run time.
Bug 200041597
Change-Id: I292c647303ed57af6faa1c5671037ca27b48e31e
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/553653
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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bug 200040021
polling halt irq to check for hs bin completion
keep irqs disabled to avoid executing irq handler
Change-Id: Ic245d89580444dcbf1cf5ec34bfe0f8b0c5bbc0f
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/554659
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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When initializing fifo, we ignore several error conditions. Add
checks for them.
Change-Id: Id67f3ea51e3d4444b61a3be19553a5541b1d1e3a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/553269
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If engine status is in context switch in the fifo mmu fault handler,
dump falcon stats and gr stats for each engine.
Bug 1544766
Change-Id: Idfa9772b7e67072941144ac3bdd73e791fdc2b23
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/553205
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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old value is for 1 SMs so on gm20b with 2 SMs it resulted in half zcull coverage
bug 1553171
Change-Id: I269f9a333a059b2ef533672df63ccaa90b2d00c7
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: http://git-master/r/500517
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Modify GPU detection in 3demc-bw-ratio to use the SOC Id.
Bug 1364894
Change-Id: If52e8c5153e76b29d67d28c52303b095df2e8bf0
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/542770
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement empty or -ENOSYS functions for vgpu if
CONFIG_TEGRA_GR_VIRTUALIZATION is not enabled, and remove ifdefs around
the calling code.
Change-Id: Idc75c9bc486d661786bc222bd9e0380aa7766e78
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/552898
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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bug 200042729
Change-Id: Ic4b4fa4c25f4017a69355e7f03a3f25d4ce92cff
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/552554
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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At this stage, ctxsw is always in reset state, because we're powering GPU
up, or we have reset the whole GR partition. Remove the code to invoke a
second reset.
Fix waiting for FE idle. We should wait after each bundle, and break if any
iteration fails.
Change-Id: I0846f67c6d860a485dea62ff870deafe55a47365
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/552799
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The return value of gk20a_busy must be checked since it may not succeed
in some cases. Add the __must_check attribute that generates a compiler
warning for code that does not read the return value and fix all uses of
the function to take error cases into account.
Bug 200040921
Change-Id: Ibc2b119985fa230324c88026fe94fc5f1894fe4f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542552
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Enable Adaptive Engine Level Power Gating power
feature for gm20b.
Bug 1552466
Change-Id: I2659f80a567699eff64307800710d4978d02adc1
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/501343
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
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Expose a debugfs entry pmu_security. It allows checking if PMU was
booted in secure or non-secure mode.
Change-Id: Iea584b696440779bee0900edccabd4e5b2997805
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/552456
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Move nvgpu ioctls from the many user space interface headers to a new
single nvgpu.h header under include/uapi. No new code or replaced names
are introduced; this change only moves the definitions and changes
include directives accordingly.
Bug 1434573
Change-Id: I4d02415148e437a4e3edad221e08785fac377e91
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542651
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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To help remove the nvhost dependency from nvgpu, rename ioctl defines
and structures used by nvgpu such that nvhost is replaced by nvgpu.
Duplicate some structures as needed.
Update header guards and such accordingly.
Change-Id: Ifc3a867713072bae70256502735583ab38381877
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542620
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Proper error number for invalid request number is EINVAL instead of
EFAULT, so change it in ioctl calls.
Change-Id: I8fddd34e012700550e9e30fe17ba7152b3a0417b
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542563
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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check gk20a_busy return value in cde converter code paths.
Bug 200040921
Change-Id: Ibad36df5877e325636a0a6ccc30c0d3d076ca941
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/540006
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Change CDE swizzling shader kernel size to 8x8 to avoid waste with
relatively small surfaces.
Map compbit backing store and destination surface as cacheable.
Clean up kernel size calculation.
Bug 1546619
Change-Id: Ie97c019b4137d2f2230da6ba3034387b1ab1468a
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/501158
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>
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Added basic support for GM20b GPCPLL noise-aware(NA) mode. In this
mode PLL internal DVFS mechanism is engaged, and output frequency is
scaled with voltage automatically. The scaling coefficients in this
commit are preliminary, pending characterization.
If NA mode is enabled, any frequency change is done under PLL bypass,
with no dynamic ramp allowed.
This commit kept NA mode disabled.
Bug 1555318
Change-Id: I8d96a10006155635797331bae522fb048d3dc4a0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/499488
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Channel gpfifo cannot be submitted if the channel has no vm, so add a
check for it and bail out if no as is bound. Clean up other similar
checks too.
Change-Id: Ibb0fe08e44e34bbaaa00ebd02dce6cc4d93ca5d9
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/538887
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add debug events for measuring the duration of gk20a channel open and
channel ioctl calls.
Bug 200035111
Change-Id: Ib4837c745e73ee1690814d60bdca021821567153
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/538768
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Unlock mutex upon queue full then return -EAGAIN.
Bug 1551294
Change-Id: I2a06a99028f98e6602a4cc27d15015bfe1db4eda
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/501235
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Tested-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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nvhost_sync_create_fence returns ERR_PTRs instead of NULLs on error;
check for its errors with IS_ERR.
Change-Id: I9752e0d8fa703b2872918b23721ae973be58bf35
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/533794
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
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Retrieve channel count from gm20b specific header instead of the
gk20a header. This increases channel count from 128 to 512.
Change-Id: I96d4887432852795f7f526e33f0d3d2458f3af0e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/500623
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Change loglevel of text for invalid ioctl to dbg.
Bug 20038780
Change-Id: I0a2ba97d9c21b2225f8d3db59c80b70c2f2c679e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/501171
GVS: Gerrit_Virtual_Submit
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Allocate four channels for cde jobs.
Bug 1546619
Change-Id: Id2637f71426f42c2d553d38cd74873b9f0628b55
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/499671
Reviewed-by: Jussi Rasanen <jrasanen@nvidia.com>
Tested-by: Jussi Rasanen <jrasanen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Fix calculation of the debug buffer address.
Bug 1551221
Change-Id: I8d7921070549a1689dba0675d83bfdbf76ba5193
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/500705
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Riku Salminen <rsalminen@nvidia.com>
Tested-by: Riku Salminen <rsalminen@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Boards require a rework to make railgating and DVFS work realiably.
The information whether the board has been reworked or not will be
available on DTS.
This patch adds a DTS check to the GPU driver initialisation. If the
rework information is not available (or the rework has been marked as
disabled), railgating and DVFS are disabled.
Bug 1555485
Change-Id: Ie86fe35fb94377403472faffcbcaec645b6e40d9
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/500218
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Invalid method needs to be cleared in gm20b to prevent getting same
interrupt again.
Change-Id: I4d83d1a27e5c711b5d82b95552be84d5f16a13e0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/500286
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Restrict reading of FE object table to the number of entries
available.
Change-Id: I11275ecd14e53f0b763d00d65042adb4b1e8ae6f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/449306
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Runlist event is not sent in gm20b for updated runlist. Polling is
the preferred way also for gk20a.
Bug 1555239
Change-Id: I60de084db69f848f63451f1f3078f183ca51ba50
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/500241
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Add poll interface and control ioctls for waiting for GPU job completion
via semaphores.
Poll on a gk20a channel file waits for events from pending semaphore
interrupts (stalling) of that channel. New ioctls enable and disable the
events, and clear a single interrupt event so that next poll doesn't
wake up for it again.
Bug 1528781
Change-Id: I5c6238966b5d0900c8ab263c6a7f8f2611901f33
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/497750
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Expose supported nvgpu ioctls to userspace via bits in the flags field
of nvhost_gpu_characteristics; currently define two bits for special
memory allocation support.
Bug 1539747
Change-Id: I1bc9333b12825d07a00b7a4136ae9d35816a5855
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/495942
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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If allow_all is set, skip regops address validation.
Change-Id: I42d6c9f1a5d2c8d9bc6783adff5f6048c45350f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/499221
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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L2 bypass registers have moved in gm20b. Move the code to
ltc_common.c, which gets compiled once per chip version.
Change-Id: I0ab4dd03c78b8ad8abc7a7b18c094b6002827587
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/499220
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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Enable Engine Level Power Gating power
feature for gm20b.
Bug 1552466
Change-Id: Ief9cf648270412f7a9f6f5b28a1fce08effdd670
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/499541
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Enable Second Level Clock Gating power
feature for gm20b.
Bug 1552466
Change-Id: I34a3d93a98f7b784ab26fb7940d50db262b35f57
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/499540
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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