| Commit message (Collapse) | Author | Age |
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- For interrupt context, use nvgpu_udelay()
instead of nvgpu_usleep_range()
- Use while loop instead of do while loop for polling
as this will help minimize overall delay
Bug 200350539
Change-Id: Icc05911082877df7f9e807da8f16e4d54e620cd8
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573303
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Change license of OS independent source code files to MIT.
JIRA NVGPU-218
Change-Id: I1474065f4b552112786974a16cdf076c5179540e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
priv_ring sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I9ebf27619f771262e5dc398b1200d6c19d6aef16
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514102
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Begin removing all of the myriad flag variables in struct gk20a and
replace that with one API that checks for flags being enabled or
disabled. The API is as follows:
bool nvgpu_is_enabled(struct gk20a *g, int flag);
bool __nvgpu_set_enabled(struct gk20a *g, int flag, bool state);
These APIs allow many of the gk20a flags to be replaced by defines.
This makes flag usage consistent and saves a small amount of memory in
struct gk20a. Also it makes struct gk20a easier to read since there's
less clutter scattered through out.
JIRA NVGPU-84
Change-Id: I6525cecbe97c4e8379e5f53e29ef0b4dbd1a7fc2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1488049
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Introduce a priv ring HAL and define ISR as the only function in it.
Introduce a gp10b version of the ISR that writes error message to
UART for every priv ring error, and leave the old chips with silent
error handling.
Bug 1846641
Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473696
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gk20a_reset_priv_ring does not help resetting priv ring.
Chip reset is the only way to recover.
Bug 200300756
Change-Id: Ia913d46b0e71cd42e9ce242b2393c50f4d12e002
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1471445
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This reverts commit 69d7652aaa9cf94873cccae13c7b6f6a4eb224af.
Bug 1918711
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ie28c668729c4956f18e6fa3c820f476d2e4424a4
Reviewed-on: http://git-master/r/1473044
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
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Write an error to UART on priv ring error. This uncovers any
accesses to missing registers or illegal accesses to registers.
Bug 1846641
Change-Id: Ic1e5ecadcd95777f2b3f7bd77accf98ddce97282
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294683
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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Copy is_fmodel to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.
JIRA NVGPU-16
Change-Id: Ib8d793ea2b02b62da3bfdbb6372d9927658b7ec6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463540
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Use platform agnostic delay functions instead of Linux kernel APIs.
This allows removing dependency to Linux header linux/delay.h. At the
same time remove #include lines for other unused Linux headers.
JIRA NVGPU-16
Change-Id: I46b9ccb80e0b67efb86ec85676e5a55ff835c0ec
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460113
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.
JIRA NVGPU-16
Change-Id: Ia51f36d94c5ce57a5a0ab83b3c83a6bce09e2d5c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1331694
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Clean up gk20a.c by removing direct accesses to MC and moving the
accesses to happen via MC HAL.
The chip detection logic has to violate the HAL and call gk20a
version directly, because HAL ops cannot be set up before chip has
been identified.
Change-Id: I4cdd0ef3fcf7d3b561a3fca4247a8356fe8d18e1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1321576
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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This reverts commit 35f0cf0efefe4a64ee25a5b118338b15e552dcb0 as
it caused lp0 suspend/resume failure.
Bug 1886110
Change-Id: Ib62207650344180361b6529f716f77b84528cd56
Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-on: http://git-master/r/1317986
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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-Handle pbus and priv stall interrupts first.
In general critical interrupts should be
handled before any other non critical ones.
-Dump info enabled with gpu_dbg_intr if priv_ring
interrupt is flagged by fmodel.
JIRA NVGPU-25
Change-Id: Iee767d8c9c933ceb57532c1b5a7fd7812daf1b6d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1311273
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Use hardware headers instead of hardcoded register numbers in priv
ring. This required updating the priv ring headers to add all the
registers and fields needed.
Incidentally this also gets rid of a lot of GPC priv ring registers
as they're not used in our code.
Also delete duplicate prints for the same information. We were
dumping GPC error also in gk20a_pbus_isr(), and we dumped master
information twice.
Dump status of each GPC separately instead of supporting only GPC0.
Change-Id: Ic50817ecc50892618fa27947fa83b05148b2cd6a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1295481
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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We did not follow the proper sequence to reset priv ring on error.
Instead we just re-enabled priv ring, which does not reset anything.
Rename the gk20a_reset_priv_ring() to gk20a_enable_priv_ring() to
indicate its proper use. Add another gk20a_reset_priv_ring() which
actually resets priv ring properly.
Change-Id: Ied74465b1215daa447a565b7e9cafef7fbe67d1b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294681
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Reorganize the HW headers of gk20a. The headers are moved to a
new directory:
include/nvgpu/hw/gk20a
And from the code are included like so:
#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h>
This is the first step in reorganizing all of the HW headers for
gm20b, gm206, etc. This is part of a larger effort to re-structure
and make the driver more readable and scalable.
Bug 1799159
Change-Id: Ic151155cbc2e6f75009f2d9d597b364a1bed2c4c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1244790
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Move ELCG parameter programming to a new function in therm,
elcg_init_idle_filter. Implement gk20a variant and use it for gk20a
and gm20b.
JIRA DNVGPU-74
Change-Id: I8ef400f3a6195311fb9e7da8db6c34993d62f461
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1220433
(cherry picked from commit f6654ae4d83d31cd40b317bf55922964bbfa575d)
Reviewed-on: http://git-master/r/1239421
GVS: Gerrit_Virtual_Submit
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is_fmodel flag will be set in gk20a_probe().
Updated code for is_fmodel check, instead of
check for supported simulated platforms.
Bug 1735760
Change-Id: I7cbac2196130fe5ce4c1a910504879e6948c13da
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1177869
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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During gpu init, therm gate control is required to
add delay cycles before clock gating.
Bug 1717152
Change-Id: Ifabc428cf7b49e49964dc994eba2c38af4aa1a91
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/936443
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Priv ring does not need to be reset from PMC at GPU boot.
Change-Id: I166472a97246b40b69bce61ffca62bde85e4e0e7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/794406
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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Clock bypass divider was changed just before resetting priv ring.
Move the code to a new clk op instead so that it is executed only on
gk20a.
Change-Id: Ic8084a4a5fac23770f50b50f910ced2543ba0f28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/764970
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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This reverts commit 259842f9d222dd2ca2e66bddaceef4a2fd626bc7.
The commit clears some init values that are never restored.
Change-Id: I4efee115863cbfb08b2e280a58b525cb49adc0b6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/732428
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Spew debug lines in case we get a priv ring error.
Change-Id: Iba46813a355b5d2d192614a9e146397688e130a7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/660850
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Bug 200066741
As we are just getting out of reset and this reg is not
written before, so we dont stand the risk of loosing
any data
Change-Id: Ifc1bcaa3c224038e4e2a47882a4523f7633cb660
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/715652
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Regenerate clock gating lists. Add new blocks, and takes them into
use. Also moves some clock gating settings to be applied at the
earliest possible moment right after reset.
Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457698
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This patch moves the NVIDIA GPU driver to a new location.
Bug 1482562
Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383722
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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