summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
Commit message (Collapse)AuthorAge
* nvgpu: Host side changes to support HS modeSupriya2015-03-18
| | | | | | | | | | | | | | | | | | | GM20B changes in PMU boot sequence to support booting in HS mode and LS mode Bug 1509680 Change-Id: I2832eda0efe17dd5e3a8f11dd06e7d4da267be70 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/423140 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Rewrite PMU boot-up sequenceTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Rewrite PMU boot sequence as a state machine. At PMU power-up send initial messages, and reset state machine. At each reply from PMU, do the next stage of PMU boot and set state. As now PMU and FECS boot are independent, we need to ensure engine idle before saving ZBC. Change-Id: I1ea747ab794ef08f1784eeabfdae7655d585ff21 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410205
* gpu: nvgpu: update gpmu supported versionsSeshendra Gadagottu2015-03-18
| | | | | | | | | | | | | Updated gmpu ucode versions supported for gm20b. Bug 1514021 Change-Id: If9cbde60449f5cc2b9c39c36ab5c79985d320bf8 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/418479 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Initialize FECS explicitly on recoveryTerje Bergstrom2015-03-18
| | | | | | | | | Instead of calling second phase of PMU boot sequence, initialize FECS directly. Change-Id: I7f9de0c5ec42049033839d244979f3f3daabf317 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410204
* gpu: nvgpu: Remove deferred ELPG enableTerje Bergstrom2015-03-18
| | | | | | | | | | | Prevent the disable ELPG routine from calling deferred re enablement of ELPG. Remove code related to deferred ELPG enable.. Change-Id: I9401e6e0f26a4e332e50eb38439e2ef6fcb4225d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410203 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: Add PMU sent/recvd messages to dbg logTerje Bergstrom2015-03-18
| | | | | | | | | Add debug log entries for received and sent PMU messages. Change-Id: I94cecca76257d74785c13f1c5f97a7233361019f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410202 Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: Always initialize system vmTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | PMU, FECS and GPCCS use the same address space. We used to initialize the address space only if PMU is enabled. Create the system address space always. FECS and GPCCS used to have slower bit bang and faster DMA method for loading ucode. Slower method is needed when FECS and GPCCS do not have an address space. Remove the slower method as not anymore needed. Change-Id: I155619741ecc36aa6bf13a9c1ccb03c7c1330f0a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406771
* gpu: nvgpu: Do not realloc perfmon sample bufferTerje Bergstrom2015-03-18
| | | | | | | | | | | | Allocate perfmon sample buffer only once. Bug 1512840 Change-Id: I3f2a62b0fa28e6ba984ae3068a1d56ba461a0c29 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408180 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Thomas Cherry <tcherry@nvidia.com>
* gpu: nvgpu: Do not clear PMU state on rail gateTerje Bergstrom2015-03-18
| | | | | | | | | When rail gating, we cleared all PMU status. Clear only the relevant fields. Change-Id: I5b4e8d74339aae6f1c6b945f45b8378bb563e8be Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406843
* gpu: nvgpu: gk20a: Update perfmon initPrashant Malani2015-03-18
| | | | | | | | | | | | | | | | | Make the perfmon sampling configurable, by adding an 'enabled' flag. This is set according to the CONFIG initially. Modify the perfmon event handler to not touch clock rates. Add a counter to count the number of perfmon events. Also add debugfs entries for the above. Bug 1410515 Change-Id: Ic8197eef0e46e35af1179a5b06140393541cfd43 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/351564 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix return value in pmu mutex releaseArto Merilainen2015-03-18
| | | | | | | | | | | | Bug 1495617 Change-Id: I689ed4303bb3959bb24bf79d52891de28431fc67 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/394904 (cherry-picked from commit a04c51430b186d23953960965ce3ab229968d1f7) Reviewed-on: http://git-master/r/399565 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: minor fixesKen Adams2015-03-18
| | | | | | | | | fixes one use of unitialized var renames a register to make it match dev_* file. Change-Id: Iafba659bbf2df509e0b494b2c5dab3819bf650ef Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/394792
* gpu: nvgpu: Do not dump top_fs_statusTerje Bergstrom2015-03-18
| | | | | | | | | Result of top_fs_status_r() is always constant. Do not dump it anymore. Change-Id: Ie1cfe872d70b2c3c8a7cef4df3870dacae8f8793 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/395208
* gpu: nvgpu: Remove redundant locked variableArto Merilainen2015-03-18
| | | | | | | | | | | | | | | | Queue locked variable holds entirely redundant information about the queue status and having the variable causes a race between lock() and unlock() functions. This patch removes the locked variable. Bug 1495617 Change-Id: I05682bfe7a23acc77c2bfe405938ace7d2b3d081 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/393431 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Prashant Malani <pmalani@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: reorder init save zbcPrashant Malani2015-03-18
| | | | | | | | | | | | | | | During the ELPG initialization routine, ELPG should be explicitly disabled before we save the zbc table. This ensures that even if there is a preemption from some other thread that calls ELPG enable/disable, the ref counting will ensure that ELPG remains disabled. Bug 1490085 Change-Id: Ie8eeaf48dda4e7f810aa26926facf63753e86abe Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/382273 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: Add NVIDIA GPU DriverArto Merilainen2015-03-18
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-23 03:43:51 -0400