summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/pmu_api.h
Commit message (Collapse)AuthorAge
* gpu: nvgpu: Delete PMU fecs override interfaceMahantesh Kumbar2017-02-09
| | | | | | | | | | | | | | | | | | Deleted PMU fecs override interface from pmu_api.h header file as feature not used anymore & its dependent code too. Deleted file pmu_api.h as file dont have any interfaces left inside Jira NVGPU-19 Change-Id: I490cf67ae60ce2f1de37da063199ee04835b940d Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1297370 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: PMU ACR interface header reorgMahantesh Kumbar2017-02-09
| | | | | | | | | | | | | | | | | Moved ACR interface from pmu_api.h to gpmuif_acr.h header file gpmuif_acr.h - PMU Command/Message Interfaces for Access Control Region (ACR) Jira NVGPU-19 Change-Id: Ic37ff3f4ca069aa4bdd6729bbfccc00e15185b02 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1297369 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: PMU perfmon interface header reorgMahantesh Kumbar2017-02-09
| | | | | | | | | | | | | | | | | | Moved perfmon interface from pmu_api.h & pmu_gk20a.h to gpmuif_perfmon.h header files gpmuif_perfmon.h - PMU Command/Message Interfaces PERFMON Jira NVGPU-19 Change-Id: I983f89f0f6ec3b889d975178fb1405f166b7d1b9 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1297262 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: PMU PG interface headers reorgMahantesh Kumbar2017-02-09
| | | | | | | | | | | | | | | | | | | | | Moved Power Gating (PG) interface from pmu_api.h & pmu_gk20a.h to gpmuif_ap/pg header files. gpmuif_pg.h - PMU Command/Message Interfaces for power gating (PG) gpmuif_ap.h - PMU Command/Message Interfaces for Adaptive Power Jira NVGPU-19 Change-Id: I1eeee78bdf89d894f9a4731435cdb121f73b1e0f Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1297203 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Falcon-controller interface updateMahantesh Kumbar2017-02-08
| | | | | | | | | | | | | | | Moved falcon-controller common interface code from pmu_common.h to flcnif_cmn.h file. Interfaces are common for falcons irrespective of F/W on falcon controllers Jira NVGPU-19 Change-Id: Iad11b2fade8cf6716888773b2b1c23919cbcc07b Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1296695 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: MSCG supportMahantesh Kumbar2016-12-26
| | | | | | | | | | | | | | | | | | | | | | | | | - Added enable_mscg, mscg_enabled & mscg_stat flags, mscg_enabled flag can be used to controll mscg enable/disable at runtime along with mscg_stat flag. - Added defines & interface to support ms/mclk-change/post-init-param - Added defines for lpwr tables read from vbios. - HAL to support post init param which is require to setup clockgating interface in PMU & interfaces used during mscg state machine. - gk20a_pmu_pg_global_enable() can be called when pg support required to enable/disable, this also checks & wait if pstate switch is in progress till it complets - pg_mutex to protect PG-RPPG/MSCG enable/disable JIRA DNVGPU-71 Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1247554 (cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a) Reviewed-on: http://git-master/r/1270971 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: rppg supportMahantesh Kumbar2016-12-26
| | | | | | | | | | | | | | | Add defines and interface structures used for sending PMU messages to control RPPG. JIRA DNVGPU-71 Change-Id: Ibec975f3c976619542d8f088b24271796a03f03c Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1247487 (cherry picked from commit dd3826abca0a51d473d5d9cb25dc84cada9e7878) Reviewed-on: http://git-master/r/1270793 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add dGPU clocks supportVijayakumar Subbu2016-09-29
| | | | | | | | | | | | | JIRA DNVGPU-45 Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1205849 (cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126) Reviewed-on: http://git-master/r/1227256 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* gpu: nvgpu: refactor pmu includeVijayakumar Subbu2016-09-08
split pmu include files to add lot more APIs pmu_api.h - all the current APIs used in igpu pmu_common.h - common defines for all APIs pmu_gk20a.h - SW defines specific needed for nvgpu like PMU version, PMU SW structure definition etc. Splitting APIs to separate files allows us to use auto generated PMU task headers from RM We have script which generates pmu interface herader files in linux format. It replaces RM with NV. Adding typedef in existing pmu code make auto generated files easy to compile/add JIRA DNVGPU-85 Change-Id: I851b88769fe8d60561a44754ddb7dde45b45959e Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/1192702 Reviewed-on: http://git-master/r/1203124 (cherry picked from commit 0fe5f020c3f934cf2cc5336f1b6c3bafaf9e0c2a) Reviewed-on: http://git-master/r/1217301 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>