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* gpu: nvgpu: Use old ctxsw boot method on gm20bTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Boot FECS/GPCCS with old method on gm20b. We don't yet have bootloader for it. Change-Id: I09046960cd86b0402d3ea2cd8e4c92597766fa10 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/412604 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
* gpu: nvgpu: Prune redundant cache maintenanceTerje Bergstrom2015-03-18
| | | | | | | | | | | | Remove redundant cache maintenance operations. Instance blocks and graphics context buffers are uncached, so they do not need any cache maintenance. Bug 1421824 Change-Id: Ie0be67bf0be493d9ec9e6f8226f2f9359cba9f54 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406948
* gpu: nvgpu: Always initialize system vmTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | PMU, FECS and GPCCS use the same address space. We used to initialize the address space only if PMU is enabled. Create the system address space always. FECS and GPCCS used to have slower bit bang and faster DMA method for loading ucode. Slower method is needed when FECS and GPCCS do not have an address space. Remove the slower method as not anymore needed. Change-Id: I155619741ecc36aa6bf13a9c1ccb03c7c1330f0a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406771
* gpu: nvgpu: gk20a: minor fixesKen Adams2015-03-18
| | | | | | | | | fixes one use of unitialized var renames a register to make it match dev_* file. Change-Id: Iafba659bbf2df509e0b494b2c5dab3819bf650ef Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/394792
* gpu: nvgpu: Do not wait for FE idle on linsimTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Waiting for FE idle hangs on simulation, so skip it. Change-Id: I4f49eab725fcf2eb0b8340040a79731e16a1a0a0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/394053 Reviewed-on: http://git-master/r/396374 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: gm20b: Implement gr opsTerje Bergstrom2015-03-18
| | | | | | | | | | | Implement gm20b specific gr ops. Bug 1387211 Change-Id: I4523311f1c155ba2d3403dcf222769f6817b2450 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/362415 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
* video: tegra: host: gk20a: add class perf settingsRandy Spurlock2015-03-18
| | | | | | | | | | | | | | | | | Add a place to edit context-switched perf settings based upon class. Disable tex-lock as the first of such for compute. Bug 1409041 Change-Id: I5317a2a2e5f855661a1400b42f69211d16ae0c1d Signed-off-by: Randy Spurlock <rspurlock@nvidia.com> Reviewed-on: http://git-master/r/405908 (cherry picked from commit 250e149be35ecb8893dcef053ec44ffea86c302a) Reviewed-on: http://git-master/r/407094 (cherry picked from commit 54337c08cbf6c2c6b5c929c1be24e87165d9d946) Reviewed-on: http://git-master/r/408837 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
* gpu: nvgpu: gk20a: add fecs error intr handlerDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | Add handler gk20a_gr_handle_fecs_error() in case we have pending fecs error interrupt And clear this interrupt after handling. Also, in gk20a_gr_handle_fecs_error(), for now just print the contents of NV_PGRAPH_FECS_INTR and clear it Bug 1495957 Change-Id: Ie7f70c84ec76ab698141646cd683584c4501e3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/402874 (cherry picked from commit a29f219c57d65a06f6dae8086f19fa1af94d95bd) Reviewed-on: http://git-master/r/403587 (cherry picked from commit e65ebebd0d4d5c3dbb6fa454dd51c383ea13d715) Reviewed-on: http://git-master/r/411160 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* video: tegra: gk20a: Disable gfx before save zbcSantosh Katvate2015-03-18
| | | | | | | | | | | | | | | | | | | This change disables gr engine before calling into pmu for saving zbc and re-enables once it is finished. Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE happens because of active concurrent memory traffic. Bug 1489850 Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/398398 GVS: Gerrit_Virtual_Submit (cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6) Reviewed-on: http://git-master/r/402779 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: Make trigger mmu fault GPU specificTerje Bergstrom2015-03-18
| | | | | | | | | | | Add abstraction for triggering fake MMU fault, and a gk20a implementation. Also adds recovery to FE hardware warning exception to make testing easier. Bug 1495967 Change-Id: I6703cff37900a4c4592023423f9c0b31a8928db2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: fix the bundle corruptionKevin Huang2015-03-18
| | | | | | | | | | | | | | Wait for FE idle between SW bundles. Bug 1477234 Bug 1486347 Bug 1485069 Change-Id: I5181b1240fff73cfecd07aa3e54076cde800ea00 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/391591 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add NVIDIA GPU DriverArto Merilainen2015-03-18
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-12 20:11:52 -0400