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path: root/drivers/gpu/nvgpu/gk20a/gk20a.h
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* gpu: nvgpu: add kernel APIs for TSG supportDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | Add support to create/destroy TSGs using node "/dev/nvhost-tsg-gpu" Provide below IOCTLs to bind/unbind channels to/from TSGs : NVGPU_TSG_IOCTL_BIND_CHANNEL NVGPU_TSG_IOCTL_UNBIND_CHANNEL Bug 1470692 Change-Id: Iaf9f16a522379eb943906624548f8d28fc6d4486 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/416610
* gpu: nvgpu: add explicit wmb() before reg writeDeepak Nibade2015-03-18
| | | | | | | | | | | | | | Add explict memory barrier wmb() before writing to register values. Also call writel_relaxed() instead of writel() to skip internal wmb() call which is conditional on some configs. Bug 200012037 Change-Id: I9c545138314b6e73fec2a4aff2b1956444fac806 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421463 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
* nvgpu: Host side changes to support HS modeSupriya2015-03-18
| | | | | | | | | | | | | | | | | | | GM20B changes in PMU boot sequence to support booting in HS mode and LS mode Bug 1509680 Change-Id: I2832eda0efe17dd5e3a8f11dd06e7d4da267be70 Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/423140 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Implement L2 flush in fifo recoveryAlex Waterman2015-03-18
| | | | | | | | | | | | | Implement a full L2 flush (clean and invalidate) for gm20b in the fifo recovery path. Bug 1512176 Change-Id: Ibf89ede9cca65a6868ebff89825869053302a007 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/416435 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Reload ZBC values on rail gate exitTerje Bergstrom2015-03-18
| | | | | | | | | | | When exiting rail gate, we reloaded default ZBC values. The correct behavior is to reload the values. Bug 1447255 Change-Id: I7aad3586dda91a91a3629062a27001af281b955e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/418346
* gpu: nvgpu: gm20b: fix compression sharingKevin Huang2015-03-18
| | | | | | | | | | | | | | | | For GM20B alone, the LTC count is already accounted for the HW logic for the CBC base calculation from the postDivide address. So SW doesn't have to explicity divide it by the LTC count in the postDivide address calculation. Bug 1477079 Change-Id: I558bbe66bbcfb7edfa21210d0dc22c6170149260 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/414264 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add generic api for sparse memoryKevin Huang2015-03-18
| | | | | | | Bug 1442531 Change-Id: I97408b54e27f5ed6411792e73f079a6f86cbe5f6 Signed-off-by: Kevin Huang <kevinh@nvidia.com>
* gpu: nvgpu: sysfs to put gpu into idleDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | - Add a sysfs "force_idle" to forcibly idle the GPU - read on this sysfs will return the current status 0 : not in idle (running) 1 : in forced idle state "echo 1 > force_idle" will force the gpu into idle "echo 0 > force_idle" will cause the gpu to resume Bug 1376916 Bug 1487804 Change-Id: I48dfd52e0d14561220bc4baea0776d1bdfaa7ea5 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: Add gm20b fecs/gpccs bootloader supportTerje Bergstrom2015-03-18
| | | | | | | | | Add support for booting FECS and GPCCS via faster bootloader method. We leave this disabled until the bootloader binaries are checked in. Change-Id: I39df5d116f7a33486407518c743638b01923970d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/413005
* gpu: nvgpu: gk20a: add busy lockDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | - add rw_semaphore busy_lock for gpu busy() path - take read lock on busy_lock inside gk20a_busy() so that all usual requests can execute simultaneously - write lock can be taken when we need to block all of the gk20a_busy() calls Bug 1487804 Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/412060 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407006 (cherry picked from commit 009812b3e510518740e9c7e89b8b8b80439fe26a) Reviewed-on: http://git-master/r/408013 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: halize ltc isrKevin Huang2015-03-18
| | | | | | | | | | Bug 1507804 Change-Id: I3cca0e83dbf911c94422f8bb0b2df675a170b990 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/403213 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* Revert "gpu: nvgpu: Keep host1x on when GPU on"Matt Pedro2015-03-18
| | | | | | | | | | | This reverts commit 20d48a759b032116e3092e1df76518065da59879. Change-Id: I93718a314b70ee9284a83ca69964883e670ad78d Signed-off-by: Matt Pedro <mapedro@nvidia.com> Reviewed-on: http://git-master/r/407969 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Get host1x device from DTSArto Merilainen2015-03-18
| | | | | | | | | | | | | | | Currently the gpu driver assumes that the GPU is a child of host1x. This is an invalid assumption and therefore we need to get the host1x device from device tree based on nvidia,host1x property. Bug 1311528 Bug 1434573 Change-Id: I097e39369aaa15ab6652cd23f353f88f7c2b9c48 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/395664 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: GM20B characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | This patch adds initial support for GM20B for GPU characteristics IOCTL. Bug 1392902 Change-Id: I55bfb7e087244eae1462d44319bd91c7c0901c2e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/359227 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407543 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Request irq at probeTerje Bergstrom2015-03-18
| | | | | | | | | | Request irq at probe instead of at poweron. This allows investigating interrupt numbers across rail gating cycles. Change-Id: I6db4b3f1d865c6fbbd9d6a96c3df89617e169891 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/374859
* gpu: nvgpu: Make trigger mmu fault GPU specificTerje Bergstrom2015-03-18
| | | | | | | | | | | Add abstraction for triggering fake MMU fault, and a gk20a implementation. Also adds recovery to FE hardware warning exception to make testing easier. Bug 1495967 Change-Id: I6703cff37900a4c4592023423f9c0b31a8928db2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add CBC clean and invalidateArto Merilainen2015-03-18
| | | | | | | Bug 1409151 Change-Id: I232af159d402f818cf972498d721c3b57846ce74 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
* gpu: nvgpu: gk20a: Fix G_ELPG flush pollTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | We poll completion of flush sequence by polling the broadcast register. The polling should be done for a per-slice register instead. Bug 1457723 Change-Id: I10aba939175b6d05b05f5f26eebebcbe09d9b4a7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/382521 Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
* video: tegra: host: flexible to select fw per chipKevin Huang2015-03-18
| | | | | | | | | | | Decouple the firmware selection of different gpu architecture. Change-Id: I62bf6b3bc51a8606c5973e475988cd5987a65a1a Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/389793 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add NVIDIA GPU DriverArto Merilainen2015-03-18
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>