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path: root/drivers/gpu/nvgpu/gk20a/gk20a.c
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* gpu: nvgpu: add kernel APIs for TSG supportDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | Add support to create/destroy TSGs using node "/dev/nvhost-tsg-gpu" Provide below IOCTLs to bind/unbind channels to/from TSGs : NVGPU_TSG_IOCTL_BIND_CHANNEL NVGPU_TSG_IOCTL_UNBIND_CHANNEL Bug 1470692 Change-Id: Iaf9f16a522379eb943906624548f8d28fc6d4486 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/416610
* gpu: nvgpu: make pm config as platform dataSeshendra Gadagottu2015-03-18
| | | | | | | | | | | | | | | | Make gpu power management feature configurations as platform data. Keep existing sttaus for gk20a and disable all power features for gm20b. Bug 1523728 Change-Id: Ife7786863f18e21b882ac77085c7abc7c84d4cfc Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/426369 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Supriya Sharatkumar <ssharatkumar@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: bail out from poweroff if channel suspend failsDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | During gk20a_pm_prepare_poweroff(), if call to gk20a_channel_suspend() fails, we proceed to disable other components and then return error. But when genpd sees the error, it will abort the suspend sequence and keep the device state as active. But since we have already disabled all the components, GPU lands in invalid state. Hence, if channel_suspend() fails then do not proceed but return the error immediately Bug 200010416 Change-Id: I553a2a25832a1be4941bb6b6ce490c950cdbe7fa Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/422248 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: remove unused vpr refetch functionsDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | VPR resize is done by forcing GPU to idle and then updating VPR size from TLK. There is no need now to call vpr_resize funtion from kernel and hence these functions can be removed. Bug 1487804 Change-Id: I758a6e0a99a58757866f1138b0a89594e2a33908 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421703 (cherry picked from commit 391d9bacf053fe0dacffc76c36768f82912ad1f4) Reviewed-on: http://git-master/r/419612 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: allocate secure buffer in probeDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | Allocate dummy secure buffer of size PAGE_SIZE during gk20a_probe(). This will also help to initiate first secure memory (VPR) resize call while GPU is rail gated and in reset. This dummy buffer is released after we allocate some more secure memory buffers in alloc_global_ctx_buffers() Bug 1487804 Change-Id: I61604d9e5ffb585801ee893435c98a0d3e69d666 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421701 (cherry picked from commit 4236ab3323ee3c02fac562740d8b80d763589dea) Reviewed-on: http://git-master/r/419610 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix compilation issues with PM disableSeshendra Gadagottu2015-03-18
| | | | | | | | | | | Fix gpu driver compilation issues with power mangement and runtime power management disable. Change-Id: I8e1873871d6f184013b2142dd0cbc32c67774177 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/417925 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Turn on scaling when poweredAllen Yu2015-03-18
| | | | | | | | | | | | | | This patch reorders scaling resume to happen always when we power on the GPU, so as to balance the scaling suspend when we power off GPU. bug 200010911 Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8 Signed-off-by: Allen Yu <alleny@nvidia.com> Reviewed-on: http://git-master/r/421541 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Add rail gating trace eventsTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I661f14b2858fb7bc993157a597d4a278859da837 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/418789 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Rewrite PMU boot-up sequenceTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Rewrite PMU boot sequence as a state machine. At PMU power-up send initial messages, and reset state machine. At each reply from PMU, do the next stage of PMU boot and set state. As now PMU and FECS boot are independent, we need to ensure engine idle before saving ZBC. Change-Id: I1ea747ab794ef08f1784eeabfdae7655d585ff21 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410205
* gpu: nvgpu: Create trace events lastDan Willemsen2015-03-18
| | | | | | | Otherwise other trace event headers included may also be created, which leads to duplicate definition issues in the 3.14 kernel. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
* gpu: nvgpu: add railgate check in do_idle()Deepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | In gk20a_do_idle(), check gk20a rail status before returning. If rail is off, then only return success otherwise return failure Bug 1376916 Bug 1487804 Change-Id: I6280bf06c686b8baa4d6f49e90f47148411c3e02 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/415281 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: add do_{idle()/unidle()} APIsDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | Add below two new APIs for gk20a : 1) gk20a_do_idle() this API will force GPU to idle and railgate 2) gk20a_do_unidle() this API will unblock all the tasks blocked by do_idle() Bug 1487804 Change-Id: Ic5e7f2d19fb8d35f43666d0e309dde3022349d92 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/412061 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: add busy lockDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | - add rw_semaphore busy_lock for gpu busy() path - take read lock on busy_lock inside gk20a_busy() so that all usual requests can execute simultaneously - write lock can be taken when we need to block all of the gk20a_busy() calls Bug 1487804 Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/412060 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407006 (cherry picked from commit 009812b3e510518740e9c7e89b8b8b80439fe26a) Reviewed-on: http://git-master/r/408013 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: halize ltc isrKevin Huang2015-03-18
| | | | | | | | | | Bug 1507804 Change-Id: I3cca0e83dbf911c94422f8bb0b2df675a170b990 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/403213 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* Revert "gpu: nvgpu: Keep host1x on when GPU on"Matt Pedro2015-03-18
| | | | | | | | | | | This reverts commit 20d48a759b032116e3092e1df76518065da59879. Change-Id: I93718a314b70ee9284a83ca69964883e670ad78d Signed-off-by: Matt Pedro <mapedro@nvidia.com> Reviewed-on: http://git-master/r/407969 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Do not clear PMU state on rail gateTerje Bergstrom2015-03-18
| | | | | | | | | When rail gating, we cleared all PMU status. Clear only the relevant fields. Change-Id: I5b4e8d74339aae6f1c6b945f45b8378bb563e8be Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406843
* gpu: nvgpu: Keep host1x on when GPU onTerje Bergstrom2015-03-18
| | | | | | | | | Remove the path for turning on only gk20a. Always when turning on hardware, turn both host1x and GPU on. Change-Id: I5f972a487d3348bf2254bdb0fadb42ca600a559e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406405
* gpu: nvgpu: Fall-back to generic platformArto Merilainen2015-03-18
| | | | | | | | | | | | | | | | | Currently the generic platform is used only if the device tree defines that we have a generic platform available, however, the generic platform is fully compatible with the gk20a we have in tegra. This patch modifies the definitions so that we use generic platform also for tegra - even if if tegra configuration option is not enabled. Bug 1434573 Change-Id: Ib35ce0ab935d27764e960bf4d74a5016ae047a1f Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/396867 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Disable timeout if not on siliconTerje Bergstrom2015-03-18
| | | | | | | | Change-Id: I0add505d4f5c4b136f9f0228adbdc9aba960fcba Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/404276 Reviewed-by: Antoine Chauveau <achauveau@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Separate gm20b configurationTerje Bergstrom2015-03-18
| | | | | | | | | | | Separate gm20b platform data from gk20a data. Change-Id: Ie90ebc9e06ba94dfe852dfe07c163cd00fd90a9c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396376 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Call railgate only if definedTerje Bergstrom2015-03-18
| | | | | | | | | | | Call railgate and unrailgate ops only if they are defined. Change-Id: I0a87ac0259af3719098d4372be7e25f0a54416fc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396375 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: gk20a: Remove duplicated codeTerje Bergstrom2015-03-18
| | | | | | | | | | Two calls to gk20a_init_gpu_characteristics() is not needed. GPU sim aperture was defined twice. Change-Id: Iaf78611717c55b1cae456358fcae2641ad552d9f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383855 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Re-enable gm20b driverTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I473d7ac712afc10bc255d57d441965556fa0e957 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383840 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Implement gr opsTerje Bergstrom2015-03-18
| | | | | | | | | | | Implement gm20b specific gr ops. Bug 1387211 Change-Id: I4523311f1c155ba2d3403dcf222769f6817b2450 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/362415 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
* video: tegra: host: t210: Fix opsPrashant Gaikwad2015-03-18
| | | | | | | | | Change-Id: I99deddd7323f9ee7f8de4a032296ceeaebd81a95 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/375310 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: Read GPU arch earlyTerje Bergstrom2015-03-18
| | | | | | | | | | | | Read GPU architecture and implementation early. Bug 1387211 Change-Id: Iffc1aa013f28ec786b0325ae055d016cf004ee06 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/360237 (cherry picked from commit b7071920b90ff1b21a5d14039e609a95ba48bd64) Reviewed-on: http://git-master/r/359754
* video: tegra: gpu: provide generic ops interfaceAlex Waterman2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an interface for the gk20a driver to have generic ops which are implemented by a chip specific HAL layer. The HAL layer is provided by the gpu_ops struct which defines function pointers for chip specific oeprations. This is necessary for supporting multiple chips with the same code base and minimal per chip hacking. Also, since much code is common except in the HW headers that are needed, the LTC common code is compiled by first including the necessary chip specific header(s) and then including the ltc common code file. This allows for easy updating of functions that are only different between chips as a result of register offset and field changes whereas the HAL provides the mechanism for functions that have actual semantic changes. Change-Id: I96f9a8350d34e7e101beb141d4521fab69dcfbae Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/360627 (cherry picked from commit fe90cad939cf979fc2516a96e5911bd8ab6fc457) Reviewed-on: http://git-master/r/362228 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: add gm20b platform dataKevin Huang2015-03-18
| | | | | | | | | | Bug 1387211 Change-Id: If093c1f64ed8f79099ea8f115db6c91177a5e3ef Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/359987 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: GM20B characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | This patch adds initial support for GM20B for GPU characteristics IOCTL. Bug 1392902 Change-Id: I55bfb7e087244eae1462d44319bd91c7c0901c2e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/359227 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gk20a: GPU characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | | | | | | | This adds new IOCTL that provides information for the userspace for GPU characterization. Specifically, the following items are provided: GPU arch/impl/rev, number of GPCs, L2 cache size, on-board video memory size, num of tpc:s per gpc, and bus type. The primary user of the new IOCTL will be rmapi_tegra. Bug 1392902 Change-Id: Ia7c25c83c8a07821ec60be3edd018c6e0894df0f Reviewed-on: http://git-master/r/346379 (cherry picked from commit 0b9ceca5a06d07cc8d281a92b76ebef8d4da0c92) Reviewed-on: http://git-master/r/350658 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
* gpu: nvgpu: Turn off scaling when not poweredSantosh Katvate2015-03-18
| | | | | | | | | | | | | | | | | | | | | This far the scaling has been disabled only when we suspend the system and therefore we unnecessarily keep gpu workers running even if the gpu itself would be railgated. This is not proper behaviour and it causes a race in suspend sequence. This patch reorders scaling disable to happen always when we turn off the GPU. Bug 200004860 Change-Id: Ief0bfd89378d5a7ced26c3ef29094dd5c378b01a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/410443 (cherry picked from commit bcae65bea24be2a1e0abe42522d99ba70c94cbe2) Reviewed-on: http://git-master/r/413249 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Disable pm runtime on shutdownArto Merilainen2015-03-18
| | | | | | | | | | | | | | In some cases the gpu has still work pending while the device is being suspended. This patch forces pm runtime to be disabled for the device to avoid powering up the gpu unnecessarily. Bug 1515437 Change-Id: I4b57d72eb34e794f0457d7a074d26c9d096a13b3 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/411968 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Balance usage count on resume failTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | | If PM runtime resume fails, pm_runtime_get_sync() still increments the usage count. Balance the usage count by decrementing it on fail. Bug 200003289 Change-Id: I127d2697ff2601d4884a4ecfdec8ad50894bf7d0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/411285 (cherry picked from commit 736846ff999bb9d1ca3340fc02ab49f8c65c4145) Reviewed-on: http://git-master/r/411473 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407543 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Define module licenseArto Merilainen2015-03-18
| | | | | | | | | | | This patch adds missing license definition (GPL v2). Change-Id: I73d48dffd60eaab9517d09370875d51901853c4e Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/397590 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Request irq at probeTerje Bergstrom2015-03-18
| | | | | | | | | | Request irq at probe instead of at poweron. This allows investigating interrupt numbers across rail gating cycles. Change-Id: I6db4b3f1d865c6fbbd9d6a96c3df89617e169891 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/374859
* gpu: nvgpu: Disable IRQs after channel suspendArto Merilainen2015-03-18
| | | | | | | | | | | | | | Interrupts may be needed before we have actually silenced all channels. Few possible scenarios include channel recovery during teardown and sw method before the channels have been suspended. This patch modifies the teardown path so that we disable interrupts after the channels have been suspended. Change-Id: Ifc36dbb74b1d36bd88d1220fa50a53c4072df4d8 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/394599 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Do not dump top_fs_statusTerje Bergstrom2015-03-18
| | | | | | | | | Result of top_fs_status_r() is always constant. Do not dump it anymore. Change-Id: Ie1cfe872d70b2c3c8a7cef4df3870dacae8f8793 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/395208
* platform: tegra: move pm_domain to driversPrashant Gaikwad2015-03-18
| | | | | | | | Change-Id: I30baee4084399b8078232f31296c4d891a903d47 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/395123 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: gk20a: disable devfreq before gk20aPrashant Malani2015-03-18
| | | | | | | | | | | | | Ensure devfreq is disabled before shutting down gk20a, to prevent possible races with reading of gpu load, and the shutdown of gpu itself. Bug 1492913 Change-Id: I016fdba9515120fc6cf3e771f60c61b9bf2027cb Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/394296 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: fix genpd nameShridhar Rasal2015-03-18
| | | | | | | | | | domain name should be different from device name. Change-Id: I6c7d6927d6fc5bada203d749f107c17043233501 Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/392327 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: reorder free_irqPrashant Malani2015-03-18
| | | | | | | | | | | | Free IRQs before the various subunits are suspended. This is to prevent potential races between the IRQ thread and the suspend routine. Bug 1437749 Change-Id: Iffef918feecae0b256be96efd02b01b2677c225d Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Export pde coverageArto Merilainen2015-03-18
| | | | | | | | | | This patch adds a field to the gpu capability ioctl to allow requesting the maximum VA a single PDE entry can hold. Bug 1456570 Change-Id: I5cf29c8816fa6ea396c36419e6821c27a805b8af Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
* gpu: nvgpu: Add NVIDIA GPU DriverArto Merilainen2015-03-18
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-22 18:54:54 -0400