summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
Commit message (Collapse)AuthorAge
* gpu: nvgpu: Provide cpu gpu time correlation via ioctlArul Sekar2016-03-22
| | | | | | | | | | | | | | | | | | | bug 1648908 Provides pairs of CPU and GPU timestamps that can be used for correlatiing the two timebases - IOCTL made available /dev/nvhost-ctrl-gpu Change-Id: I1458b9d33d794b1b02ec9fd29ed9426756b94bcd Signed-off-by: Arul Sekar <aruls@nvidia.com> Reviewed-on: http://git-master/r/1029732 Reviewed-by: Arun Gona <agona@nvidia.com> Tested-by: Arun Gona <agona@nvidia.com> Reviewed-on: http://git-master/r/1111715 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix Coverity issue of dereferencing NULL return valueDeepak Nibade2016-03-14
| | | | | | | | | | | Coverity id : 20300 Bug 1416640 Change-Id: I43fe2aecd3f1e10d00518c3f9bd19726c17ba778 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1028798 Reviewed-by: Puneet Saxena <puneets@nvidia.com>
* gpu: nvgpu: Fix wait for sm lock down.Ashutosh Jain2016-01-29
| | | | | | | | | | | | | | | | | | global_esr and warp_esr are edge-triggered and are cleared in kernel isr so skip checking them when wait_for_pause is called from UMD via ioctl. Bug 1619430 Change-Id: I2ae54f23ba5c8bfaab35a476f88ccca0bbb10202 Signed-off-by: Ashutosh Jain <ashutoshj@nvidia.com> Reviewed-on: http://git-master/r/935808 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Cory Perry <cperry@nvidia.com> Tested-by: Cory Perry <cperry@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: abstract set sm debug modeRichard Zhao2016-01-10
| | | | | | | | | | | | | | | | | | | | Add new operation g->ops.gr.set_sm_debug_mode and move native implementation to gr_gk20a.c It's preparing for adding vgpu set sm debug mode hook. JIRA VFND-1006 Bug 1594604 Change-Id: Ia5ca06a86085a690e70bfa9c62f57ec3830ea933 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/923232 (cherry picked from commit 032552b54c570952d1e36c08191e9f70b9c59447) Reviewed-on: http://git-master/r/835614 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: Add 3 functions to regops interface.Ashutosh Jain2015-12-14
| | | | | | | | | | | | | | | This change adds the following IOCTLS: - NVGPU_GPU_IOCTL_RESUME_FROM_PAUSE - NVGPU_GPU_IOCTL_TRIGGER_SUSPEND - NVGPU_GPU_IOCTL_CLEAR_SM_ERRORS Bug 1619430 Change-Id: Iac37d515a753d8b799e631224eae2fa168b43e2c Signed-off-by: ashutosh jain <ashutoshj@nvidia.com> Reviewed-on: http://git-master/r/921378 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Wait for pause for SMssujeet baranwal2015-12-04
| | | | | | | | | | | | SM locking & register reads Order has been changed. Also, functions have been implemented based on gk20a and gm20b. Change-Id: Iaf720d088130f84c4b2ca318d9860194c07966e1 Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Signed-off-by: ashutosh jain <ashutoshj@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/837236
* gpu: nvgpu: abstract set mmu debug modeRichard Zhao2015-11-23
| | | | | | | | | | | | | | | | | Add new operaton g->ops.mm.set_debug_mode and let other places that set debug mode call this callback. It's preparing for adding vgpu set mmu debug mode hook. JIRA VFND-1005 Bug 1594604 Change-Id: I1d227a0c0f96adb0035ae16ae1f4fbfa739bf0a7 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/833497 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: correct register setting for debug modeRichard Zhao2015-11-23
| | | | | | | | | | | | | | | | correct register settings for both set mmu debug mode and set sm debug mode. JIRA VFND-1005 Bug 1594604 Change-Id: I1d4b1d4b4cdd9d24d3b00481e0e22c4217f5a4b3 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/833490 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: User-space managed address space supportSami Kiminki2015-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | Implement NVGPU_GPU_IOCTL_ALLOC_AS_FLAGS_USERSPACE_MANAGED, which enables creating userspace-managed GPU address spaces. When an address space is marked as userspace-managed, the following changes are in effect: - Only fixed-address mappings are allowed. - VA space allocation for fixed-address mappings is not required, except to mark space as sparse. - Maps and unmaps are always immediate. In particular, the mapping ref increments at kickoffs and decrements at job completion are skipped. Bug 1614735 Bug 1623949 Bug 1660392 Change-Id: I834fe19b3f65e9b02c268952383eddee0e465759 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/738558 Reviewed-on: http://git-master/r/833253 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement NVGPU_GPU_IOCTL_GET_BUFFER_INFOSami Kiminki2015-11-17
| | | | | | | | | | | | | | | | | | Implement NVGPU_GPU_IOCTL_GET_BUFFER_INFO. The new IOCTL can be used to identify buffers and retrieve their sizes. This allows the userspace to be agnostic to the dmabuf implementation, as the generic dmabuf fd interface does not have a reliable way for buffer identification. Bug 1614735 Bug 1623949 Bug 1660392 Change-Id: Ic3dd0a9385c9852778110ccb80636dd6f4f36208 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/822845 Reviewed-on: http://git-master/r/833252 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add support for CDE scatter buffersJussi Rasanen2015-09-28
| | | | | | | | | | | | | | | | Add support for CDE scatter buffers. When the bus addresses for surfaces are not contiguous as seen by the GPU (e.g., when SMMU is bypassed), CDE swizzling needs additional per-page information. This information is populated in a scatter buffer when required. Bug 1604102 Change-Id: I3384e2cfb5d5f628ed0f21375bdac8e36b77ae4f Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com> Reviewed-on: http://git-master/r/789436 Reviewed-on: http://git-master/r/791243 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add zbc support to vgpuRichard Zhao2015-06-06
| | | | | | | | | | | | | | | | | | | For both adding and querying zbc entry, added callbacks in gr ops. Native gpu driver (gk20a) and vgpu will both hook there. For vgpu, it will add or query zbc entry from RM server. Bug 1558561 Change-Id: If8a4850ecfbff41d8592664f5f93ad8c25f6fbce Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/732775 (cherry picked from commit a3787cf971128904c2712338087685b02673065d) Reviewed-on: http://git-master/r/737880 (cherry picked from commit fca2a0457c968656dc29455608f35acab094d816) Reviewed-on: http://git-master/r/753278 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Alignment of data for 64 bit readsujeet baranwal2015-06-06
| | | | | | | | | | | | | | | | The packaging of register's value in 64 bit variable needs the reversal of 32-bit-word. Bug 200083334 Change-Id: Id938f2a2fcffc90ef135ae963ae288c9a655069a Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Reviewed-on: http://git-master/r/744455 (cherry picked from commit dfd3a752ea6a0943be499410010a176756221593) Reviewed-on: http://git-master/r/753277 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Power up GPU in CDE only when convertingTerje Bergstrom2015-05-18
| | | | | | | | | | | GPU does not need to powered up if user space calls kernel and there is no new work to be done. Bug 1623918 Change-Id: I531aa7033530ae652d13684d8f8568a0e05fc2e1 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/732748
* gpu: nvgpu: don't idle if busy fail in set zbc tblKonsta Holtta2015-04-04
| | | | | | | | | | Move gk20a_idle() under error check in NVGPU_GPU_IOCTL_ZBC_SET_TABLE so that if gk20a_busy fails, the idle is skipped properly. Change-Id: Iffde3734f7fb121e1bc7838a67bfee3dacfd0a46 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/726104 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Gpu characterstics enhancementsujeet baranwal2015-04-04
| | | | | | | | | | | New members are added in nvgpu_gpu_characterstics to export more information required specially from CUDA tools. Change-Id: I907f3bcbd272405a13f47ef6236bc2cff01c6c80 Signed-off-by: Sujeet Baranwal <sbaranwal@nvidia.com> Reviewed-on: http://git-master/r/679202 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Removal of regops from CUDA driversujeet baranwal2015-04-04
| | | | | | | | | | | | | | | | The current CUDA drivers have been using the regops to directly accessing the GPU registers from user space through the dbg node. This is a security hole and needs to be avoided. The patch alternatively implements the similar functionality in the kernel and provide an ioctl for it. Bug 200083334 Change-Id: Ic5ff5a215cbabe7a46837bc4e15efcceb0df0367 Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Reviewed-on: http://git-master/r/711758 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: ioctl for flushing GPU L2sujeet baranwal2015-04-04
| | | | | | | | | | | | | | CUDA devtools need to be able to flush the GPU's cache in a sideband fashion and so cannot use methods. This change implements an nvgpu_gpu_ioctl to flush and optionally invalidate the GPU's L2 cache and flush fb. Change-Id: Ib06a0bc8d8880ffbfe4b056518cc3c3df0cc4988 Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com> Reviewed-on: http://git-master/r/671809 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Install fd after no errors can happenTerje Bergstrom2015-04-04
| | | | | | | | | | | | | | fd_install() should be called only once all other initialization is done and no errors can happen. Bug 1589104 Change-Id: I822511a64d4c6fa59c8e772a896dbd6818459c97 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/706928 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: gpu pm control update for cde ioctlsSeshendra Gadagottu2015-04-04
| | | | | | | | | | | | | | | For cde ioctl "NVGPU_GPU_IOCTL_MARK_COMPRESSIBLE_WRITE", gpu hw not engaged. So remove this call from gpu pm control. Bug 1592636 Change-Id: I9b700e469bf365f2d02549cd9cd9babc68fbb049 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/680294 (cherry picked from commit cae24ee5e9630cc891fb7fcf98d234a42126f464) Reviewed-on: http://git-master/r/681622 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add open channel ioctl to ctrl nodeKonsta Holtta2015-04-04
| | | | | | | | | | | | | | | Add the ioctl to open a new gpu channel to also the control node for improved process startup performance, in addition to the current open ioctl in the channel node. The new channel fd creation is refactored to a separate function which is called from both ctrl and channel ioctls. Bug 1604952 Change-Id: I3357ceec694c0e6d7a85807183884324cb725d3a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/679516 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix struct file memleak in alloc_asKonsta Holtta2015-04-04
| | | | | | | | | | | | | Free also newly allocated struct file in error conditions with fput, and pair it by not trying to release the resulting null as_share on release. Bug 1597056 Change-Id: Ifad5c3a829b2c459ed6a738ecdc1ac2ac7e1678a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/671527 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Submit coverity fixesTerje Bergstrom2015-03-18
| | | | | | | | | | Clear ioctl buffer and fix double free, and error case memory leak. Bug 200059216 Change-Id: I21cc2b0f6a7e8fca09f72caf4c54d570b13f400b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/655347
* gpu: nvgpu: vgpu: debugger interface fixesAingara Paramakuru2015-03-18
| | | | | | | | | | | | | | | | | To run CUDA apps, the following minimal changes have been made: - power-gating is disabled for vgpu - regop rd/wr returns -ENOSYS Tools (debugger/profiler) support is known to not work and not needed at this time. Bug 200043227 Change-Id: I923caad78450e72d310fb9290cf2849ed5460ad5 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/592878 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: GPU characteristics additionsSami Kiminki2015-03-18
| | | | | | | | | | | | | | | | | Add the following info into GPU characteristics: available big page sizes, support indicators for sync fence fds and cycle stats, gpc mask, SM version, SM SPA version and warp count, and IOCTL interface levels. Also, add new IOCTL to fetch TPC masks. Bug 1551769 Bug 1558186 Change-Id: I8a47d882645f29c7bf0c8f74334ebf47240e41de Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/562904 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* Revert "gpu: nvgpu: GR and LTC HAL to use const structs"Sam Payne2015-03-18
| | | | | | | | | | | This reverts commit 41b82e97164138f45fbdaef6ab6939d82ca9419e. Change-Id: Iabd01fcb124e0d22cd9be62151a6552cbb27fc94 Signed-off-by: Sam Payne <spayne@nvidia.com> Reviewed-on: http://git-master/r/592221 Tested-by: Hoang Pham <hopham@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Mitch Luban <mluban@nvidia.com>
* gpu: nvgpu: GR and LTC HAL to use const structsTerje Bergstrom2015-03-18
| | | | | | | | | | | Convert GR and LTC HALs to use const structs, and initialize them with macros. Bug 1567274 Change-Id: Ia3f24a5eccb27578d9cba69755f636818d11275c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/590371
* gpu: nvgpu: Add ioctl to create new TSGTerje Bergstrom2015-03-18
| | | | | | | | | Add ioctl to nvhost-ctrl to create a new TSG. Bug 200042993 Change-Id: Icdd0edb1d9e374740ace6da9eb3a10c57c62617a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Remove get and put client routinesKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gk20a_get_client() and gk20a_put_client() routines are effectively dead code. The GPU has been using pm_runtime for reference counting whether the device should be turned on or off, and gk20a_get_client() and gk20a_put_client() have had no positive effect on the behaviour. In worst case these functions trigger some issues as they may trigger code paths that should not be run. There is also a race between get/put and busy/idle. This patch removes the functions and reworks as_gk20a.c to correctly use gk20a_busy()/gk20a_idle() where put/get was required. Additionally, finalize_poweron() is moved to gk20a_busy(), similarly as it was with gk20a_get_client(). If pm_runtime is not in use, the device is only powered on and never off. Currently this affects vgpu power management since it does not use pm_runtime yet. Bug 1562096 Change-Id: I3162655f83457e9caccd9264eed36b5d51e60c52 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/414998 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement 64k large page supportTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | Implement support for 64kB large page size. Add an API to create an address space via IOCTL so that we can accept flags, and assign one flag for enabling 64kB large page size. Also adds APIs to set per-context large page size. This is possible only on Maxwell, so return error if caller tries to set large page size on Kepler. Default large page size is still 128kB. Change-Id: I20b51c8f6d4a984acae8411ace3de9000c78e82f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add no-op stubs for vgpuKonsta Holtta2015-03-18
| | | | | | | | | | | | Implement empty or -ENOSYS functions for vgpu if CONFIG_TEGRA_GR_VIRTUALIZATION is not enabled, and remove ifdefs around the calling code. Change-Id: Idc75c9bc486d661786bc222bd9e0380aa7766e78 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/552898 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add __must_check to gk20a_busyKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | The return value of gk20a_busy must be checked since it may not succeed in some cases. Add the __must_check attribute that generates a compiler warning for code that does not read the return value and fix all uses of the function to take error cases into account. Bug 200040921 Change-Id: Ibc2b119985fa230324c88026fe94fc5f1894fe4f Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/542552 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: create new nvgpu ioctl headerKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | Move nvgpu ioctls from the many user space interface headers to a new single nvgpu.h header under include/uapi. No new code or replaced names are introduced; this change only moves the definitions and changes include directives accordingly. Bug 1434573 Change-Id: I4d02415148e437a4e3edad221e08785fac377e91 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/542651 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: rename gpu ioctls and structs to nvgpuKonsta Holtta2015-03-18
| | | | | | | | | | | | | | To help remove the nvhost dependency from nvgpu, rename ioctl defines and structures used by nvgpu such that nvhost is replaced by nvgpu. Duplicate some structures as needed. Update header guards and such accordingly. Change-Id: Ifc3a867713072bae70256502735583ab38381877 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/542620 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: fix -EINVAL retval in ioctlsKonsta Holtta2015-03-18
| | | | | | | | | | | | Proper error number for invalid request number is EINVAL instead of EFAULT, so change it in ioctl calls. Change-Id: I8fddd34e012700550e9e30fe17ba7152b3a0417b Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/542563 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cde: check return values from busyKonsta Holtta2015-03-18
| | | | | | | | | | | check gk20a_busy return value in cde converter code paths. Bug 200040921 Change-Id: Ibad36df5877e325636a0a6ccc30c0d3d076ca941 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/540006
* gpu: nvgpu: Change error for invalid ioctl to dbgTerje Bergstrom2015-03-18
| | | | | | | | | | | Change loglevel of text for invalid ioctl to dbg. Bug 20038780 Change-Id: I0a2ba97d9c21b2225f8d3db59c80b70c2f2c679e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/501171 GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: Support ZBC color trackingLauri Peltonen2015-03-18
| | | | | | | | | | | | | | | | | | The compression state tracking user space API already accepts and returns the ZBC color used for the surface. Actually store the color in kernel so that the feature works. Bug 1536227 Bug 1524301 Change-Id: I264e1eeb90f0c4d40fe35fc2479b0ce83e19a7d7 Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Reviewed-on: http://git-master/r/497476 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Jussi Rasanen <jrasanen@nvidia.com> Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: support gk20a virtualizationAingara Paramakuru2015-03-18
| | | | | | | | | | | | | The nvgpu driver now supports using the Tegra graphics virtualization interfaces to support gk20a in a virtualized environment. Bug 1509608 Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/440122 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add compression state IOCTLsLauri Peltonen2015-03-18
| | | | | | | Bug 1409151 Change-Id: I29a325d7c2b481764fc82d945795d50bcb841961 Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
* gpu: nvgpu: Add NVIDIA GPU DriverArto Merilainen2015-03-18
This patch moves the NVIDIA GPU driver to a new location. Bug 1482562 Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/383722 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-16 23:54:32 -0400