| Commit message (Collapse) | Author | Age |
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Changes to enable 64 subcontexts: 1 SYNC + 63 ASYNC
Currently all subcontexts with in a tsg can have only
single address space.
Add support for NVGPU_TSG_IOCTL_BIND_CHANNEL_EX for
selecting subctx id by client.
Bug 1842197
Change-Id: Icf56a41303bd1ad7fc6f2a6fbc691bb7b4a01d22
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1511145
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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- Added t19x vgpu platform data
- Added basic vgpu HAL for gv11b.
- Added subctx header HAL.
Jira VFND-3796
Change-Id: I2b99364801b41d042b53e057f1a30e1194f354c3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474729
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add new abstraction file common/linux/nvhost_t19x.c
for all nvhost APIs exported from linux/nvhost_t194.h
This file will be compiled only if config
CONFIG_TEGRA_GK20A_NVHOST is set
Export the new headers from file <nvgpu/nvhost_t19x.h>
Also add dummy private header file nvhost_priv_t19x.h
to store definition of private structure nvgpu_nvhost_dev
This file should be deleted when nvgpu-t19x repo
is merged into common nvhost repo
Jira NVGPU-29
Change-Id: I8c08c9242b08cc45f7c99cc400b3e1a720f9439c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1493792
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add bus HAL and separate bus related functions from mm_gv11b:
timer access.
Change-Id: I311f258857238233103688fb653d27e4e79005a4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323354
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add regops whitelists for gv11b.
JIRA GV11B-35
Change-Id: I0ff5172c5b693250efb0523106632b3746383dcb
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1295401
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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JIRA GV11B-15
Change-Id: I38d8cbda33f9c4e8b44ca227cd5ea5fef346bfbd
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1266705
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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gv11b needs atleast one subcontext to submit work. To support
legacy in gv11b, currently main context is always copied into
subcontext0 (veid0) during channel commit instance.
As part of channel commit instance, veid0 for that channel is
created and relevant pdb and context info copied to vedi0.
JIRA GV11B-21
Change-Id: I5147a1708b5e94202fa55e73fa0e53199ab7fced
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1231169
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt support for
Volta GPU series
5) Removed hard coded engine_id logic and
made generic way
6) Code cleanup for readability
JIRA DNVGPU-26
Change-Id: Ief3b586ff3d9f492f0277243b2a94952bab48786
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1156023
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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All kernel versions are getting moved inside $TOP/kernel folder.
Changing kernel paths accordingly.
Bug 200190733
Change-Id: I7dc6d1768151977fc60bacae34c2f8d839216351
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/1143388
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Included all basic ops for gv11b and updated
sm related functions to include new priv register
addresses.
Bug 1735757
Change-Id: Ie48651f918ee97fba00487111e4b28d6c95747f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126961
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 1735757
Change-Id: Iea7488551a437afa0dfc005c87ad1b9ab9673b6c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1122123
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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