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* gpu: nvgpu: gp10b: Fix include pathAlex Van Brunt2016-12-27
| | | | | | | | | | Remove the requirement that srcdir is called kernel. Change-Id: I9379ef530ac34009bd0461a29d65d6d707bc8014 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/728153 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
* gpu: nvgpu: t18x, gp10b frameworkKenneth Adams2016-12-27
| | | | | | | | | | | This change adds gp10b to the nvgpu build as well as enabling CMA for buffer allocation. Change-Id: Id3d45ad6ffdab14120395952e68b285dd7364c76 Signed-off-by: Ken Adams <kadams@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/553324 GVS: Gerrit_Virtual_Submit
* nvgpu: rename Makefile to Makefile.nvgpudmitry pervushin2016-07-22
| | | | | | | | | | | | | Bug 1783210 Signed-off-by: dmitry pervushin <dpervushin@nvidia.com> Change-Id: I08e3ffb6b59ab145588a5ecf81b6c2346a481628 Reviewed-on: http://git-master/r/1175267 Reviewed-on: http://git-master/r/1177292 GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Tested-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/1183064
* gpu: nvgpu: Implement a bitmap allocatorAlex Waterman2016-07-19
| | | | | | | | | | | | | | | | | | | | | | Implement a bitmap allocator for GPU use. This allocator is useful for managing memory (or resource) regions where the buddy allocator is not ideal. Some instances are small regions or where the resource management must not make calls to the kernel's memory allocation routines (anything that ultimately calls alloc_page()). The code path where this avoidance of alloc_page() is most required is the gpfifo submit path. In order to keep this routine fast and have predicable time constraints no alloc_page() calls is necessary. The buddy allocator does not work for this since every time a buddy is allocated there is the possibility that a pair (or more) buddy structs have to be made. These allocs could perhaps require a call into alloc_page() if there is not enouch space in the kmem_cache slab for the buddy structs. Change-Id: Ia46fce62d4bdafcebbc153b21b515cb51641d241 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1176446 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
* gpu: nvgpu: Move buddy allocator to new fileAlex Waterman2016-07-19
| | | | | | | | | | | | | Move the buddy allocator implementation to a new file to make the code more organized. Also, as part of this, commonize some macros and functions which will be used by future allocator implementations. Bug 1781897 Change-Id: I1611534d5d872bf3b4677f7a1cc024a94b1c437e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1172116 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
* gpu: nvgpu: add sched control APIThomas Fleury2016-07-19
| | | | | | | | | | | | | | | | | | | | | | | Added a dedicated device node to allow an app manager to control TSG scheduling parameters: - Get list of TSGs - Get list of recent TSGs - Get list of TSGs per pid - Get TSG current scheduling parameters - Set TSG timeslice - Set TSG runlist interleave Jira VFND-1586 Change-Id: I014c9d1534bce0eaea6c25ad114cf0cff317af79 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1160384 (cherry picked from commit 75ca739517cc7f7f76714b5f6a1a57c39b8cb38e) Reviewed-on: http://git-master/r/1167021 Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
* gpu: nvgpu: detect vidmem configuration from HWKonsta Holtta2016-06-08
| | | | | | | | | | | | | Read video memory size from hardware during initialization for devices that support it. JIRA DNVGPU-14 Change-Id: If190f2d89f7148520ee274ca674f972987c8056d Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1157215 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add multiple engine and runlist supportLakshmanan M2016-06-07
| | | | | | | | | | | | | | | | | | | | | | | This CL covers the following modification, 1) Added multiple engine_info support 2) Added multiple runlist_info support 3) Initial changes for ASYNC CE support 4) Added ASYNC CE interrupt handling support for gm206 GPU family 5) Added generic mechanism to identify the CE engine pri_base address for gm206 (CE0, CE1 and CE2) 6) Removed hard coded engine_id logic and made generic way 7) Code cleanup for readability JIRA DNVGPU-26 Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1155963 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: enable gm204/gm206 GPMU secure bootMahantesh Kumbar2016-06-05
| | | | | | | | | | | | enable gm204/gm206 GPMU secure boot & build. JIRA DNVGPU-11 Change-Id: I3502d227d0baad9e3a27f46d1d6b0d2a83503b6c Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1156331 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: use correct config for t19xSeshendra Gadagottu2016-06-03
| | | | | | | | | | | | | | | Use TEGRA_19x_GPU config instead of ARCH_TEGRA_19x_SOC for t19x functionality. This config will defined only when gpu repository for t19x is available. Bug 1757988 Change-Id: I53421f31cbed49a2fb24085c150599c78b8158c0 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1158183 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: include makefiles conditionallySeshendra Gadagottu2016-06-01
| | | | | | | | | | | | | | Include chip specific makefiles, only if they are present in current source tree. Bug 1757988 Change-Id: I60a468bce6e0d20459aa643ccbce9bacbcd163bf Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1154761 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: add tsg support for vgpuRichard Zhao2016-05-31
| | | | | | | | | | | | | | | | | | - make tsg_gk20a.c call HAL for enable/disable channels - add preempt_tsg HAL callbacks - add tsg bind/unbind channel HAL callbacks - add according tsg callbacks for vgpu Bug 1702773 JIRA VFND-1003 Change-Id: I2cba74b3ebd3920ef09219a168e6433d9574dbe8 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1144932 (cherry picked from commit c3787de7d38651d46969348f5acae2ba86b31ec7) Reviewed-on: http://git-master/r/1126942 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: change kernel pathPritesh Raithatha2016-05-25
| | | | | | | | | | | | | All kernel versions are getting moved inside $TOP/kernel folder. Changing kernel paths accordingly. Bug 200190733 Change-Id: I0ed2aa6d4ae75e6fc2c3adf4ae541ecb5f4fb9a9 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/1143380 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sridhar Lavu <slavu@nvidia.com>
* gpu: nvgpu: fix compilation issuesSri Krishna chowdary2016-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | compiling kernel with clang pointed out below issues in nvgpu. Fixing them. gr_gk20a.c:1185:12: error: stack frame size of 3152 bytes in function 'gr_gk20a_setup_alpha_beta_tables' cde_gk20a.c:1376:22: error: duplicate 'const' declaration cde_gk20a.c:1377:22: error: duplicate 'const' declaration cde_gk20a.c:1378:22: error: duplicate 'const' declaration ctxsw_trace_gk20a.c:71:19: error: unused function 'ring_space' platform_gk20a_tegra.c:55:19: error: unused function 'pmc_read' platform_gk20a_tegra.c:60:20: error: unused function 'pmc_write' bug 1745660 Change-Id: I8cd4383cb898307bbeb162ca00b3e20d04de2c90 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/1150486 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add support for gm204 and gm206Terje Bergstrom2016-05-23
| | | | | | | | | | | Add support for chips gm204 and gm206. Adds also support for reading VBIOS and booting devinit and pre-os images on PMU. Change-Id: I4824b44245611e5379ace62793cc37158048f432 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120467 GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
* gpu: nvgpu: Add PCIe device supportTerje Bergstrom2016-04-27
| | | | | | | | | | Add support for probing PCIe graphics cards. JIRA DNVGPU-7 Change-Id: Iad3d31a1dc0ca6575d8a9916857022cac9181948 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1127684
* gpu: nvgpu: add support for t19xSeshendra Gadagottu2016-04-13
| | | | | | | | | | | | Add build and gpu framework support for t19x. Bug 1735757 Change-Id: I4b7c6468871ca27412a6f9be20f744bc730b4142 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1122093 GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
* gpu: nvgpu: move t18x code to kernel-nvgpu-t18xAlex Van Brunt2016-04-04
| | | | | | | | | | | | Part of moving the nvgpu driver out of the common kernel is moving the T18x part of the nvgpu driver out of kernel-t18x. So, update the Makefile to replect this change. bug 200187033 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Change-Id: I97ab32b4c5f8971060b7bfa0aab362ba2fe2eb00 Reviewed-on: http://git-master/r/1119775
* gpu: nvgpu: move t18x code to kernel-nvgpu-t18xAlex Van Brunt2016-03-30
| | | | | | | | | | Part of moving the nvgpu driver out of the common kernel is moving the T18x part of the nvgpu driver out of kernel-t18x. So, update the Makefile to replect this change. bug 200187033 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
* gpu: nvgpu: add kernel-nvgpu to include pathAlex Van Brunt2016-03-30
| | | | | | | | | The nvgpu driver's headers moved along with the dirver. So, add the new path to the include search path. bug 200187033 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
* gpu: nvgpu: Add support for FECS ctxsw tracingAnton Vorontsov2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bug 1648908 This commit adds support for FECS ctxsw tracing. Code is compiled conditionnaly under CONFIG_GK20_CTXSW_TRACE. This feature requires an updated FECS ucode that writes one record to a ring buffer on each context switch. On RM/Kernel side, the GPU driver reads records from the master ring buffer and generates trace entries into a user-facing VM ring buffer. For each record in the master ring buffer, RM/Kernel has to retrieve the vmid+pid of the user process that submitted related work. Features currently implemented: - master ring buffer allocation - debugfs to dump master ring buffer - FECS record per context switch (with both current and new contexts) - dedicated device for ctxsw tracing (access to VM ring buffer) - SOF generation (and access to PTIMER) - VM ring buffer allocation, and reconfiguration - enable/disable tracing at user level - event-based trace filtering - context_ptr to vmid+pid mapping - read system call for ctxsw dev - mmap system call for ctxsw dev (direct access to VM ring buffer) - poll system call for ctxsw dev - save/restore register on ELPG/CG6 - separate user ring from FECS ring handling Features requiring ucode changes: - enable/disable tracing at FECS level - actual busy time on engine (bug 1642354) - master ring buffer threshold interrupt (P1) - API for GPU to CPU timestamp conversion (P1) - vmid/pid/uid based filtering (P1) Change-Id: I8e39c648221ee0fa09d5df8524b03dca83fe24f3 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022737 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Use include for importing T18x MakefileTerje Bergstrom2016-03-14
| | | | | | | | | | Refactor Makefile so that there is only one target. Bug 1476801 Change-Id: If0fe5f787214c9addd51295355e3ae5606e5e8fc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1028349
* gpu: nvgpu: vgpu: add regops supportRichard Zhao2016-01-10
| | | | | | | | | | | | | | | | | Added new RM Server command for regops. JIRA VFND-1128 Bug 1700139 Change-Id: Ia1cc63e993c29c91f87440c241077fa91edb9e53 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/923235 (cherry picked from commit 7de22e42cfd2e419ad64178b9f1f1ee16273bd03) Reviewed-on: http://git-master/r/841330 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
* gpu: nvgpu: update thermal programmingSeshendra Gadagottu2015-10-27
| | | | | | | | | | | | | | | Add required fileds and values for thermal slow-down settings in thermal header file and implemented chip specific thermal register programming Reviewed-on: http://git-master/r/822199 (cherry picked from commit 9e8a745b8295af002b9780c83caa8dc7b22cc737) Change-Id: I016b18ed230fa6c104eada2e166ccd1a5f2ace36 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/823012 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Prepare for per-GPU CDE program numbersSami Kiminki2015-08-19
| | | | | | | | | | | | | | | Add gpu_ops for CDE, and add get_program_numbers function pointer for determining horizontal and vertical CDE swizzler programs. This allows different GPUs to have their own specific requirements for choosing the CDE firmware programs. Bug 1604102 Change-Id: Ib37c13abb017c8eb1c32adc8cbc6b5984488222e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/784899 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: vgpu: add t210 gm20b supportRichard Zhao2015-08-19
| | | | | | | | | | | | | | - add hal initializaiton - create folders vgpu/gk20a and vgpu/gm20b for specific code Bug 1653185 Change-Id: If94d45e22a1d73d2e4916673736cc29751be4e40 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/774148 GVS: Gerrit_Virtual_Submit Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Ken Adams <kadams@nvidia.com>
* gpu: nvgpu: vgpu: support additional notificationsAingara Paramakuru2015-06-22
| | | | | | | | | | | | | | | | | Client notification support is now added for the following: - stalling and non-stalling GR sema release - non-stalling FIFO channel intr - non-stalling CE2 nonblockpipe intr Bug 200097077 Change-Id: Icd3c076d7880e1c9ef1fcc0fc58eed9f23f39277 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/736064 (cherry picked from commit 0585d1f14d5a5ae1ccde8ccb7b7daa5593b3d1bc) Reviewed-on: http://git-master/r/759824 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: cyclestats mode E snapshots supportLeonid Moiseichuk2015-06-06
| | | | | | | | | | | | | | | | | | | | | | | That is a kernel supporting code for cyclestats mode E. Cyclestats mode E implemented following Windows-design in user-space and required the following operations to be implemented: - attach a client for shared hardware buffer of device - detach client from shared hardware buffer - flush means copy of available data from hardware buffer to private client buffers according to perfmon IDs assigned for clients - perfmon IDs management for user-space clients - a NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT capability added Bug 1573150 Change-Id: I9e09f0fbb2be5a95c47e6d80a2e23fa839b46f9a Signed-off-by: Leonid Moiseichuk <lmoiseichuk@nvidia.com> Reviewed-on: http://git-master/r/740653 (cherry picked from commit 79fe89fd4cea39d8ab9dbef0558cd806ddfda87f) Reviewed-on: http://git-master/r/753274 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: disable ce2 interrupts when unhandledSam Payne2015-04-04
| | | | | | | | | | | ce2 interrupts enabled only on gk20a and gm20b when interrupts are handled through hal Change-Id: Ib570db8f5f41e71e768b95e781153ec8a5d20015 Signed-off-by: Sam Payne <spayne@nvidia.com> Reviewed-on: http://git-master/r/677447 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: enable ce2 interruptsSam Payne2015-04-04
| | | | | | | | | | | | | | enables non-blocking interrupts in ce2 all other ce2 interrupts are cleared and not handled. bug 200036089 Change-Id: I9f47b06c677c72ac523019e6a3f70fedd07830a2 Signed-off-by: Sam Payne <spayne@nvidia.com> Reviewed-on: http://git-master/r/671783 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: move debug dump to HALAingara Paramakuru2015-04-04
| | | | | | | | | | | | Move the debug dump to HAL and add a stub for vgpu. Bug 1595164 Change-Id: Ifdcdd8a8caca7a41919dad075fee1c87032f53b0 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/662722 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix/HACK for v3.18Dan Willemsen2015-03-18
| | | | Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
* gpu: nvgpu: T18x supportKenneth Adams2015-03-18
| | | | | | | | | | nvgpu framework and build for T18x Bug 1567274 Change-Id: I77835302a1110573008869d1106eface512bb9b1 Signed-off-by: Ken Adams <kadams@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Per-chip interrupt processingTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Move accesses to MC registers under HAL so that they can be reimplemented per chip. Do chip detection and HAL initialization only once. Bug 1567274 Change-Id: I20bf2f439d267d284bfd536f1a1dfb5d5a2dce4c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/590385
* gpu: nvgpu: Fix build without Tegra clk frameworkTerje Bergstrom2015-03-18
| | | | | | | | | | | | Do not build clock code if TEGRA_CLK_FRAMEWORK is not defined. Also make GK20A_DEVFREQ depend on TEGRA_CLK_FRAMEWORK, and build scaling governor only if GK20A_DEVFREQ is enabled. Bug 1567274 Change-Id: I6ea1462e7a110fb46c9d66ceda71167cff19699e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/562475
* gpu: nvgpu: allow building as a separate moduleKonsta Holtta2015-03-18
| | | | | | | | | | | | | | | Include object files of gk20a, gm20b and vgpu in the same composite object nvgpu.o in the top-level makefile, and remove the old makefiles. This helps in building the driver as a separate module. Bug 1476801 Change-Id: I93531c0f1a20e46904a429e492f8ed32e4f0c4a1 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/557971 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: support gk20a virtualizationAingara Paramakuru2015-03-18
| | | | | | | | | | | | | The nvgpu driver now supports using the Tegra graphics virtualization interfaces to support gk20a in a virtualized environment. Bug 1509608 Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/440122 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Add GPU driver for GM20BBo Yan2015-03-18
this moves GM20B driver to the new location Change-Id: I5fde14e114a8db79738a4c61849912b1ae225fb5
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 23:35:31 -0400