| Commit message (Collapse) | Author | Age |
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Removed the reference for $NVGPU/drivers/gpu/nvgpu/common
from Makefile and fixed the include path for the
clockgating headers in HAL files.
Change-Id: I34c179866d28c932501b38184ec18d20dce81480
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730759
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gk20a_mm_debugfs_init() used to initialize one mm-specific debugfs knob,
but now that there aren't any, delete the function and the related
files.
Change-Id: Ic3177945bbab501c506b5199b44c87450df75452
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1729530
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Move implementation of bus HAL to common/bus.
Change-Id: Ia89350f9d94f3ccfd5500a340e6a677cd7d4cfaa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1726337
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As part of the MISRA fixes, moving all the
gating_reglist files to common/clock_gating dir,
the new directory structure suggested to follow.
Removed unused gating_reglist files for gk20a
JIRA NVGPU-646
Change-Id: I388855befcf991ee68eeffed10fe9ac456210649
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1722330
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Now that clk_arb.c is free of Linux'isms, move
it to the clk/ directory.
Jira VQRM-741
Change-Id: I53298c76f834322aa586781cdfd2e6031f4826a1
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1709651
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sync_gk20a.* files are no longer used by core code and only invoked
from linux specific implementations of the OS_FENCE framework which are
under the common/linux directory. Hence, sync_gk20a.* files are also
moved under common/linux.
JIRA NVGPU-66
Change-Id: If623524611373d2da39b63cfb3c1e40089bf8d22
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1712900
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This patch adapts gk20a_channel_syncpt to use os_fence for post fence
as well as pre-fence(wait) use cases.
Jira NVGPU-66
Change-Id: I49627d1f88d52a53511a02f5de60fed6df8350de
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
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This patch constructs an abstraction to hide the sync_fence
functionality from the common code. struct nvgpu_os_fence acts as an
abstraction for struct sync_fence.
struct nvgpu_os_fence consists of an ops structure named nvgpu_os_fence_ops
which contains an API to do pushbuffer programming to generate wait
commands for the fence.
The current implementation of nvgpu only allows for wait method on a
sync_fence which was generated using a similar backend(i.e. either
Nvhost Syncpoints or Semaphores). In this patch, a
generic API is introduced which will decide the type of the underlying
implementation of the struct nvgpu_os_fence at runtime and run the
corresponding wait implementation on it.
This patch changes the channel_sync_gk20a's semaphore specific
implementation to use the abstract API. A subsequent patch will make
the changes for the nvhost_syncpoint based implementations as well.
JIRA NVGPU-66
Change-Id: If6675bfde5885c3d15d2ca380bb6c7c0e240e734
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
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segregated os-agnostic function from linux/sim.c and linux/sim_pci.c
to sim.c and sim_pci.c, while retaining os-specific functions.
renamed all gk20a_* api's to nvgpu_*.
renamed hw_sim_gk20a.h to nvgpu/hw_sim.h
moved hw_sim_pci.h to nvgpu/hw_sim_pci.h
JIRA VQRM-2368
Change-Id: I040a6b12b19111a0b99280245808ea2b0f344cdd
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
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Move nvlink endpoint operations to common code. These operations
are invoked when handling nvlink core driver requests.
Jira VQRM-3523
Change-Id: I93024bf88a8caa3765b33c1264dde452c1a85ee3
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1698686
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Clk arbiter code contains two significant portions -
the one which interacts with userspace and is OS specific,
and the other which does the heavylifting work which can
be moved to the common OS agnostic code.
Split the code into two files in prep towards refactoring
the clk arbiter.
Jira VQRM-3741
Change-Id: I47e2c5b18d86949d02d6963c69c2e2ad161626f7
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
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Implement support for dGPU fmodel. The message protocol is slightly
different and accessed via BAR0 aperture.
JIRA NVGPUT-41
Change-Id: Ide3c52a751530f520854965c1eba19fa8339a315
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1694963
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In gpu_init_hal(), call NVGPU_NEXT_INIT_HAL() to initialize HAL of upcoming
GPU
All upcoming GPU related support is compiled only if CONFIG_TEGRA_GPU_NEXT
is set
Jira NVGPUT-42
Change-Id: I1563acd60f20fda50f4557a068398c1d5d224f3e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699312
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-Generated list for addr/value pairs using
gen_gating_reglist.pl --target_ip=gv100 --soc=t194
-Comment out addresses triggering priv/pbus errors
Bug 200399393
Change-Id: Ica0fd65070a7100f20afa32184f4a2e3cad6d0c2
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
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Most of files have been moved out of linux folder. More code could be
common as halifying going on.
Jira EVLR-2364
Change-Id: Ia9dbdbc82f45ceefe5c788eac7517000cd455d5e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649947
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vgpu.c will keep common code whil vgpu_linux.c is linux specific.
Jira EVLR-2364
Change-Id: Ice9782fa96c256f1b70320886d3720ab0db26244
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
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Added vgpu_ivm_*() functions to be used by os agnostic code.
Jira EVLR-2364
Change-Id: I4a2baebcff9723950c4fba99d0879a0c61e3e3a2
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
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The following changes implements the initial (as per bringup) nvlink driver.
(1) SW initialization of nvlink core driver structures
(2) Nvlink interrupt handling
(3) Device initialization (IOCTRL, pll and clocks, device level intr)
(4) Falcon support for minion
(5) Minion load and bootstrapping
(6) Link initialization and DL PROD settings
(7) Device Interface init (and switching HSHUB to nvlink)
(8) HS set/get mode for both link and sublink
(9) Topology discovery and VBIOS settings.
(10) Ensures we get physical contiguous memory when Nvlink is enabled
This driver includes a hack for the current single dev/single link limitation.
JIRA: EVLR-2331
JIRA: EVLR-2330
JIRA: EVLR-2329
JIRA: EVLR-2328
Change-Id: Idca9a819179376cc655784482b24b575a52fa9e5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
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CDE is a Tegra SoC specific feature. Add new config option
CONFIG_NVGPU_SUPPORT_CDE and #ifdef all CDE specific code with it.
JIRA NVGPU-4
Change-Id: I6f0b0047d6ba2b5c36c2eb9b8a1514776741f5b5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Build files specific to iGPU in common/linux only when iGPU is
supported.
JIRa NVGPU-4
Change-Id: I227fc6fd41729088281d5c0c8cde5a963ba18f6a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1648064
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tegra_gr_comm_* are wrapped as vgpu_ivc_*, which helps make vgpu code
more common.
Jira EVLR-2364
Change-Id: Id49462ed6c176c73ceee8c6bc41104447748e187
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
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Adds the skeleton and integration of the GV100 endpoint driver to NVGPU
(1) Adds a OS abstraction layer for the internal nvlink structure.
(2) Adds linux specific integration with Nvlink core driver.
(3) Adds function pointers for nvlink api, initialization and isr process.
(4) Adds initial support for minion.
(5) Adds new GPU enable properties to handle NVLINK presence
(6) Adds new GPU enable properties for SG_PHY bypass (required for NVLINK over
PCI)
(7) Adds parsing of nvlink vbios structures.
(8) Adds logging defines for NVGPU
JIRA: EVLR-2328
Change-Id: I0720a165a15c7187892c8c1a0662ec598354ac06
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
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Provide a macro for preventing CPU speculation.
bug 2039126
CVE-2017-5753
Change-Id: Ifa936c079d9f2a0231d0cf35c4d8bdd18d54b238
Signed-off-by: Alex Waterman <alexw@nvidia.com>
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- Created nv_pmu_rpc_struct_acr_init_wpr_region struct
- Function gv100_pmu_init_acr() to create & execute
INIT_WPR_REGION using RPC.
- Updated gv100 HAL .init_wpr_region to point
to gv100_pmu_init_acr()
- Added code to handle INIT_WPR_REGION ack in
RPC handler.
Change-Id: I699fa945790689e5f24ad5d3de022efb458662e0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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Lots of code paths were split to T19x specific code paths and structs
due to split repository. Now that repositories are merged, fold all of
them back to main code paths and structs and remove the T19x specific
Kconfig flag.
Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6
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Delete gm20b vgpu support. It has not been supported for a long time
and keeping it up-to-date is extra work.
Change-Id: I3c06d29a79cb83d53a25d2242247b4eeabeab310
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement abstraction for finding the process ID of thread currently
being run. This is tracked for context switch tracing.
In Linux kernel this is implemented by returning TGID.
Change-Id: Ia6bcbd92c8cc25467694a35476e5d5f717194105
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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The files sim_gk20a.c and sim_gk20a.h under common/linux/ are renamed
to sim.c and sim.h as the suffix gk20a is not needed.
JIRA NVGPU-386
Change-Id: I79bbb8e66c4b0cf53f2b1f98a7bed5f682106a0c
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
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This patch removes linux dependencies from sim_gk20a.h under
gk20a/sim_gk20a.h. The following changes are made in this patch.
1) Created a linux based structure sim_gk20a_linux that contains a
common sim_gk20a struct inside it. The common struct sim_gk20a doesn't
contain any linux specific structs.
2) The common struct sim_gk20a contains an added function pointer which
is used to invoke gk20a_sim_esc_readl() method.
3) sim_gk20a.c is moved to nvgpu/common/linux along with a new header
sim_gk20a.h that contains the definition of struct sim_gk20a_linux.
4) struct gk20a now contains a pointer of sim_gk20a instead of the
entire object. The memory for this struct is allocated and initialized during
gk20a_init_support() and freed during invocation of
gk20_remove_support().
5) We first obtain the pointer for struct sim_gk20a_linux from the
pointer of sim_gk20a using the container_of method in order to work on
the struct.
JIRA NVGPU-386
Change-Id: Ic82b8702642377f82694577a53c3ca0b9c1bb2ab
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1603073
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gv11b/platform_gv11b_tegra.c is mostly linux specific so move it to linux
specific directory
Change-Id: I3e10bafcf672967e35a7955038cd9285b8697a57
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1604283
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-New fuse ops is added to set NVGPU_SEC_PRIVSECURITY
and NVGPU_SEC_SECUREGPCCS bits in g->enabled_flags
during hal initialization
-For igpu non simulation platforms, fuses are read
to decide if gpu should be allowed to boot or not.
--Do not boot gpu if priv_sec_en is set but wpr_enabled
is not set to 1 or vpr_auto_fetch_disable is not set to 0
--With priv_sec_en set, all falcons have to boot
in LS mode and this needs wpr_enabled set to 1
AND vpr_auto_fetch_disable set to 0. In this case
gmmu tries to pull wpr and vpr settings from tegra mc
Bug 2018223
Change-Id: Iceaa1b0b3214e9a3d6cef5d77a82e034302f748b
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595454
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Remove separation of t18x specific code and fields and the associated
ifdefs. We can build T18x code in always.
Change-Id: I4e8eae9c30335632a2da48b418c6138193831b4f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595431
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Most of VGPU code is linux specific but lies in common code
So until VGPU code is properly abstracted and made os-independent,
move all of VGPU code to linux specific directory
Handle corresponding Makefile changes
Update all #includes to reflect new paths
Add GPL license to newly added linux files
Jira NVGPU-387
Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599472
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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We no longer use code in nvgpu-t19x or t19x repo, so remove obsolete includes
from Makefile
Bug 200363166
Change-Id: I29e78931e90e0afffecf756bf7479ed8784dbc25
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599470
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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linux-nvgpu
Bug 200363166
Change-Id: Ic662d7b44b673db28dc0aeba338ae67cf2a43d64
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
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Add vgpu_gv11b_init_gpu_characteristics() and enable
NVGPU_SUPPORT_TSG_SUBCONTEXTS
Jira VFND-3797
Jira EVLR-1751
Change-Id: I288ac062e42ec399a302d693471b50b58c9a2653
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543015
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX command to pass subctx_id
and runqueu_sel to RM server. Use this command in gv11b's
implementation of gops->fifo.tsg_bind_channel.
Jira EVLR-1751
Change-Id: I8ba69c95ea1c6bb7fa106588b6420ed543b2386b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Update all Kconfig files and Makefiles to rely on the kernel overlay
feature. In particular, don't include any Kconfig files or Makefiles
from other overlays. -I directives in CFLAGS are not yet cleaned up.
Bug 1978395
Change-Id: I16386f7f1e76bd68b55f3128b25eada029ae82c1
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571165
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Make GPU characteristics flags specific to Linux code only. The
rest of driver is moved to using nvgpu_is_enabled() API.
JIRA NVGPU-259
Change-Id: I46a5a90bb34f170e9e755e7683be142ed6b18cce
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1583992
GVS: Gerrit_Virtual_Submit
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Add regops whitelists for GV100
JIRA: NVGPUGV100-36
Change-Id: Ifeb286e2e8df056ba9afdd32f457bacf1b4813fc
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1582835
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Updated following hal functions for css gv11b and reused
them for gv100:
enable_snapshot
disable_snapshot
check_data_available
These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
based on memory aperture used for hwpm inst_block.
Bug 200327596
Change-Id: I500d17670e2f389d8d0e77884374bcc3504a41f8
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1507546
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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SMID tables were generated according with the local tpc and the pagepool and cb
buffers from a different chip and did not take performance in consideration,
which made compute kernels hang with CTAs on the fly.
This change ensures we are using the right sizes and adds proper enumeration
of smids.
JIRA: NVGPUGV100-36
bug 2004378
Change-Id: Ic8f50c325d6d6720cca41d9740ae4f5f51e1100a
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581664
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Updated following hal functions for gv11b and reused
them for gv100:
perfbuffer_enable
perfbuffer_disable
These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
to sys_ncoh_f().
Bug 200327596
Change-Id: Ia672ac561917c8ed36caea9cc7e74b7fc7ce8188
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571074
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Initialize usermode registers also for Volta GPU behind PCIe.
Change-Id: Id621a74838839e4d98dfd0828c1ea5a0d54baa2d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579121
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Tested-by: David Martinez Nieto <dmartineznie@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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Implement T19x specific usermode aperture initialization functions.
Move usermode_regs field to nvgpu_os_linux_t19x, because it is
Linux specific.
JIRA NVGPU-259
Change-Id: I9d6ce243a692ab48209d468288ed85f89fb26770
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569699
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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These changes allow GV100 to init the basic HALs to pass
nvgpu_submit_twod
(1) Allocate fault buffer from vidmem instead of sysmem to prevent coherency
issues
(2) Properly enable FB
(3) Fan control requires the execution of the pre-os FW, without it the SKU201
is extremely noisy
JIRA: NVGPUGV100-9
Change-Id: I9b2072737e45432f957e7faae6d33bc0ab43b817
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539926
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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init *eng_delay*, *eng_idle_filt*, *fecs_idle_filter*
and *hubmmu_idle_filter* in therm regs.
Change-Id: I4ab5374084e993cd96ef28ace87b6013b996178d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570556
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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This patch adds Secure boot support for T194.
JIRA GPUT19X-5
Change-Id: If78e5e0ecfa58bcac132716c7f2c155f21899027
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514558
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Adds support of GV100 up to devinit.
JIRA: EVLR-1693
Change-Id: Ic7aa5f1c20714e05954139f143abb6a3459858fc
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1532747
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
therm sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: Ic297792c4d47ffbe64cc0bd95a659a6b7f383743
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527423
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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