| Commit message (Collapse) | Author | Age |
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Take interrupts as one kind of event message, and make it
easier to add new kind of events.
JIRA VFND-3291
Bug 200257899
Change-Id: I83482293230c0aa10b05caf61e249a042bf6653c
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1278396
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Use sched_clock() for alarm timestamps to return
number of nanoseconds since the system was started.
Jira DNVGPU-186
Change-Id: Ie16fe5442ea8a5213bf5401a3faedcce387b3d93
Reviewed-on: http://git-master/r/1259026
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
(cherry picked from commit 383601c4d006734e13f0bfa386381573c87209da)
Reviewed-on: http://git-master/r/1280888
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add a queue system to collect alarm notifications
and deliver them to user space
Add interface for driver to set global alarms
JIRA: DNVGPU-189
Change-Id: I24a340283c02d8ea95ad6ea148acdb37157ef69c
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1252475
(cherry picked from commit 5b79c7541066148ce0580d25daad54a8fa82f8be)
Reviewed-on: http://git-master/r/1280887
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Pass flags as mask in event initialization
JIRA: DNVGPU-189$
Change-Id: Ied22a585a8f59f44e577bc678f8cef380432c9a2
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1252474
(cherry picked from commit 56fa34b8ac0ebafaf09a8760bec6200adf9f3c39)
Reviewed-on: http://git-master/r/1280886
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add support for poll/read/ioctl for events in clock
arbiter.
Jira DNVGPU-186
Change-Id: Id95264fffae2b83a388ff8f186ebe7d723029b7f
Reviewed-on: http://git-master/r/1253659
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
(cherry picked from commit 8d652a7313722aab331f82f0841b490ca25cb51d)
Reviewed-on: http://git-master/r/1280885
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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In gp10b_round_clk_rate(), we currently call
clk_round_rate() to round the clock rate for us
But since the frequency table is prepared
using the frequency values supported in h/w,
we can round the rate locally using the table
Bug 1827281
Change-Id: I85d034326539590352badceb4164aa5d89ee8842
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1280630
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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We right now get min and max frequencies, and then
interpolate rest of the frequencies.
With this approach, we do not select exact
frequencies as supported by h/w
Fix this so that we query all supported frequencies
using clk_round_rate() and then select every N'th
frequency to keep number of frequencies under limit
Use GP10B_FREQ_SELECT_STEP (currently set to 8)
to configure frequency selection step
Raise GP10B_MAX_SUPPORTED_FREQS to 200 since h/w
supported frequencies could be in that range
Bug 1827281
Change-Id: Id8678d7a0280a249e4affbba084ff2e33b6694e6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1280629
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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In gk20a_busy() we check if dev is NULL and return -ENODEV if so. But
before that we've already dereferenced dev by passing it to
get_gk20a(). Defer call to get_gk20a() until after the NULL check.
Bug 200192125
Change-Id: I943a9e96d13ff8cb4333fe20a941c8e95d159a66
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1280349
GVS: Gerrit_Virtual_Submit
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clk.h #includes clk_vin.h, which recursively #includes clk.h without
needing anything from clk.h. Remove the #include to improve build
time.
Bug 200192125
Change-Id: Icab32b7e73a1eaaee8e017367d71b8ebde47c21e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1280350
GVS: Gerrit_Virtual_Submit
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We retrieve perf table from VBIOS only if respective HAL op is
implemented. Later in code we unconditionally dereference a pointer
which can lead to NULL pointer access.
Fix two new cases by early aborting creation of devinit tables if the
perf VBIOS getter is missing.
Bug 200192125
Change-Id: I30f20f1829305ecc1117c6301e26ff1b869967eb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1280347
GVS: Gerrit_Virtual_Submit
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ctrlvolt.h #includes ctrlperf.h, which recursively #includes
ctrlvolt.h without needing anything from it. Remove the #include
to improve built time.
Bug 200192125
Change-Id: I8c917533127e6d42aae6ad1401860c1f5d110d81
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1280345
GVS: Gerrit_Virtual_Submit
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Fix slab-out-of-bounds issue reported by KASAN
[ 28.464077] BUG: KASAN: slab-out-of-bounds in
gr_gk20a_init_map_tiles+0x624/0x708 at addr ffffffc1a098ee01
...
[ 28.503241] INFO: Allocated in gr_gk20a_init_map_tiles+0x2dc/0x708
age=11 cpu=5 pid=1
out-of-bound access from below 3 stacks :
[1]
[ 28.782886] [<ffffffc0007d5f64>] gr_gk20a_init_map_tiles+0x624/0x708
[ 28.789228] [<ffffffc0007eadf0>] gk20a_init_gr_support+0x2d0/0xeb0
[ 28.795397] [<ffffffc00079d9c8>]
gk20a_pm_finalize_poweron+0x738/0xd10
[2]
[ 29.268070] [<ffffffc0007d618c>] gr_gk20a_zcull_init_hw+0x144/0x730
[ 29.274329] [<ffffffc0007d6a00>] gk20a_init_gr_setup_hw+0x288/0x1530
[ 29.280677] [<ffffffc0007eac6c>] gk20a_init_gr_support+0x14c/0xeb0
[ 29.286938] [<ffffffc00079d9c8>]
gk20a_pm_finalize_poweron+0x738/0xd10
[3]
[ 50.076223] [<ffffffc000d1df14>]
gr_gk20a_setup_rop_mapping+0x5e4/0x2018
[ 50.082913] [<ffffffc000d2559c>] gr_gk20a_init_fs_state+0x80c/0x1028
[ 50.089259] [<ffffffc000ddcbc8>] gr_gm20b_init_fs_state+0xc8/0x960
[ 50.095430] [<ffffffc000e413f8>] gr_gp10b_init_fs_state+0x5c0/0x5d8
[ 50.101687] [<ffffffc000d2ed30>] gk20a_init_gr_setup_hw+0x1b48/0x2418
[ 50.108115] [<ffffffc000d50bc0>] gk20a_init_gr_support+0x19e0/0x1ab0
[ 50.114457] [<ffffffc000cc7af8>]
gk20a_pm_finalize_poweron+0xd20/0x1558
Fix this by adding below
- allocate gr->map_tiles[] with size of (num_gpc * num_tpc_per_gpc)
intead of num_gpc
- add new static API gr_gk20a_get_map_tile_count() which returns
tile count for given index, and returns 0 for out-of-bounds access
Bug 200257557
Change-Id: If572837ffb661f92a21be5ce855d0146b2609cb0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1279411
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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gk20a.h includes pmu_gk20a.h, which #includes gpmuifboardobj.h,
which recursively #includes gk20a.h without needing anything from it.
Remove the #include to improve built time.
gpmuifboardobj.h also includes pmu_gk20a.h, when it actually needs a
definition from pmu_common.h. Change the #include to prevent another
recursive #include.
Bug 200192125
Change-Id: Idb8c13bceeae1a60a4efa466c07e78cb15ffa1fb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1280348
GVS: Gerrit_Virtual_Submit
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During construct of some VFE/CLK boardobjs, some data is
filled after a boardobj allocation is done.
Free up boardobj memory if an error is encountered in the data
filling.
Coverity ID 490171
Coverity ID 490172
Bug 200192125
Change-Id: I20621f7f9f9e379b8dced4905cd417c2ffa905b0
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1280700
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Internally we use GPC2CLK in the arbiter, but we should expose
GPCCLK on kernel API and in user space. Added GPCCLK on the ioctl
API. Arbiter uses GPC2CLK to make queries, then converts to GPCCLK.
Jira DNVGPU-210
Change-Id: Id0b8134d0505c1f9bfd655a08e902bdcd03ebd96
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1280316
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Previous patch added ability so set default PRI timeout and
set it for one of the dGPU boards. Set the timeout to all
known dGPU boards.
Bug 200246808
Change-Id: I645ca8b4a51d61c924a9f52b1fc6e884795adf19
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1264304
Reviewed-on: http://git-master/r/1280436
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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In lsfm_discover_ucode_images(), we currently collect
pmu ucode details with API pmu_ucode_details()
But if this API fails, we still continue loading
other firmwares
In case loading of pmu firmware fails due to some reason,
we should actually bail out immediately with error
Also, remove unnecessary chekc (ucode_img.lsf_desc != NULL)
since pmu_ucode_details() ensures that this cannot be
NULL
Bug 200265373
Change-Id: I68e7f9575e2a07b473ceacc528a5d172b58d6fb6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1276555
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement SW method SET_RD_COALESCE to implement correct handling
of texture read coalescing.
Bug 200223870
Change-Id: Icd6f987b72d78e5add4076fc550e2070eba70628
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1271303
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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And reduce pri timeout to match PCIE specs
bug 200246808
Change-Id: I0225ae964b5635665fe774c43f773d0ce86650ab
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1264179
(cherry picked from commit 1c3dbf8324b7ec5d06bd0e57e7deee9a1c8e9411)
Reviewed-on: http://git-master/r/1280328
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Implement the permanent disable_aspm() function for XVE on gp106.
Bug 200256272
Change-Id: I63338415542381d8a43d746d9d4404a74a5f01cd
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1263273
(cherry picked from commit 7890419f242a50c6d8ec27c3e8eb331823230ed9)
Reviewed-on: http://git-master/r/1280309
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Disable ASPM on boot for PCIe platforms.
Bug 200256272
Change-Id: I0dc63c1a5a9941a5ecdc6a5d691c0b780fb9a6b5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1263272
(cherry picked from commit bf576ea8a88326d107b3a91d196fe6d6018185f6)
Reviewed-on: http://git-master/r/1274478
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add a platform flag and logic to disable ASPM on boot if a
platform does not want ASPM enabled.
Bug 200256272
Change-Id: I378997290377ef8ffa21bf8e7f3f59fa134b3d4d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1263271
(cherry picked from commit 01e4700b74f4b4c6f0b9ffb40747653f2b63ea3c)
Reviewed-on: http://git-master/r/1274477
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Handle possible asynchronous GPU driver shutdown more gracefully.
This occurs when the GPU disappears from the PCI bus, for example,
if it overheats or detects an over current event.
Also add a preprocessor check to make sure that the
gk20a_channel_cancel_pending_sema_waits()
is always defined. In some builds CONFIG_SYNC is disabled but the
gk20a_remove_support() code does not check for this.
Bug 1816516
Bug 1807277
Change-Id: I932e312291c5c6a6ac5e13525ce8ca56a1be3652
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250028
(cherry picked from commit 337810f8c478238a38d8553c1492622d5fa9aafa)
Reviewed-on: http://git-master/r/1274476
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Move the code that waits for deferred interrupts to nvgpu_common.c and
make it global. Also rename that function to use nvgpu_ as the function
prefix.
Bug 1816516
Bug 1807277
Change-Id: I42c4982ea853af5489051534219bfe8b253c2784
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250027
(cherry picked from commit cb6fb03e20b08e5c3606ae8a5a9c237bfdf9e7da)
Reviewed-on: http://git-master/r/1274475
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Fix miscellaneous issues seen during driver shutdown.
o Make sure pointers are valid before accessing them.
o Busy the GPU during channel timeout.
o Cancel delayed work on channels.
o Avoid access to channels that may have been freed.
Bug 1816516
Bug 1807277
Change-Id: I62df40373fdfb1c4a011364e8c435176a08a7a96
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250026
(cherry picked from commit 64a95fc96c8ef7c5af9c53c4bb3402626e0d2f60)
Reviewed-on: http://git-master/r/1274474
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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In many helper functions like gk20a_readl() the code assumed that
the GPU is present and registers and available. However, during
GPU shutdown this may not be the case.
In theory the driver should not be accessing GPU registers during
GPU shutdown (since shutdown is triggered by GPU registers being
unavailable) but these changes handle any missed cases where this
may happen.
This goes for GPU device access as well. Many parts of the code
assume that if the struct gk20a is valid, the the GPU dev must be
there are well. This isn't always the case, it seems.
Bug 1816516
Bug 1807277
Change-Id: Icaf6fd56ab7860724e77bda0f5e8d48f0da15642
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250024
(cherry picked from commit e8c9997b2d7cd424d798ecfce1307e6193c0cf32)
Reviewed-on: http://git-master/r/1274473
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Enable FECS ctxsw tracing for gp106. Ensure that FECS records
have been written to memory before accessing the ring. Update
read index only once all records have been processed.
Jira EVLR-424
Change-Id: I1a21f841fcce1588397408906d77e2c3bf4a8c01
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1258243
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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nvgpu_clk_arb_init_arbiter() allocates master structure arb, and
sub-structures which is assigns as members of arb. At failure,
there's a single error label, and it tries to free the members of
arb without checking that arb was allocated.
Change-Id: Ifac7552b05dad17036835eb3ee624eae351ccb7d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279226
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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nvgpu_clk_arb_install_fd() leaks dev if it cannot create an fd,
and it leaks both dev and fd if it fails to create a file.
Change-Id: I65c03401dba44d88be543d3aec2fa3fcd2fb0dcc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279225
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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clk_prog.h and clk_vin.h refer to boardobjgrp_e32 and
boardobjgrp_e255.h. Add explicit #includes for their definition.
Change-Id: Ib651b071f3c17bbc30ddaea0ef9bc5437ec9f2f4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279224
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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We retrieve perf table from VBIOS only if respective HAL op is
implemented. Later in code we unconditionally dereference the pointer
which can lead to NULL pointer access.
Fix by early aborting creation of devinit tables if the perf VBIOS
getter is missing.
Change-Id: If48aa6dac724056dd1feb2ef520e343736d4db85
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279223
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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We use GPU reference clock as a divider. Check before division that
reference clock is not zero.
Change-Id: Ie453a78b422b2e740daeb7c12ce5b06faa52ba76
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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In gk20a_submit_prepare_syncs(), after we have allocated wait_cmd
we check the results. If we failed to allocate wait_cmd, we still
jump to the error label that tries to free wait_cmd.
Create an own error labal for allocation before wait_cmd, and use
that if we fail to allocate wait_cmd.
Similarly create an error label for incr_cmd, and use that only once
incr_cmd has actually been allocated.
Change-Id: I1f8bc1d947c524038f5f237358a5e6b0dc2e6ac3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275742
GVS: Gerrit_Virtual_Submit
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When allocating job channel_gk20a_job structure we assign the result
of allocation to *job_out, but we check the result of allocation
in job_out.
Change the check to check for result in *job_out.
Change-Id: Ia170cfa2dd5730665434b4c223c5a2f9502c744d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275741
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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We first load VBIOS firmware from file, and then attempt to allocate
space into which we copy the data. If allocation fails, we do not
release the firmware.
Add a release_firmware() in the error path.
Change-Id: Iaa995e93bf8d5a23e08c5e332f70b203ac2e09db
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275740
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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boardobjgrp.h #includes boardobjgrp_e32.h and boardobjgrp_e255.h.
They in turn #include back boardobjgrp.h.
Remove recursion.
Change-Id: Ic0eb8ddf3ddd3996302fe2b74d9e3ff8e395b1b7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275739
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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When we allocate boardobj object, we assign the allocated address
to *ppboardobj. The check for result of allocation checks looks
at address in ppboardobj.
Fix the check so that it actually checks results of kzalloc().
Change-Id: I90fda36afd1627efcf2fdea46bcd7ad1a7e3bb51
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275738
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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voltage_get() defines det_out as u32. That variable is used to
calculate a 64-bit result, so cast det_out to u64.
Change-Id: I054ec299a4c7961cb38dd5ac0cbf0ac173b09efb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1267692
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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Fix slab-out-of-bounds issue reported by KASAN
[ 29.922710] BUG: KASAN: slab-out-of-bounds in
gr_gk20a_init_fs_state+0x1bc/0x898 at addr ffffffc1a0988c04
...
[ 29.961820] INFO: Allocated in gr_gk20a_init_gr_config+0x380/0x1b20
age=374 cpu=5 pid=1
...
Out-of-bound access from
[ 30.241943] [<ffffffc0007d2674>] gr_gk20a_init_fs_state+0x1bc/0x898
[ 30.248205] [<ffffffc000839a2c>] gr_gm20b_init_fs_state+0x4c/0x5c8
[ 30.254381] [<ffffffc000871670>] gr_gp10b_init_fs_state+0x160/0x3a8
[ 30.260643] [<ffffffc0007d70ec>] gk20a_init_gr_setup_hw+0x974/0x1530
[ 30.266991] [<ffffffc0007eac6c>] gk20a_init_gr_support+0x14c/0xeb0
[ 30.273164] [<ffffffc00079d9c8>]
gk20a_pm_finalize_poweron+0x738/0xd10
[ 30.279684] [<ffffffc00079dfd0>] gk20a_pm_runtime_resume+0x30/0x58
Fix this by using a separate API gr_gk20a_get_tpc_count()
which returns tpc count for a gpc and returns 0
if gpc index is greater than available gpcs
Bug 200257557
Change-Id: I78856ca93c0381cb4bcef7a56a5210fa269cf3ac
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1277692
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Compile local t18x code from nvgpu repo (in case
CONFIG_ARCH_TEGRA_18x_SOC config is set)
instead of compiling from $(srctree)/../nvgpu-t18x
Remove Makefile.nvgpu-t18x since this Makefile is
not needed now
Bug 200266498
Change-Id: Ib8ef39be7e948debe0ff895c904a6c370a5711a6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1277119
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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'remotes/origin/dev/merge-nvgpu-t18x-into-nvgpu' into dev-kernel
Merge T186 - gp10b/gp106 code into common nvgpu repo
Bug 200266498
Change-Id: Ibf100ee38010cbed85c149b69b99147256f9a005
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
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In gr_gp10b_set_preemption_mode(), skip setting anything
if both graphics and compute preemption modes are
already set
Bug 200263471
Change-Id: I2788464750835da8f6396c6c1ca8356a63758c80
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1275465
GVS: Gerrit_Virtual_Submit
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- PG statistics read support for multiple engines
JIRA DNVGPU-71
Change-Id: I2dc3aad243300d21dc3d20a54a5e4736977e071b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1250507
(cherry picked from commit 985cb3be1d6d990bc6651e417d9e6ba9bfe306e0)
Reviewed-on: http://git-master/r/1270991
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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- update gp106 pg engine init/list/features HALs
to support MS engine
- Added defines & interface for lpwr tables read from vbios.
- lpwr module which reads idx/gr/ms table from vbios to
map rppg/mscg support with respective p-state
- lpwr module public functions to control lpwr
features enable/disable mscg/rppg & mclk-change
request whenever change in mclk-change parameters
- lpwr public functions to know rppg/mscg support for
requested pstate,
- added mutex t prevent PG transition while arbiter
executes pstate transition
- nvgpu_clk_arb_get_current_pstate() of clk arbiter to
get current pstate
JIRA DNVGPU-71
Change-Id: Ifcd640cc19ef630be1e2a9ba07ec84023d8202a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247553
(cherry picked from commit 8a441dea2410e1b5196ef24e56a7768b6980e46b)
Reviewed-on: http://git-master/r/1270989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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- Added rppg module to init GR/MS-RPPG.
mscg is dependent on gr-rppg & without
gr-rppg engage mscg does not engage.
- Update pg engines HAL to return supported
pg engines & its sub features
JIRA DNVGPU-71
Change-Id: Ib0fd2d79b509f6f2f1dabae6e2b5aebcc80b5691
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247486
(cherry picked from commit 86e45fa62e6a6b295f73c0173f0117ae9f78a5e9)
Reviewed-on: http://git-master/r/1270762
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Currently sparse mapping is not supported for gp10b
in virtualized environment. Modify gpu characteristics
to reflect non-implementation of this functionality.
Also fix return value in vgpu_gp10b_locked_gmmu_map()
on error condition.
Bug 200243373
Change-Id: Ia367b923b87738a5cad0617cdb074f5a24fb1c81
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1269710
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
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(1) Adding additional debug in case of VF update failure
(2) The length of the tables must be re-initialized
prior to requesting the vf table update
JIRA: DNVGPU-193
Change-Id: Id5a369359bc5f52ee58da539bfc3ec1ec7887de1
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1252061
(cherry picked from commit dfb6fec02f8e3ff6a22bbea000347923b0306018)
Reviewed-on: http://git-master/r/1274547
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Current code cast casting the frequency to 16 bit
before division, giving out incorrect data
JIRA DNVGPU-164
Change-Id: I4eb1fa73fb9e8963f550d3d853db39b49b990fa4
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1251663
(cherry picked from commit c0d91a054f8278af9a2383bb3f837465779132a9)
Reviewed-on: http://git-master/r/1274546
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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JIRA: DNVGPU-180
Change-Id: I1928e77cea4ac87bf2ba2b6b7b2f2942dfb97de9
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1251493
(cherry picked from commit 7b8a105652a3169d9ec0cb7ce52c3b92e42ca310)
Reviewed-on: http://git-master/r/1274545
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Use common fuse write API tegra_fuse_control_write
which should work on all kernel versions
Bug 200262155
Change-Id: I29e8514e9660549ecf94711287ec4bbf4c897a86
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1270169
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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