| Commit message (Collapse) | Author | Age |
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JIRA DNVGPU-23
Change-Id: I47c8d89e65b9bdb30b1399728d51bba77c3929ae
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1148389
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Use gp10b version of GR floorsweeping function.
Change-Id: I5715672b5f94b779165f44c78aec14a2836928e7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1144905
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Added support for multiple PBDMAs handling during
fifo_pbdma_isr and gk20a_init_fifo_reset_enable_hw
use case.
JIRA DNVGPU-26
Change-Id: I2e70c6f9a724899aaef179ae015149d7127f227b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1145603
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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To support vidmem, pass g and mem_desc to the buffer memory accessor
functions. This allows the functions to select the memory access method
based on the buffer aperture instead of using the cpu pointer directly
(like until now). The selection and aperture support will be in another
patch; this patch only refactors these accessors, but keeps the
underlying functionality as-is.
JIRA DNVGPU-23
Change-Id: Ie2cc17c4a0315d03a66e92fb635c217840d5399e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1128863
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Below definitions of preemption modes are deleted:
NVGPU_GR_PREEMPTION_MODE_GFXP
NVGPU_GR_PREEMPTION_MODE_CILP
Use new definitions defined in nvgpu-t18x.h
NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP
NVGPU_COMPUTE_PREEMPTION_MODE_CILP
Bug 1646259
Change-Id: Ieff51e41ef34eb61357f95778c400c8a3fa330c8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1133597
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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For gv11b, set platform data for soc memory aperture type
to sysmem instead of vidmem.
Bug 1749338
Change-Id: I6632e79e3ca68c437e5b04f6865f8f0b6f2943ce
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1129169
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Add checkpatch.pl and dependent spelling.txt file to
newly added kernel repo's.
We might need to update the added files incase there is
any modification happens in mentioned files within kernel-next.
Bug 200192360
Change-Id: Id6eb52070ea7d76b81e9bff8461f1251a0e2c0b1
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1128694
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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In gv11b, soc memory needs to be accessed as sysmem instead of videmem.
Bug 1749338
Change-Id: I325c107958229cf717b0b0f18dd123597d1d7567
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1128377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Fixed following sparse warnings:
drivers/gpu/nvgpu/gv11b/gv11b.c:21:5: warning:
symbol 'gv11b_init_gpu_characteristics' was not declared. Should it be static?
drivers/gpu/nvgpu/gv11b/hal_gv11b.c:36:5: warning:
symbol 'gv11b_init_hal' was not declared. Should it be static?
drivers/gpu/nvgpu/gv11b/gr_gv11b.c:766:5: warning:
symbol 'gr_gv11b_alloc_buffer' was not declared. Should it be static?
Bug 200088648
Change-Id: I327f9d69bf1853727d74d2c125cfab54c2f0e5b0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1128299
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Included all basic ops for gv11b and updated
sm related functions to include new priv register
addresses.
Bug 1735757
Change-Id: Ie48651f918ee97fba00487111e4b28d6c95747f5
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126961
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Updated priv registers related to sm re-organization
Bug 1735757
Change-Id: I5656f87c17fb3d95a162f06d96d29dab25d648f8
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1126960
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 1735757
Change-Id: Iea7488551a437afa0dfc005c87ad1b9ab9673b6c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1122123
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Add gv11b header to export gv11b arch info.
Bug 1735757
Change-Id: I66551eb6bd46652c2f1af3fe512060f5b7febef2
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1121508
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Add initial versions of header for gv11b
Bug 1735757
Change-Id: I76f85bbe98c1fa13c11d8ee1b2889703f62c6f67
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1121486
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
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