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* gpu: nvgpu: Fall-back to generic platformArto Merilainen2015-03-18
| | | | | | | | | | | | | | | | | Currently the generic platform is used only if the device tree defines that we have a generic platform available, however, the generic platform is fully compatible with the gk20a we have in tegra. This patch modifies the definitions so that we use generic platform also for tegra - even if if tegra configuration option is not enabled. Bug 1434573 Change-Id: Ib35ce0ab935d27764e960bf4d74a5016ae047a1f Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/396867 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: Control powergating on regopsSandarbh Jain2015-03-18
| | | | | | | | | | | | | | | Enable/disable powergating around regops so that the user need not call the powergating IOCTLs with the regops IOCTL. If the user does call the powergating IOCTL then the ref-counting will ensure the correct behavior. Bug 1451949 Change-Id: I1746f7d7cd1d2c0c497c213939df44a59d5d2834 Signed-off-by: Sandarbh Jain <sanjain@nvidia.com> Reviewed-on: http://git-master/r/395131 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Create sysfs symlinksArto Merilainen2015-03-18
| | | | | | | | | | | | | | | gk20a is going to be moved under platform bus, however, the sysfs interface should remain stable over the transition period. This patch adds a symlink to keep current interfaces stable. Bug 1311528 Bug 1434573 Change-Id: I951000f4b25285ff96e93eb726342d5b76cc84f1 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/396926 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Get host1x device from DTSArto Merilainen2015-03-18
| | | | | | | | | | | | | | | Currently the gpu driver assumes that the GPU is a child of host1x. This is an invalid assumption and therefore we need to get the host1x device from device tree based on nvidia,host1x property. Bug 1311528 Bug 1434573 Change-Id: I097e39369aaa15ab6652cd23f353f88f7c2b9c48 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/395664 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Disable timeout if not on siliconTerje Bergstrom2015-03-18
| | | | | | | | Change-Id: I0add505d4f5c4b136f9f0228adbdc9aba960fcba Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/404276 Reviewed-by: Antoine Chauveau <achauveau@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: Add support for SMSKED kindTerje Bergstrom2015-03-18
| | | | | | | | | | | Bug 1470957 Change-Id: Ief7c8970dafcc386a3a954593d4bb3a53be1b2a0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/404261 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chris Dragan <kdragan@nvidia.com> Tested-by: Chris Dragan <kdragan@nvidia.com>
* gpu: nvgpu: gk20a: Update perfmon initPrashant Malani2015-03-18
| | | | | | | | | | | | | | | | | Make the perfmon sampling configurable, by adding an 'enabled' flag. This is set according to the CONFIG initially. Modify the perfmon event handler to not touch clock rates. Add a counter to count the number of perfmon events. Also add debugfs entries for the above. Bug 1410515 Change-Id: Ic8197eef0e46e35af1179a5b06140393541cfd43 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/351564 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Create load sysfs node alwaysArto Merilainen2015-03-18
| | | | | | | | | | | | | | | Currently creation of the load sysfs node is bound to devfreq profile initialisation, however, this information is useful even if the scaling is not enabled. This patch modifies the code to create the sysfs node always. Bug 1485489 Change-Id: Id20433344aa81108f89a36cd56c9a73dd9d2e1c8 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/399474 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Fix return value in pmu mutex releaseArto Merilainen2015-03-18
| | | | | | | | | | | | Bug 1495617 Change-Id: I689ed4303bb3959bb24bf79d52891de28431fc67 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/394904 (cherry-picked from commit a04c51430b186d23953960965ce3ab229968d1f7) Reviewed-on: http://git-master/r/399565 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: set syncpt_aggressive_destroyDeepak Nibade2015-03-18
| | | | | | | | | | | | | | Set the flag syncpt_aggressive_destroy to enable destroying syncpts aggressively Bug 1305024 Change-Id: Iedff9c6bdb6bbe02057972733126ce685daa8d7f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/400234 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: add syncpt null checksDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | On channel_finish() path, we first check if last submit was WFI and in that case we do not submit new WFI but just wait on old syncpt fence. But it is possible that sync resource is already freed from another path (channel_suspend()) Hence add a NULL check there to prevent Null pointer exception. Also, in channel_free() path, move syncpt free API after channel_unbind() since we logically free the syncpt after unbinding the channel. Bug 1305024 Change-Id: Icc2fc83f004310560fc459527e1d37730428ec2d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/400233 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: free syncpt when channel becomes idleDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | All of the channel's submit jobs are added to the list channel->jobs In channel_update(), we iterate over this list and check if any job has completed. If any job is complete then we remove it from the list. If this list is empty then it means channel is idle and we can free its syncpt. Hence after iterating this list, check if it is empty or not. If it is empty AND if we are aggressive to free the syncpt (syncpt_aggressive_destroy flag is set) then free the syncpt at this point. Keep the syncpt free code inside submit_lock to avoid race conditions. Also, do not free the syncpt if we have already scheduled WFI on some other path. In that case, syncpt is still needed to check for channel idle. Once WFI completes, we free the syncpt anyway. Bug 1305024 Change-Id: I1654e1db3b76b7ad14644dbb900b03f195ca3b2c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/398617 Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gk20a: add submit_lockDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add submit mutex lock to avoid race conditions between submitting a job, removing a job and submitting WFI With this lock make below operations atomic : during submit_gpfifo() - 1. getting new syncpt 2. inserting syncpt increment 3. submitting gpfifo 4. setting job completion interrupt during submit_wfi() - 1. getting new syncpt 2. inserting syncpt increment when idle during channel_update() - 1. checking the submit job completion 2. freeing the job if it is completed Bug 1305024 Change-Id: I0e3c0b8906d83fd59642344626ffdf24fad2aaab Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/397670 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: gm20b: Alloc phys mem for CBC in simArto Merilainen2015-03-18
| | | | | | | | | | | | | | | CBC frontdoor access works incorrectly in the simulator if CBC is allocated from IOVA. This patch makes CBC allocation to happen from physical memory if are running in simulator. Bug 1409151 Change-Id: Ide08f4eab6911adc5737001c6d751ee227fec8f9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/401544 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: Implement gm20b fifo recoveryTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Implement gm20b version of fifo recovery. Bug 1495967 Change-Id: I2792b217178d157427f49e0c450d4ac620399962 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/394138 Reviewed-on: http://git-master/r/401402 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
* gpu: nvgpu: gm20b: Add fuse headerTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I85038d320ed224074eca14c32d7cb6fd3ed79070 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/401500 Reviewed-by: Automatic_Commit_Validation_User
* gpu: nvgpu: gk20a, gm20b headersKen Adams2015-03-18
| | | | | | | | update headers from latest gen_register/ip_check info Change-Id: Iae892ab7138e7bba4abc821b9d7893e768647daa Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/399382
* gpu: nvgpu: gk20a: minor fixesKen Adams2015-03-18
| | | | | | | | | fixes one use of unitialized var renames a register to make it match dev_* file. Change-Id: Iafba659bbf2df509e0b494b2c5dab3819bf650ef Signed-off-by: Ken Adams <kadams@nvidia.com> Reviewed-on: http://git-master/r/394792
* gnu: nvgpu: gm20b: CBC clean and invalidateBo Yan2015-03-18
| | | | | | | | | the CBC clean and invalidate is done for gk20a for bug 1409151, now it's time to do the same fo gm20b. the text of this change is strictly copied from gk20a, simply to make build pass. Change-Id: Id717cb1e2ca0fa3f8483c3fd40d7629a9cc85ec9 Signed-off-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: select NETC for gm20bKevin Huang2015-03-18
| | | | | | | | | | | Change-Id: I6e7b5e77907033c7e7cbcc32cae200d46a3700ea Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/387381 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/397712 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Separate gm20b configurationTerje Bergstrom2015-03-18
| | | | | | | | | | | Separate gm20b platform data from gk20a data. Change-Id: Ie90ebc9e06ba94dfe852dfe07c163cd00fd90a9c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396376 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Call railgate only if definedTerje Bergstrom2015-03-18
| | | | | | | | | | | Call railgate and unrailgate ops only if they are defined. Change-Id: I0a87ac0259af3719098d4372be7e25f0a54416fc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/396375 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Do not wait for FE idle on linsimTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Waiting for FE idle hangs on simulation, so skip it. Change-Id: I4f49eab725fcf2eb0b8340040a79731e16a1a0a0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/394053 Reviewed-on: http://git-master/r/396374 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: add gm20b channel opKevin Huang2015-03-18
| | | | | | | | | | | | | | Bug 1450792 Change-Id: I09f7c727a773178613fe555eb025ac324da0008e Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/381128 Reviewed-on: http://git-master/r/396373 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* gpu: nvgpu: Add GPU driver for GM20BBo Yan2015-03-18
| | | | | | this moves GM20B driver to the new location Change-Id: I5fde14e114a8db79738a4c61849912b1ae225fb5
* video: tegra: gk20a: remove redundant codeBo Yan2015-03-18
| | | | | | | | | | | | | gk20a_ltc_init_comptags and gk20a_ltc_clear_comptags are defined in ltc_gk20a.c, gm20b has its own init/clear functions, so remove these two from ltc_common.c change nvhost_allocator_init to gk20a_allocator_init, this is a left-over after rebase, just like the above 2 function definitions, so fix it. Change-Id: I829639dd7fee9110dd65d5df7d7f0f8fe5fca6c1 Signed-off-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: gk20a: Remove duplicated codeTerje Bergstrom2015-03-18
| | | | | | | | | | Two calls to gk20a_init_gpu_characteristics() is not needed. GPU sim aperture was defined twice. Change-Id: Iaf78611717c55b1cae456358fcae2641ad552d9f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383855 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Re-enable gm20b driverTerje Bergstrom2015-03-18
| | | | | | | Change-Id: I473d7ac712afc10bc255d57d441965556fa0e957 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/383840 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gm20b: Implement gr opsTerje Bergstrom2015-03-18
| | | | | | | | | | | Implement gm20b specific gr ops. Bug 1387211 Change-Id: I4523311f1c155ba2d3403dcf222769f6817b2450 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/362415 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
* video: tegra: host: Move LTC debugfs codeAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the LTC debugfs sync code to the gk20a LTC code. Change-Id: I145b04e1e8aade170c2e9c6b3beb60774c6124f2 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366178 (cherry picked from commit c099b4fde779942d7559248c30a2df55aa4fd4f4) Reviewed-on: http://git-master/r/376515 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: commonize set ZBC color entryAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the set_zbc_color_entry() operation to the LTC common code as this is part of the LTC. Change-Id: Iba41e32e273d86fcf76094440c2313a75a928326 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366174 (cherry picked from commit 569ce1f3370532f12face62664a07d2d17a96bef) Reviewed-on: http://git-master/r/376505 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: comptag init and clearAlex Waterman2015-03-18
| | | | | | | | | | | | | | Move the comptags cache init and clear operations to the LTC from the gr code as this is part of the LTC. Change-Id: I2163a09bcfe68a8833d5135bfa4035f37c7157ab Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/366173 (cherry picked from commit f56d4723f996f0dd2fcf0ae4279dbc4b6483b405) Reviewed-on: http://git-master/r/376504 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: t210: Fix opsPrashant Gaikwad2015-03-18
| | | | | | | | | Change-Id: I99deddd7323f9ee7f8de4a032296ceeaebd81a95 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/375310 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
* video: tegra: host: Read GPU arch earlyTerje Bergstrom2015-03-18
| | | | | | | | | | | | Read GPU architecture and implementation early. Bug 1387211 Change-Id: Iffc1aa013f28ec786b0325ae055d016cf004ee06 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/360237 (cherry picked from commit b7071920b90ff1b21a5d14039e609a95ba48bd64) Reviewed-on: http://git-master/r/359754
* video: tegra: gpu: provide generic ops interfaceAlex Waterman2015-03-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an interface for the gk20a driver to have generic ops which are implemented by a chip specific HAL layer. The HAL layer is provided by the gpu_ops struct which defines function pointers for chip specific oeprations. This is necessary for supporting multiple chips with the same code base and minimal per chip hacking. Also, since much code is common except in the HW headers that are needed, the LTC common code is compiled by first including the necessary chip specific header(s) and then including the ltc common code file. This allows for easy updating of functions that are only different between chips as a result of register offset and field changes whereas the HAL provides the mechanism for functions that have actual semantic changes. Change-Id: I96f9a8350d34e7e101beb141d4521fab69dcfbae Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/360627 (cherry picked from commit fe90cad939cf979fc2516a96e5911bd8ab6fc457) Reviewed-on: http://git-master/r/362228 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: add gm20b platform dataKevin Huang2015-03-18
| | | | | | | | | | Bug 1387211 Change-Id: If093c1f64ed8f79099ea8f115db6c91177a5e3ef Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/359987 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
* video: tegra: host: gk20a: GM20B characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | This patch adds initial support for GM20B for GPU characteristics IOCTL. Bug 1392902 Change-Id: I55bfb7e087244eae1462d44319bd91c7c0901c2e Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/359227 Reviewed-by: Automatic_Commit_Validation_User
* video: tegra: host: gk20a: GPU characteristicsSami Kiminki2015-03-18
| | | | | | | | | | | | | | | | | | | This adds new IOCTL that provides information for the userspace for GPU characterization. Specifically, the following items are provided: GPU arch/impl/rev, number of GPCs, L2 cache size, on-board video memory size, num of tpc:s per gpc, and bus type. The primary user of the new IOCTL will be rmapi_tegra. Bug 1392902 Change-Id: Ia7c25c83c8a07821ec60be3edd018c6e0894df0f Reviewed-on: http://git-master/r/346379 (cherry picked from commit 0b9ceca5a06d07cc8d281a92b76ebef8d4da0c92) Reviewed-on: http://git-master/r/350658 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
* gpu: nvgpu: Handle missing DMA addressSami Kiminki2015-03-18
| | | | | | | | | | | | | If DMA address is not defined, use the physical address. Bug 1500983 Change-Id: Ic33b21f74c8c2760e43146b87eec7ea467fc87be Signed-off-by: Sami Kiminki <skiminki@nvidia.com> (cherry picked from commit 8ae9a6567349241ce1cfff383526b0d9d39c28a1) Reviewed-on: http://git-master/r/415238 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Turn off scaling when not poweredSantosh Katvate2015-03-18
| | | | | | | | | | | | | | | | | | | | | This far the scaling has been disabled only when we suspend the system and therefore we unnecessarily keep gpu workers running even if the gpu itself would be railgated. This is not proper behaviour and it causes a race in suspend sequence. This patch reorders scaling disable to happen always when we turn off the GPU. Bug 200004860 Change-Id: Ief0bfd89378d5a7ced26c3ef29094dd5c378b01a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/410443 (cherry picked from commit bcae65bea24be2a1e0abe42522d99ba70c94cbe2) Reviewed-on: http://git-master/r/413249 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
* gpu: nvgpu: mm: free allocations on validate errorShridhar Rasal2015-03-18
| | | | | | | | | | | | | Free allocated virtual address when marking PTE for validation or update fails. Bug 1479803 Change-Id: I9a8bd7c245b478f4252a261f246002fcc65d750d Signed-off-by: Shridhar Rasal <srasal@nvidia.com> (cherry picked from commit b5c0ad4e00dfc86b65e8efe3d8691b5cfaafbe4c) Reviewed-on: http://git-master/r/415248 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* gpu: nvgpu: Disable pm runtime on shutdownArto Merilainen2015-03-18
| | | | | | | | | | | | | | In some cases the gpu has still work pending while the device is being suspended. This patch forces pm runtime to be disabled for the device to avoid powering up the gpu unnecessarily. Bug 1515437 Change-Id: I4b57d72eb34e794f0457d7a074d26c9d096a13b3 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/411968 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: fix pte memory leakKirill Artamonov2015-03-18
| | | | | | | | | | | | | | | Force cleanup of all GMMU PTEs when releasing vm. bug 1514178 Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Change-Id: Ice1ff837ca4decbdec2d4a78ea5eb64bfeefc0db Reviewed-on: http://git-master/r/411198 (cherry picked from commit e14ee5646554fd6cd812f4e7edf220c40116d722) Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/411895 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
* gpu: nvgpu: Balance usage count on resume failTerje Bergstrom2015-03-18
| | | | | | | | | | | | | | | | If PM runtime resume fails, pm_runtime_get_sync() still increments the usage count. Balance the usage count by decrementing it on fail. Bug 200003289 Change-Id: I127d2697ff2601d4884a4ecfdec8ad50894bf7d0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/411285 (cherry picked from commit 736846ff999bb9d1ca3340fc02ab49f8c65c4145) Reviewed-on: http://git-master/r/411473 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
* video: tegra: host: gk20a: add class perf settingsRandy Spurlock2015-03-18
| | | | | | | | | | | | | | | | | Add a place to edit context-switched perf settings based upon class. Disable tex-lock as the first of such for compute. Bug 1409041 Change-Id: I5317a2a2e5f855661a1400b42f69211d16ae0c1d Signed-off-by: Randy Spurlock <rspurlock@nvidia.com> Reviewed-on: http://git-master/r/405908 (cherry picked from commit 250e149be35ecb8893dcef053ec44ffea86c302a) Reviewed-on: http://git-master/r/407094 (cherry picked from commit 54337c08cbf6c2c6b5c929c1be24e87165d9d946) Reviewed-on: http://git-master/r/408837 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
* gpu: nvgpu: gk20a: add fecs error intr handlerDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | | | Add handler gk20a_gr_handle_fecs_error() in case we have pending fecs error interrupt And clear this interrupt after handling. Also, in gk20a_gr_handle_fecs_error(), for now just print the contents of NV_PGRAPH_FECS_INTR and clear it Bug 1495957 Change-Id: Ie7f70c84ec76ab698141646cd683584c4501e3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/402874 (cherry picked from commit a29f219c57d65a06f6dae8086f19fa1af94d95bd) Reviewed-on: http://git-master/r/403587 (cherry picked from commit e65ebebd0d4d5c3dbb6fa454dd51c383ea13d715) Reviewed-on: http://git-master/r/411160 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: gk20a: add fecs intr h/w headersDeepak Nibade2015-03-18
| | | | | | | | | | | | | | | | | | | | add below hardware headers for fecs error interrupt : gr_fecs_intr_r() gr_intr_fecs_error_reset_f() gr_intr_fecs_error_pending_f() Bug 1495957 Change-Id: I0c1d606ae766f1e6badbbaa1288bb08a37bff842 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/402873 (cherry picked from commit 00ce5e538dc6669bfaeb9f81b8506b3ae8472faf) Reviewed-on: http://git-master/r/403586 (cherry picked from commit 2476df761199187ac53ba668603cf1917d455626) Reviewed-on: http://git-master/r/411159 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
* gpu: nvgpu: fix memory leak in regops ioctlKevin Huang2015-03-18
| | | | | | | | | | | | | | | | Bug 200003921 Change-Id: Iebaca62793201ae86ce5f2cf4af3fc870a2aa3a6 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/408415 (cherry picked from commit 7d8fd07a26e33ba53a71dae475dc1074d52767a8) Signed-off-by: Hridya <hvalsaraju@nvidia.com> Reviewed-on: http://git-master/r/409832 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alka Mohite <amohite@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Tested-by: Deepak Nibade <dnibade@nvidia.com>
* gpu: nvgpu: Ignore lbreq interruptTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Even though we mask LBREQ interrupt, hardware will still indicate it in PBDMA interrupt register. Stop treating LBREQ as fatal. Bug 1498688 Change-Id: Iec4c199437c50951ed9289cb85faf0008646d5c0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408763 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
* gpu: nvgpu: Do not enable lbreq interruptTerje Bergstrom2015-03-18
| | | | | | | | | | | | | Lbreq interrupt can assert when there is memory back pressure. Do not enable it as either stalling or nonstalling interrupt. Bug 1498688 Change-Id: I02f94a64ab9df82402d80a632450d87457644d50 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408040 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-09 15:31:12 -0500