diff options
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/linux/nvgpu.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index a4693853..694c497c 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h | |||
@@ -24,13 +24,13 @@ | |||
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | /* | 26 | /* |
27 | * /dev/nvhost-ctrl-gr3d devices | 27 | * /dev/nvhost-ctrl-gpu device |
28 | * | 28 | * |
29 | * Opening a '/dev/nvhost-ctrl-gr3d' device node creates a way to send | 29 | * Opening a '/dev/nvhost-ctrl-gpu' device node creates a way to send |
30 | * ctrl ioctl to gpu driver. | 30 | * ctrl ioctl to gpu driver. |
31 | * | 31 | * |
32 | * /dev/nvhost-gr3d is for channel (context specific) operations. We use | 32 | * /dev/nvhost-gpu is for channel (context specific) operations. We use |
33 | * /dev/nvhost-ctrl-gr3d for global (context independent) operations on | 33 | * /dev/nvhost-ctrl-gpu for global (context independent) operations on |
34 | * gpu device. | 34 | * gpu device. |
35 | */ | 35 | */ |
36 | 36 | ||
@@ -197,7 +197,7 @@ struct nvgpu_gpu_mark_compressible_write_args { | |||
197 | 197 | ||
198 | 198 | ||
199 | /* | 199 | /* |
200 | * /dev/nvhost-tsg-gpu devices | 200 | * /dev/nvhost-tsg-gpu device |
201 | * | 201 | * |
202 | * Opening a '/dev/nvhost-tsg-gpu' device node creates a way to | 202 | * Opening a '/dev/nvhost-tsg-gpu' device node creates a way to |
203 | * bind/unbind a channel to/from TSG group | 203 | * bind/unbind a channel to/from TSG group |
@@ -221,9 +221,9 @@ struct nvgpu_gpu_mark_compressible_write_args { | |||
221 | #define NVGPU_TSG_IOCTL_LAST \ | 221 | #define NVGPU_TSG_IOCTL_LAST \ |
222 | _IOC_NR(NVGPU_IOCTL_TSG_PREEMPT) | 222 | _IOC_NR(NVGPU_IOCTL_TSG_PREEMPT) |
223 | /* | 223 | /* |
224 | * /dev/nvhost-dbg-* devices | 224 | * /dev/nvhost-dbg-gpu device |
225 | * | 225 | * |
226 | * Opening a '/dev/nvhost-dbg-<module_name>' device node creates a new debugger | 226 | * Opening a '/dev/nvhost-dbg-gpu' device node creates a new debugger |
227 | * session. nvgpu channels (for the same module) can then be bound to such a | 227 | * session. nvgpu channels (for the same module) can then be bound to such a |
228 | * session. | 228 | * session. |
229 | * | 229 | * |
@@ -407,16 +407,16 @@ struct nvgpu_fence { | |||
407 | }; | 407 | }; |
408 | 408 | ||
409 | /* insert a wait on the fence before submitting gpfifo */ | 409 | /* insert a wait on the fence before submitting gpfifo */ |
410 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_WAIT BIT(0) | 410 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_WAIT (1 << 0) |
411 | /* insert a fence update after submitting gpfifo and | 411 | /* insert a fence update after submitting gpfifo and |
412 | return the new fence for others to wait on */ | 412 | return the new fence for others to wait on */ |
413 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET BIT(1) | 413 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET (1 << 1) |
414 | /* choose between different gpfifo entry formats */ | 414 | /* choose between different gpfifo entry formats */ |
415 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_HW_FORMAT BIT(2) | 415 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_HW_FORMAT (1 << 2) |
416 | /* interpret fence as a sync fence fd instead of raw syncpoint fence */ | 416 | /* interpret fence as a sync fence fd instead of raw syncpoint fence */ |
417 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE BIT(3) | 417 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE (1 << 3) |
418 | /* suppress WFI before fence trigger */ | 418 | /* suppress WFI before fence trigger */ |
419 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_SUPPRESS_WFI BIT(4) | 419 | #define NVGPU_SUBMIT_GPFIFO_FLAGS_SUPPRESS_WFI (1 << 4) |
420 | 420 | ||
421 | struct nvgpu_submit_gpfifo_args { | 421 | struct nvgpu_submit_gpfifo_args { |
422 | __u64 gpfifo; | 422 | __u64 gpfifo; |
@@ -428,11 +428,11 @@ struct nvgpu_submit_gpfifo_args { | |||
428 | struct nvgpu_map_buffer_args { | 428 | struct nvgpu_map_buffer_args { |
429 | __u32 flags; | 429 | __u32 flags; |
430 | #define NVGPU_MAP_BUFFER_FLAGS_ALIGN 0x0 | 430 | #define NVGPU_MAP_BUFFER_FLAGS_ALIGN 0x0 |
431 | #define NVGPU_MAP_BUFFER_FLAGS_OFFSET BIT(0) | 431 | #define NVGPU_MAP_BUFFER_FLAGS_OFFSET (1 << 0) |
432 | #define NVGPU_MAP_BUFFER_FLAGS_KIND_PITCH 0x0 | 432 | #define NVGPU_MAP_BUFFER_FLAGS_KIND_PITCH 0x0 |
433 | #define NVGPU_MAP_BUFFER_FLAGS_KIND_SPECIFIED BIT(1) | 433 | #define NVGPU_MAP_BUFFER_FLAGS_KIND_SPECIFIED (1 << 1) |
434 | #define NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_FALSE 0x0 | 434 | #define NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_FALSE 0x0 |
435 | #define NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE BIT(2) | 435 | #define NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE (1 << 2) |
436 | __u32 nvmap_handle; | 436 | __u32 nvmap_handle; |
437 | union { | 437 | union { |
438 | __u64 offset; /* valid if _offset flag given (in|out) */ | 438 | __u64 offset; /* valid if _offset flag given (in|out) */ |
@@ -578,9 +578,9 @@ struct nvgpu_channel_events_ctrl_args { | |||
578 | #define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_submit_gpfifo_args) | 578 | #define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_submit_gpfifo_args) |
579 | 579 | ||
580 | /* | 580 | /* |
581 | * /dev/nvhost-as-* devices | 581 | * /dev/nvhost-as-gpu device |
582 | * | 582 | * |
583 | * Opening a '/dev/nvhost-as-<module_name>' device node creates a new address | 583 | * Opening a '/dev/nvhost-as-gpu' device node creates a new address |
584 | * space. nvgpu channels (for the same module) can then be bound to such an | 584 | * space. nvgpu channels (for the same module) can then be bound to such an |
585 | * address space to define the addresses it has access to. | 585 | * address space to define the addresses it has access to. |
586 | * | 586 | * |
@@ -666,8 +666,8 @@ struct nvgpu_as_bind_channel_args { | |||
666 | */ | 666 | */ |
667 | struct nvgpu_as_map_buffer_args { | 667 | struct nvgpu_as_map_buffer_args { |
668 | __u32 flags; /* in/out */ | 668 | __u32 flags; /* in/out */ |
669 | #define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET BIT(0) | 669 | #define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET (1 << 0) |
670 | #define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE BIT(2) | 670 | #define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE (1 << 2) |
671 | __u32 reserved; /* in */ | 671 | __u32 reserved; /* in */ |
672 | __u32 dmabuf_fd; /* in */ | 672 | __u32 dmabuf_fd; /* in */ |
673 | __u32 page_size; /* inout, 0:= best fit to buffer */ | 673 | __u32 page_size; /* inout, 0:= best fit to buffer */ |