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Diffstat (limited to 'include/uapi/linux/nvgpu.h')
-rw-r--r--include/uapi/linux/nvgpu.h29
1 files changed, 16 insertions, 13 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 64ac45b5..6fed9e9f 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -825,17 +825,6 @@ struct nvgpu_notification {
825#define NVGPU_CHANNEL_SUBMIT_TIMEOUT 1 825#define NVGPU_CHANNEL_SUBMIT_TIMEOUT 1
826}; 826};
827 827
828/* Enable/disable/clear event notifications */
829struct nvgpu_channel_events_ctrl_args {
830 __u32 cmd; /* in */
831 __u32 _pad0[1];
832};
833
834/* valid event ctrl values */
835#define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_DISABLE 0
836#define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_ENABLE 1
837#define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_CLEAR 2
838
839/* cycle stats snapshot buffer support for mode E */ 828/* cycle stats snapshot buffer support for mode E */
840struct nvgpu_cycle_stats_snapshot_args { 829struct nvgpu_cycle_stats_snapshot_args {
841 __u32 cmd; /* in: command to handle */ 830 __u32 cmd; /* in: command to handle */
@@ -886,6 +875,20 @@ struct nvgpu_timeslice_args {
886 __u32 reserved; 875 __u32 reserved;
887}; 876};
888 877
878struct nvgpu_event_id_ctrl_args {
879 __u32 cmd; /* in */
880 __u32 event_id; /* in */
881 __s32 event_fd; /* out */
882 __u32 padding;
883};
884#define NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT 0
885#define NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE 1
886#define NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC 2
887#define NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX 5
888
889#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CMD_ENABLE 1
890
891
889#define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \ 892#define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \
890 _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args) 893 _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args)
891#define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \ 894#define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \
@@ -922,8 +925,8 @@ struct nvgpu_timeslice_args {
922 _IO(NVGPU_IOCTL_MAGIC, 115) 925 _IO(NVGPU_IOCTL_MAGIC, 115)
923#define NVGPU_IOCTL_CHANNEL_FORCE_RESET \ 926#define NVGPU_IOCTL_CHANNEL_FORCE_RESET \
924 _IO(NVGPU_IOCTL_MAGIC, 116) 927 _IO(NVGPU_IOCTL_MAGIC, 116)
925#define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL \ 928#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL \
926 _IOW(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_channel_events_ctrl_args) 929 _IOWR(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_event_id_ctrl_args)
927#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT \ 930#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT \
928 _IOWR(NVGPU_IOCTL_MAGIC, 118, struct nvgpu_cycle_stats_snapshot_args) 931 _IOWR(NVGPU_IOCTL_MAGIC, 118, struct nvgpu_cycle_stats_snapshot_args)
929#define NVGPU_IOCTL_CHANNEL_WDT \ 932#define NVGPU_IOCTL_CHANNEL_WDT \