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-rw-r--r--include/uapi/linux/nvgpu.h99
1 files changed, 97 insertions, 2 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 9527ab82..e5bb0d07 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -166,7 +166,13 @@ struct nvgpu_gpu_characteristics {
166 166
167 __u8 chipname[8]; 167 __u8 chipname[8];
168 168
169 169 __u64 gr_compbit_store_base_hw;
170 __u32 gr_gobs_per_comptagline_per_slice;
171 __u32 num_ltc;
172 __u32 lts_per_ltc;
173 __u32 cbc_cache_line_size;
174 __u32 cbc_comptags_per_line;
175 __u32 reserved2;
170 176
171 /* Notes: 177 /* Notes:
172 - This struct can be safely appended with new fields. However, always 178 - This struct can be safely appended with new fields. However, always
@@ -896,6 +902,91 @@ struct nvgpu_as_map_buffer_ex_args {
896}; 902};
897 903
898/* 904/*
905 * Get info about buffer compbits. Requires that buffer is mapped with
906 * NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS.
907 *
908 * The compbits for a mappable buffer are organized in a mappable
909 * window to the compbits store. In case the window contains comptags
910 * for more than one buffer, the buffer comptag line index may differ
911 * from the window comptag line index.
912 */
913struct nvgpu_as_get_buffer_compbits_info_args {
914
915 /* in: address of an existing buffer mapping */
916 __u64 mapping_gva;
917
918 /* out: size of compbits mapping window (bytes) */
919 __u64 compbits_win_size;
920
921 /* out: comptag line index of the window start */
922 __u32 compbits_win_ctagline;
923
924 /* out: comptag line index of the buffer mapping */
925 __u32 mapping_ctagline;
926
927/* Buffer uses compbits */
928#define NVGPU_AS_GET_BUFFER_COMPBITS_INFO_FLAGS_HAS_COMPBITS (1 << 0)
929
930/* Buffer compbits are mappable */
931#define NVGPU_AS_GET_BUFFER_COMPBITS_INFO_FLAGS_MAPPABLE (1 << 1)
932
933/* Buffer IOVA addresses are discontiguous */
934#define NVGPU_AS_GET_BUFFER_COMPBITS_INFO_FLAGS_DISCONTIG_IOVA (1 << 2)
935
936 /* out */
937 __u32 flags;
938
939 __u32 reserved1;
940};
941
942/*
943 * Map compbits of a mapped buffer to the GPU address space. The
944 * compbits mapping is automatically unmapped when the buffer is
945 * unmapped.
946 *
947 * The compbits mapping always uses small pages, it is read-only, and
948 * is GPU cacheable. The mapping is a window to the compbits
949 * store. The window may not be exactly the size of the cache lines
950 * for the buffer mapping.
951 */
952struct nvgpu_as_map_buffer_compbits_args {
953
954 /* in: address of an existing buffer mapping */
955 __u64 mapping_gva;
956
957 /* in: gva to the mapped compbits store window when
958 * FIXED_OFFSET is set. Otherwise, ignored and should be be 0.
959 *
960 * For FIXED_OFFSET mapping:
961 * - If compbits are already mapped compbits_win_gva
962 * must match with the previously mapped gva.
963 * - The user must have allocated enough GVA space for the
964 * mapping window (see compbits_win_size in
965 * nvgpu_as_get_buffer_compbits_info_args)
966 *
967 * out: gva to the mapped compbits store window */
968 __u64 compbits_win_gva;
969
970 /* in: reserved, must be 0
971 out: physical or IOMMU address for mapping */
972 union {
973 /* contiguous iova addresses */
974 __u64 mapping_iova;
975
976 /* buffer to receive discontiguous iova addresses (reserved) */
977 __u64 mapping_iova_buf_addr;
978 };
979
980 /* in: Buffer size (in bytes) for discontiguous iova
981 * addresses. Reserved, must be 0. */
982 __u64 mapping_iova_buf_size;
983
984#define NVGPU_AS_MAP_BUFFER_COMPBITS_FLAGS_FIXED_OFFSET (1 << 0)
985 __u32 flags;
986 __u32 reserved1;
987};
988
989/*
899 * Unmapping a buffer: 990 * Unmapping a buffer:
900 * 991 *
901 * To unmap a previously mapped buffer set 'offset' to the offset returned in 992 * To unmap a previously mapped buffer set 'offset' to the offset returned in
@@ -938,9 +1029,13 @@ struct nvgpu_as_get_va_regions_args {
938 _IOWR(NVGPU_AS_IOCTL_MAGIC, 7, struct nvgpu_as_map_buffer_ex_args) 1029 _IOWR(NVGPU_AS_IOCTL_MAGIC, 7, struct nvgpu_as_map_buffer_ex_args)
939#define NVGPU_AS_IOCTL_GET_VA_REGIONS \ 1030#define NVGPU_AS_IOCTL_GET_VA_REGIONS \
940 _IOWR(NVGPU_AS_IOCTL_MAGIC, 8, struct nvgpu_as_get_va_regions_args) 1031 _IOWR(NVGPU_AS_IOCTL_MAGIC, 8, struct nvgpu_as_get_va_regions_args)
1032#define NVGPU_AS_IOCTL_GET_BUFFER_COMPBITS_INFO \
1033 _IOWR(NVGPU_AS_IOCTL_MAGIC, 9, struct nvgpu_as_get_buffer_compbits_info_args)
1034#define NVGPU_AS_IOCTL_MAP_BUFFER_COMPBITS \
1035 _IOWR(NVGPU_AS_IOCTL_MAGIC, 10, struct nvgpu_as_map_buffer_compbits_args)
941 1036
942#define NVGPU_AS_IOCTL_LAST \ 1037#define NVGPU_AS_IOCTL_LAST \
943 _IOC_NR(NVGPU_AS_IOCTL_GET_VA_REGIONS) 1038 _IOC_NR(NVGPU_AS_IOCTL_MAP_BUFFER_COMPBITS)
944#define NVGPU_AS_IOCTL_MAX_ARG_SIZE \ 1039#define NVGPU_AS_IOCTL_MAX_ARG_SIZE \
945 sizeof(struct nvgpu_as_map_buffer_ex_args) 1040 sizeof(struct nvgpu_as_map_buffer_ex_args)
946 1041